drivers/net/wireless/realtek/rtlwifi/pci.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2009-2012  Realtek Corporation.*/
   3
   4 #include "wifi.h"
   5 #include "core.h"
   6 #include "pci.h"
   7 #include "base.h"
   8 #include "ps.h"
   9 #include "efuse.h"
  10 #include <linux/interrupt.h>
  11 #include <linux/export.h>
  12 #include <linux/module.h>
  13
  14 MODULE_AUTHOR("lizhaoming       <[email protected]>");
  15 MODULE_AUTHOR("Realtek WlanFAE  <[email protected]>");
  16 MODULE_AUTHOR("Larry Finger     <[email protected]>");
  17 MODULE_LICENSE("GPL");
  18 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  19
  20 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  21         INTEL_VENDOR_ID,
  22         ATI_VENDOR_ID,
  23         AMD_VENDOR_ID,
  24         SIS_VENDOR_ID
  25 };
  26
  27 static const u8 ac_to_hwq[] = {
  28         VO_QUEUE,
  29         VI_QUEUE,
  30         BE_QUEUE,
  31         BK_QUEUE
  32 };
  33
  34 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw, struct sk_buff *skb)
  35 {
  36         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  37         __le16 fc = rtl_get_fc(skb);
  38         u8 queue_index = skb_get_queue_mapping(skb);
  39         struct ieee80211_hdr *hdr;
  40
  41         if (unlikely(ieee80211_is_beacon(fc)))
  42                 return BEACON_QUEUE;
  43         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  44                 return MGNT_QUEUE;
  45         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  46                 if (ieee80211_is_nullfunc(fc))
  47                         return HIGH_QUEUE;
  48         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
  49                 hdr = rtl_get_hdr(skb);
  50
  51                 if (is_multicast_ether_addr(hdr->addr1) ||
  52                     is_broadcast_ether_addr(hdr->addr1))
  53                         return HIGH_QUEUE;
  54         }
  55
  56         return ac_to_hwq[queue_index];
  57 }
  58
  59 /* Update PCI dependent default settings*/
  60 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  61 {
  62         struct rtl_priv *rtlpriv = rtl_priv(hw);
  63         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  64         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  65         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  66         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  67         u8 init_aspm;
  68
  69         ppsc->reg_rfps_level = 0;
  70         ppsc->support_aspm = false;
  71
  72         /*Update PCI ASPM setting */
  73         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  74         switch (rtlpci->const_pci_aspm) {
  75         case 0:
  76                 /*No ASPM */
  77                 break;
  78
  79         case 1:
  80                 /*ASPM dynamically enabled/disable. */
  81                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  82                 break;
  83
  84         case 2:
  85                 /*ASPM with Clock Req dynamically enabled/disable. */
  86                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  87                                          RT_RF_OFF_LEVL_CLK_REQ);
  88                 break;
  89
  90         case 3:
  91                 /* Always enable ASPM and Clock Req
  92                  * from initialization to halt.
  93                  */
  94                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
  95                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
  96                                          RT_RF_OFF_LEVL_CLK_REQ);
  97                 break;
  98
  99         case 4:
 100                 /* Always enable ASPM without Clock Req
 101                  * from initialization to halt.
 102                  */
 103                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 104                                           RT_RF_OFF_LEVL_CLK_REQ);
 105                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 106                 break;
 107         }
 108
 109         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 110
 111         /*Update Radio OFF setting */
 112         switch (rtlpci->const_hwsw_rfoff_d3) {
 113         case 1:
 114                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 115                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 116                 break;
 117
 118         case 2:
 119                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 120                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 121                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 122                 break;
 123
 124         case 3:
 125                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 126                 break;
 127         }
 128
 129         /*Set HW definition to determine if it supports ASPM. */
 130         switch (rtlpci->const_support_pciaspm) {
 131         case 0:
 132                 /*Not support ASPM. */
 133                 ppsc->support_aspm = false;
 134                 break;
 135         case 1:
 136                 /*Support ASPM. */
 137                 ppsc->support_aspm = true;
 138                 ppsc->support_backdoor = true;
 139                 break;
 140         case 2:
 141                 /*ASPM value set by chipset. */
 142                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 143                         ppsc->support_aspm = true;
 144                 break;
 145         default:
 146                 pr_err("switch case %#x not processed\n",
 147                        rtlpci->const_support_pciaspm);
 148                 break;
 149         }
 150
 151         /* toshiba aspm issue, toshiba will set aspm selfly
 152          * so we should not set aspm in driver
 153          */
 154         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 155         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 156             init_aspm == 0x43)
 157                 ppsc->support_aspm = false;
 158 }
 159
 160 static bool _rtl_pci_platform_switch_device_pci_aspm(
 161                         struct ieee80211_hw *hw,
 162                         u8 value)
 163 {
 164         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 165         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 166
 167         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 168                 value |= 0x40;
 169
 170         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 171
 172         return false;
 173 }
 174
 175 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 176 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 177 {
 178         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 179         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 180
 181         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 182
 183         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 184                 udelay(100);
 185 }
 186
 187 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 188 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 189 {
 190         struct rtl_priv *rtlpriv = rtl_priv(hw);
 191         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 192         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 193         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 194         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 195         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 196         /*Retrieve original configuration settings. */
 197         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 198         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 199                                 pcibridge_linkctrlreg;
 200         u16 aspmlevel = 0;
 201         u8 tmp_u1b = 0;
 202
 203         if (!ppsc->support_aspm)
 204                 return;
 205
 206         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 207                 rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE,
 208                         "PCI(Bridge) UNKNOWN\n");
 209
 210                 return;
 211         }
 212
 213         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 214                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 215                 _rtl_pci_switch_clk_req(hw, 0x0);
 216         }
 217
 218         /*for promising device will in L0 state after an I/O. */
 219         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 220
 221         /*Set corresponding value. */
 222         aspmlevel |= BIT(0) | BIT(1);
 223         linkctrl_reg &= ~aspmlevel;
 224         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 225
 226         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 227         udelay(50);
 228
 229         /*4 Disable Pci Bridge ASPM */
 230         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 231                               pcibridge_linkctrlreg);
 232
 233         udelay(50);
 234 }
 235
 236 /*Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 237  *power saving We should follow the sequence to enable
 238  *RTL8192SE first then enable Pci Bridge ASPM
 239  *or the system will show bluescreen.
 240  */
 241 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 242 {
 243         struct rtl_priv *rtlpriv = rtl_priv(hw);
 244         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 245         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 246         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 247         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 248         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 249         u16 aspmlevel;
 250         u8 u_pcibridge_aspmsetting;
 251         u8 u_device_aspmsetting;
 252
 253         if (!ppsc->support_aspm)
 254                 return;
 255
 256         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 257                 rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE,
 258                         "PCI(Bridge) UNKNOWN\n");
 259                 return;
 260         }
 261
 262         /*4 Enable Pci Bridge ASPM */
 263
 264         u_pcibridge_aspmsetting =
 265             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 266             rtlpci->const_hostpci_aspm_setting;
 267
 268         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 269                 u_pcibridge_aspmsetting &= ~BIT(0);
 270
 271         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 272                               u_pcibridge_aspmsetting);
 273
 274         rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
 275                 "PlatformEnableASPM(): Write reg[%x] = %x\n",
 276                 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 277                 u_pcibridge_aspmsetting);
 278
 279         udelay(50);
 280
 281         /*Get ASPM level (with/without Clock Req) */
 282         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 283         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 284
 285         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 286         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 287
 288         u_device_aspmsetting |= aspmlevel;
 289
 290         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 291
 292         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 293                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 294                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 295                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 296         }
 297         udelay(100);
 298 }
 299
 300 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 301 {
 302         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 303
 304         bool status = false;
 305         u8 offset_e0;
 306         unsigned int offset_e4;
 307
 308         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 309
 310         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 311
 312         if (offset_e0 == 0xA0) {
 313                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 314                 if (offset_e4 & BIT(23))
 315                         status = true;
 316         }
 317
 318         return status;
 319 }
 320
 321 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 322                                      struct rtl_priv **buddy_priv)
 323 {
 324         struct rtl_priv *rtlpriv = rtl_priv(hw);
 325         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 326         struct rtl_priv *tpriv = NULL, *iter;
 327         struct rtl_pci_priv *tpcipriv = NULL;
 328
 329         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 330                 list_for_each_entry(iter, &rtlpriv->glb_var->glb_priv_list,
 331                                     list) {
 332                         tpcipriv = (struct rtl_pci_priv *)iter->priv;
 333                         rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
 334                                 "pcipriv->ndis_adapter.funcnumber %x\n",
 335                                 pcipriv->ndis_adapter.funcnumber);
 336                         rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
 337                                 "tpcipriv->ndis_adapter.funcnumber %x\n",
 338                                 tpcipriv->ndis_adapter.funcnumber);
 339
 340                         if (pcipriv->ndis_adapter.busnumber ==
 341                             tpcipriv->ndis_adapter.busnumber &&
 342                             pcipriv->ndis_adapter.devnumber ==
 343                             tpcipriv->ndis_adapter.devnumber &&
 344                             pcipriv->ndis_adapter.funcnumber !=
 345                             tpcipriv->ndis_adapter.funcnumber) {
 346                                 tpriv = iter;
 347                                 break;
 348                         }
 349                 }
 350         }
 351
 352         rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
 353                 "find_buddy_priv %d\n", tpriv != NULL);
 354
 355         if (tpriv)
 356                 *buddy_priv = tpriv;
 357
 358         return tpriv != NULL;
 359 }
 360
 361 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 362 {
 363         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 364         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 365         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 366         u8 linkctrl_reg;
 367         u8 num4bbytes;
 368
 369         num4bbytes = (capabilityoffset + 0x10) / 4;
 370
 371         /*Read  Link Control Register */
 372         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 373
 374         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 375 }
 376
 377 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 378                                         struct ieee80211_hw *hw)
 379 {
 380         struct rtl_priv *rtlpriv = rtl_priv(hw);
 381         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 382
 383         u8 tmp;
 384         u16 linkctrl_reg;
 385
 386         /*Link Control Register */
 387         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 388         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 389
 390         rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 391                 pcipriv->ndis_adapter.linkctrl_reg);
 392
 393         pci_read_config_byte(pdev, 0x98, &tmp);
 394         tmp |= BIT(4);
 395         pci_write_config_byte(pdev, 0x98, tmp);
 396
 397         tmp = 0x17;
 398         pci_write_config_byte(pdev, 0x70f, tmp);
 399 }
 400
 401 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 402 {
 403         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 404
 405         _rtl_pci_update_default_setting(hw);
 406
 407         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 408                 /*Always enable ASPM & Clock Req. */
 409                 rtl_pci_enable_aspm(hw);
 410                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 411         }
 412 }
 413
 414 static void _rtl_pci_io_handler_init(struct device *dev,
 415                                      struct ieee80211_hw *hw)
 416 {
 417         struct rtl_priv *rtlpriv = rtl_priv(hw);
 418
 419         rtlpriv->io.dev = dev;
 420
 421         rtlpriv->io.write8_async = pci_write8_async;
 422         rtlpriv->io.write16_async = pci_write16_async;
 423         rtlpriv->io.write32_async = pci_write32_async;
 424
 425         rtlpriv->io.read8_sync = pci_read8_sync;
 426         rtlpriv->io.read16_sync = pci_read16_sync;
 427         rtlpriv->io.read32_sync = pci_read32_sync;
 428 }
 429
 430 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 431                                        struct sk_buff *skb,
 432                                        struct rtl_tcb_desc *tcb_desc, u8 tid)
 433 {
 434         struct rtl_priv *rtlpriv = rtl_priv(hw);
 435         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 436         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 437         struct sk_buff *next_skb;
 438         u8 additionlen = FCS_LEN;
 439
 440         /* here open is 4, wep/tkip is 8, aes is 12*/
 441         if (info->control.hw_key)
 442                 additionlen += info->control.hw_key->icv_len;
 443
 444         /* The most skb num is 6 */
 445         tcb_desc->empkt_num = 0;
 446         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 447         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 448                 struct ieee80211_tx_info *next_info;
 449
 450                 next_info = IEEE80211_SKB_CB(next_skb);
 451                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 452                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 453                                 next_skb->len + additionlen;
 454                         tcb_desc->empkt_num++;
 455                 } else {
 456                         break;
 457                 }
 458
 459                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 460                                       next_skb))
 461                         break;
 462
 463                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 464                         break;
 465         }
 466         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 467
 468         return true;
 469 }
 470
 471 /* just for early mode now */
 472 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 473 {
 474         struct rtl_priv *rtlpriv = rtl_priv(hw);
 475         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 476         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 477         struct sk_buff *skb = NULL;
 478         struct ieee80211_tx_info *info = NULL;
 479         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 480         int tid;
 481
 482         if (!rtlpriv->rtlhal.earlymode_enable)
 483                 return;
 484
 485         /* we just use em for BE/BK/VI/VO */
 486         for (tid = 7; tid >= 0; tid--) {
 487                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 488                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 489
 490                 while (!mac->act_scanning &&
 491                        rtlpriv->psc.rfpwr_state == ERFON) {
 492                         struct rtl_tcb_desc tcb_desc;
 493
 494                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 495
 496                         spin_lock(&rtlpriv->locks.waitq_lock);
 497                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 498                             (ring->entries - skb_queue_len(&ring->queue) >
 499                              rtlhal->max_earlymode_num)) {
 500                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 501                         } else {
 502                                 spin_unlock(&rtlpriv->locks.waitq_lock);
 503                                 break;
 504                         }
 505                         spin_unlock(&rtlpriv->locks.waitq_lock);
 506
 507                         /* Some macaddr can't do early mode. like
 508                          * multicast/broadcast/no_qos data
 509                          */
 510                         info = IEEE80211_SKB_CB(skb);
 511                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 512                                 _rtl_update_earlymode_info(hw, skb,
 513                                                            &tcb_desc, tid);
 514
 515                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 516                 }
 517         }
 518 }
 519
 520 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 521 {
 522         struct rtl_priv *rtlpriv = rtl_priv(hw);
 523         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 524
 525         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 526
 527         while (skb_queue_len(&ring->queue)) {
 528                 struct sk_buff *skb;
 529                 struct ieee80211_tx_info *info;
 530                 __le16 fc;
 531                 u8 tid;
 532                 u8 *entry;
 533
 534                 if (rtlpriv->use_new_trx_flow)
 535                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 536                 else
 537                         entry = (u8 *)(&ring->desc[ring->idx]);
 538
 539                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 540                         return;
 541                 ring->idx = (ring->idx + 1) % ring->entries;
 542
 543                 skb = __skb_dequeue(&ring->queue);
 544                 dma_unmap_single(&rtlpci->pdev->dev,
 545                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
 546                                                 true, HW_DESC_TXBUFF_ADDR),
 547                                  skb->len, DMA_TO_DEVICE);
 548
 549                 /* remove early mode header */
 550                 if (rtlpriv->rtlhal.earlymode_enable)
 551                         skb_pull(skb, EM_HDR_LEN);
 552
 553                 rtl_dbg(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 554                         "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 555                         ring->idx,
 556                         skb_queue_len(&ring->queue),
 557                         *(u16 *)(skb->data + 22));
 558
 559                 if (prio == TXCMD_QUEUE) {
 560                         dev_kfree_skb(skb);
 561                         goto tx_status_ok;
 562                 }
 563
 564                 /* for sw LPS, just after NULL skb send out, we can
 565                  * sure AP knows we are sleeping, we should not let
 566                  * rf sleep
 567                  */
 568                 fc = rtl_get_fc(skb);
 569                 if (ieee80211_is_nullfunc(fc)) {
 570                         if (ieee80211_has_pm(fc)) {
 571                                 rtlpriv->mac80211.offchan_delay = true;
 572                                 rtlpriv->psc.state_inap = true;
 573                         } else {
 574                                 rtlpriv->psc.state_inap = false;
 575                         }
 576                 }
 577                 if (ieee80211_is_action(fc)) {
 578                         struct ieee80211_mgmt *action_frame =
 579                                 (struct ieee80211_mgmt *)skb->data;
 580                         if (action_frame->u.action.u.ht_smps.action ==
 581                             WLAN_HT_ACTION_SMPS) {
 582                                 dev_kfree_skb(skb);
 583                                 goto tx_status_ok;
 584                         }
 585                 }
 586
 587                 /* update tid tx pkt num */
 588                 tid = rtl_get_tid(skb);
 589                 if (tid <= 7)
 590                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 591
 592                 info = IEEE80211_SKB_CB(skb);
 593
 594                 if (likely(!ieee80211_is_nullfunc(fc))) {
 595                         ieee80211_tx_info_clear_status(info);
 596                         info->flags |= IEEE80211_TX_STAT_ACK;
 597                         /*info->status.rates[0].count = 1; */
 598                         ieee80211_tx_status_irqsafe(hw, skb);
 599                 } else {
 600                         rtl_tx_ackqueue(hw, skb);
 601                 }
 602
 603                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 604                         rtl_dbg(rtlpriv, COMP_ERR, DBG_DMESG,
 605                                 "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 606                                 prio, ring->idx,
 607                                 skb_queue_len(&ring->queue));
 608
 609                         ieee80211_wake_queue(hw, skb_get_queue_mapping(skb));
 610                 }
 611 tx_status_ok:
 612                 skb = NULL;
 613         }
 614
 615         if (((rtlpriv->link_info.num_rx_inperiod +
 616               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 617               rtlpriv->link_info.num_rx_inperiod > 2)
 618                 rtl_lps_leave(hw, false);
 619 }
 620
 621 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 622                                     struct sk_buff *new_skb, u8 *entry,
 623                                     int rxring_idx, int desc_idx)
 624 {
 625         struct rtl_priv *rtlpriv = rtl_priv(hw);
 626         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 627         u32 bufferaddress;
 628         u8 tmp_one = 1;
 629         struct sk_buff *skb;
 630
 631         if (likely(new_skb)) {
 632                 skb = new_skb;
 633                 goto remap;
 634         }
 635         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 636         if (!skb)
 637                 return 0;
 638
 639 remap:
 640         /* just set skb->cb to mapping addr for pci_unmap_single use */
 641         *((dma_addr_t *)skb->cb) =
 642                 dma_map_single(&rtlpci->pdev->dev, skb_tail_pointer(skb),
 643                                rtlpci->rxbuffersize, DMA_FROM_DEVICE);
 644         bufferaddress = *((dma_addr_t *)skb->cb);
 645         if (dma_mapping_error(&rtlpci->pdev->dev, bufferaddress))
 646                 return 0;
 647         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 648         if (rtlpriv->use_new_trx_flow) {
 649                 /* skb->cb may be 64 bit address */
 650                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 651                                             HW_DESC_RX_PREPARE,
 652                                             (u8 *)(dma_addr_t *)skb->cb);
 653         } else {
 654                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 655                                             HW_DESC_RXBUFF_ADDR,
 656                                             (u8 *)&bufferaddress);
 657                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 658                                             HW_DESC_RXPKT_LEN,
 659                                             (u8 *)&rtlpci->rxbuffersize);
 660                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 661                                             HW_DESC_RXOWN,
 662                                             (u8 *)&tmp_one);
 663         }
 664         return 1;
 665 }
 666
 667 /* inorder to receive 8K AMSDU we have set skb to
 668  * 9100bytes in init rx ring, but if this packet is
 669  * not a AMSDU, this large packet will be sent to
 670  * TCP/IP directly, this cause big packet ping fail
 671  * like: "ping -s 65507", so here we will realloc skb
 672  * based on the true size of packet, Mac80211
 673  * Probably will do it better, but does not yet.
 674  *
 675  * Some platform will fail when alloc skb sometimes.
 676  * in this condition, we will send the old skb to
 677  * mac80211 directly, this will not cause any other
 678  * issues, but only this packet will be lost by TCP/IP
 679  */
 680 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 681                                     struct sk_buff *skb,
 682                                     struct ieee80211_rx_status rx_status)
 683 {
 684         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 685                 dev_kfree_skb_any(skb);
 686         } else {
 687                 struct sk_buff *uskb = NULL;
 688
 689                 uskb = dev_alloc_skb(skb->len + 128);
 690                 if (likely(uskb)) {
 691                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 692                                sizeof(rx_status));
 693                         skb_put_data(uskb, skb->data, skb->len);
 694                         dev_kfree_skb_any(skb);
 695                         ieee80211_rx_irqsafe(hw, uskb);
 696                 } else {
 697                         ieee80211_rx_irqsafe(hw, skb);
 698                 }
 699         }
 700 }
 701
 702 /*hsisr interrupt handler*/
 703 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 704 {
 705         struct rtl_priv *rtlpriv = rtl_priv(hw);
 706         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 707
 708         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 709                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 710                        rtlpci->sys_irq_mask);
 711 }
 712
 713 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 714 {
 715         struct rtl_priv *rtlpriv = rtl_priv(hw);
 716         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 717         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 718         struct ieee80211_rx_status rx_status = { 0 };
 719         unsigned int count = rtlpci->rxringcount;
 720         u8 own;
 721         u8 tmp_one;
 722         bool unicast = false;
 723         u8 hw_queue = 0;
 724         unsigned int rx_remained_cnt = 0;
 725         struct rtl_stats stats = {
 726                 .signal = 0,
 727                 .rate = 0,
 728         };
 729
 730         /*RX NORMAL PKT */
 731         while (count--) {
 732                 struct ieee80211_hdr *hdr;
 733                 __le16 fc;
 734                 u16 len;
 735                 /*rx buffer descriptor */
 736                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 737                 /*if use new trx flow, it means wifi info */
 738                 struct rtl_rx_desc *pdesc = NULL;
 739                 /*rx pkt */
 740                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 741                                       rtlpci->rx_ring[rxring_idx].idx];
 742                 struct sk_buff *new_skb;
 743
 744                 if (rtlpriv->use_new_trx_flow) {
 745                         if (rx_remained_cnt == 0)
 746                                 rx_remained_cnt =
 747                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 748                                                                       hw_queue);
 749                         if (rx_remained_cnt == 0)
 750                                 return;
 751                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 752                                 rtlpci->rx_ring[rxring_idx].idx];
 753                         pdesc = (struct rtl_rx_desc *)skb->data;
 754                 } else {        /* rx descriptor */
 755                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 756                                 rtlpci->rx_ring[rxring_idx].idx];
 757
 758                         own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
 759                                                               false,
 760                                                               HW_DESC_OWN);
 761                         if (own) /* wait data to be filled by hardware */
 762                                 return;
 763                 }
 764
 765                 /* Reaching this point means: data is filled already
 766                  * AAAAAAttention !!!
 767                  * We can NOT access 'skb' before 'pci_unmap_single'
 768                  */
 769                 dma_unmap_single(&rtlpci->pdev->dev, *((dma_addr_t *)skb->cb),
 770                                  rtlpci->rxbuffersize, DMA_FROM_DEVICE);
 771
 772                 /* get a new skb - if fail, old one will be reused */
 773                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 774                 if (unlikely(!new_skb))
 775                         goto no_new;
 776                 memset(&rx_status, 0, sizeof(rx_status));
 777                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 778                                                  &rx_status, (u8 *)pdesc, skb);
 779
 780                 if (rtlpriv->use_new_trx_flow)
 781                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 782                                                            (u8 *)buffer_desc,
 783                                                            hw_queue);
 784
 785                 len = rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc, false,
 786                                                   HW_DESC_RXPKT_LEN);
 787
 788                 if (skb->end - skb->tail > len) {
 789                         skb_put(skb, len);
 790                         if (rtlpriv->use_new_trx_flow)
 791                                 skb_reserve(skb, stats.rx_drvinfo_size +
 792                                             stats.rx_bufshift + 24);
 793                         else
 794                                 skb_reserve(skb, stats.rx_drvinfo_size +
 795                                             stats.rx_bufshift);
 796                 } else {
 797                         rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
 798                                 "skb->end - skb->tail = %d, len is %d\n",
 799                                 skb->end - skb->tail, len);
 800                         dev_kfree_skb_any(skb);
 801                         goto new_trx_end;
 802                 }
 803                 /* handle command packet here */
 804                 if (stats.packet_report_type == C2H_PACKET) {
 805                         rtl_c2hcmd_enqueue(hw, skb);
 806                         goto new_trx_end;
 807                 }
 808
 809                 /* NOTICE This can not be use for mac80211,
 810                  * this is done in mac80211 code,
 811                  * if done here sec DHCP will fail
 812                  * skb_trim(skb, skb->len - 4);
 813                  */
 814
 815                 hdr = rtl_get_hdr(skb);
 816                 fc = rtl_get_fc(skb);
 817
 818                 if (!stats.crc && !stats.hwerror && (skb->len > FCS_LEN)) {
 819                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 820                                sizeof(rx_status));
 821
 822                         if (is_broadcast_ether_addr(hdr->addr1)) {
 823                                 ;/*TODO*/
 824                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 825                                 ;/*TODO*/
 826                         } else {
 827                                 unicast = true;
 828                                 rtlpriv->stats.rxbytesunicast += skb->len;
 829                         }
 830                         rtl_is_special_data(hw, skb, false, true);
 831
 832                         if (ieee80211_is_data(fc)) {
 833                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 834                                 if (unicast)
 835                                         rtlpriv->link_info.num_rx_inperiod++;
 836                         }
 837
 838                         rtl_collect_scan_list(hw, skb);
 839
 840                         /* static bcn for roaming */
 841                         rtl_beacon_statistic(hw, skb);
 842                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 843                         /* for sw lps */
 844                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 845                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 846                         if (rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP &&
 847                             rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G &&
 848                             (ieee80211_is_beacon(fc) ||
 849                              ieee80211_is_probe_resp(fc))) {
 850                                 dev_kfree_skb_any(skb);
 851                         } else {
 852                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 853                         }
 854                 } else {
 855                         /* drop packets with errors or those too short */
 856                         dev_kfree_skb_any(skb);
 857                 }
 858 new_trx_end:
 859                 if (rtlpriv->use_new_trx_flow) {
 860                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 861                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 862                                         RTL_PCI_MAX_RX_COUNT;
 863
 864                         rx_remained_cnt--;
 865                         rtl_write_word(rtlpriv, 0x3B4,
 866                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 867                 }
 868                 if (((rtlpriv->link_info.num_rx_inperiod +
 869                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 870                       rtlpriv->link_info.num_rx_inperiod > 2)
 871                         rtl_lps_leave(hw, false);
 872                 skb = new_skb;
 873 no_new:
 874                 if (rtlpriv->use_new_trx_flow) {
 875                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 876                                                  rxring_idx,
 877                                                  rtlpci->rx_ring[rxring_idx].idx);
 878                 } else {
 879                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 880                                                  rxring_idx,
 881                                                  rtlpci->rx_ring[rxring_idx].idx);
 882                         if (rtlpci->rx_ring[rxring_idx].idx ==
 883                             rtlpci->rxringcount - 1)
 884                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 885                                                             false,
 886                                                             HW_DESC_RXERO,
 887                                                             (u8 *)&tmp_one);
 888                 }
 889                 rtlpci->rx_ring[rxring_idx].idx =
 890                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 891                                 rtlpci->rxringcount;
 892         }
 893 }
 894
 895 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 896 {
 897         struct ieee80211_hw *hw = dev_id;
 898         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 899         struct rtl_priv *rtlpriv = rtl_priv(hw);
 900         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 901         unsigned long flags;
 902         struct rtl_int intvec = {0};
 903
 904         irqreturn_t ret = IRQ_HANDLED;
 905
 906         if (rtlpci->irq_enabled == 0)
 907                 return ret;
 908
 909         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 910         rtlpriv->cfg->ops->disable_interrupt(hw);
 911
 912         /*read ISR: 4/8bytes */
 913         rtlpriv->cfg->ops->interrupt_recognized(hw, &intvec);
 914
 915         /*Shared IRQ or HW disappeared */
 916         if (!intvec.inta || intvec.inta == 0xffff)
 917                 goto done;
 918
 919         /*<1> beacon related */
 920         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK])
 921                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 922                         "beacon ok interrupt!\n");
 923
 924         if (unlikely(intvec.inta & rtlpriv->cfg->maps[RTL_IMR_TBDER]))
 925                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 926                         "beacon err interrupt!\n");
 927
 928         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BDOK])
 929                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 930
 931         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 932                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 933                         "prepare beacon for interrupt!\n");
 934                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 935         }
 936
 937         /*<2> Tx related */
 938         if (unlikely(intvec.intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 939                 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 940
 941         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 942                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 943                         "Manage ok interrupt!\n");
 944                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 945         }
 946
 947         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 948                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 949                         "HIGH_QUEUE ok interrupt!\n");
 950                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 951         }
 952
 953         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 954                 rtlpriv->link_info.num_tx_inperiod++;
 955
 956                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 957                         "BK Tx OK interrupt!\n");
 958                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 959         }
 960
 961         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 962                 rtlpriv->link_info.num_tx_inperiod++;
 963
 964                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 965                         "BE TX OK interrupt!\n");
 966                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 967         }
 968
 969         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 970                 rtlpriv->link_info.num_tx_inperiod++;
 971
 972                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 973                         "VI TX OK interrupt!\n");
 974                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 975         }
 976
 977         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 978                 rtlpriv->link_info.num_tx_inperiod++;
 979
 980                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 981                         "Vo TX OK interrupt!\n");
 982                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 983         }
 984
 985         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
 986                 if (intvec.intd & rtlpriv->cfg->maps[RTL_IMR_H2CDOK]) {
 987                         rtlpriv->link_info.num_tx_inperiod++;
 988
 989                         rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
 990                                 "H2C TX OK interrupt!\n");
 991                         _rtl_pci_tx_isr(hw, H2C_QUEUE);
 992                 }
 993         }
 994
 995         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 996                 if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 997                         rtlpriv->link_info.num_tx_inperiod++;
 998
 999                         rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
1000                                 "CMD TX OK interrupt!\n");
1001                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1002                 }
1003         }
1004
1005         /*<3> Rx related */
1006         if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1007                 rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1008                 _rtl_pci_rx_interrupt(hw);
1009         }
1010
1011         if (unlikely(intvec.inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1012                 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1013                         "rx descriptor unavailable!\n");
1014                 _rtl_pci_rx_interrupt(hw);
1015         }
1016
1017         if (unlikely(intvec.intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1018                 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1019                 _rtl_pci_rx_interrupt(hw);
1020         }
1021
1022         /*<4> fw related*/
1023         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1024                 if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1025                         rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
1026                                 "firmware interrupt!\n");
1027                         queue_delayed_work(rtlpriv->works.rtl_wq,
1028                                            &rtlpriv->works.fwevt_wq, 0);
1029                 }
1030         }
1031
1032         /*<5> hsisr related*/
1033         /* Only 8188EE & 8723BE Supported.
1034          * If Other ICs Come in, System will corrupt,
1035          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1036          * are not initialized
1037          */
1038         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1039             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1040                 if (unlikely(intvec.inta &
1041                     rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1042                         rtl_dbg(rtlpriv, COMP_INTR, DBG_TRACE,
1043                                 "hsisr interrupt!\n");
1044                         _rtl_pci_hs_interrupt(hw);
1045                 }
1046         }
1047
1048         if (rtlpriv->rtlhal.earlymode_enable)
1049                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1050
1051 done:
1052         rtlpriv->cfg->ops->enable_interrupt(hw);
1053         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1054         return ret;
1055 }
1056
1057 static void _rtl_pci_irq_tasklet(struct tasklet_struct *t)
1058 {
1059         struct rtl_priv *rtlpriv = from_tasklet(rtlpriv, t, works.irq_tasklet);
1060         struct ieee80211_hw *hw = rtlpriv->hw;
1061         _rtl_pci_tx_chk_waitq(hw);
1062 }
1063
1064 static void _rtl_pci_prepare_bcn_tasklet(struct tasklet_struct *t)
1065 {
1066         struct rtl_priv *rtlpriv = from_tasklet(rtlpriv, t,
1067                                                 works.irq_prepare_bcn_tasklet);
1068         struct ieee80211_hw *hw = rtlpriv->hw;
1069         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1070         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1071         struct rtl8192_tx_ring *ring = NULL;
1072         struct ieee80211_hdr *hdr = NULL;
1073         struct ieee80211_tx_info *info = NULL;
1074         struct sk_buff *pskb = NULL;
1075         struct rtl_tx_desc *pdesc = NULL;
1076         struct rtl_tcb_desc tcb_desc;
1077         /*This is for new trx flow*/
1078         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1079         u8 temp_one = 1;
1080         u8 *entry;
1081
1082         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1083         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1084         pskb = __skb_dequeue(&ring->queue);
1085         if (rtlpriv->use_new_trx_flow)
1086                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1087         else
1088                 entry = (u8 *)(&ring->desc[ring->idx]);
1089         if (pskb) {
1090                 dma_unmap_single(&rtlpci->pdev->dev,
1091                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1092                                                 true, HW_DESC_TXBUFF_ADDR),
1093                                  pskb->len, DMA_TO_DEVICE);
1094                 kfree_skb(pskb);
1095         }
1096
1097         /*NB: the beacon data buffer must be 32-bit aligned. */
1098         pskb = ieee80211_beacon_get(hw, mac->vif, 0);
1099         if (!pskb)
1100                 return;
1101         hdr = rtl_get_hdr(pskb);
1102         info = IEEE80211_SKB_CB(pskb);
1103         pdesc = &ring->desc[0];
1104         if (rtlpriv->use_new_trx_flow)
1105                 pbuffer_desc = &ring->buffer_desc[0];
1106
1107         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1108                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1109                                         BEACON_QUEUE, &tcb_desc);
1110
1111         __skb_queue_tail(&ring->queue, pskb);
1112
1113         if (rtlpriv->use_new_trx_flow) {
1114                 temp_one = 4;
1115                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1116                                             HW_DESC_OWN, (u8 *)&temp_one);
1117         } else {
1118                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1119                                             &temp_one);
1120         }
1121 }
1122
1123 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1124 {
1125         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1126         struct rtl_priv *rtlpriv = rtl_priv(hw);
1127         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1128         u8 i;
1129         u16 desc_num;
1130
1131         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1132                 desc_num = TX_DESC_NUM_92E;
1133         else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE)
1134                 desc_num = TX_DESC_NUM_8822B;
1135         else
1136                 desc_num = RT_TXDESC_NUM;
1137
1138         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1139                 rtlpci->txringcount[i] = desc_num;
1140
1141         /*we just alloc 2 desc for beacon queue,
1142          *because we just need first desc in hw beacon.
1143          */
1144         rtlpci->txringcount[BEACON_QUEUE] = 2;
1145
1146         /*BE queue need more descriptor for performance
1147          *consideration or, No more tx desc will happen,
1148          *and may cause mac80211 mem leakage.
1149          */
1150         if (!rtl_priv(hw)->use_new_trx_flow)
1151                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1152
1153         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1154         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1155 }
1156
1157 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1158                                  struct pci_dev *pdev)
1159 {
1160         struct rtl_priv *rtlpriv = rtl_priv(hw);
1161         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1162         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1163         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1164
1165         rtlpci->up_first_time = true;
1166         rtlpci->being_init_adapter = false;
1167
1168         rtlhal->hw = hw;
1169         rtlpci->pdev = pdev;
1170
1171         /*Tx/Rx related var */
1172         _rtl_pci_init_trx_var(hw);
1173
1174         /*IBSS*/
1175         mac->beacon_interval = 100;
1176
1177         /*AMPDU*/
1178         mac->min_space_cfg = 0;
1179         mac->max_mss_density = 0;
1180         /*set sane AMPDU defaults */
1181         mac->current_ampdu_density = 7;
1182         mac->current_ampdu_factor = 3;
1183
1184         /*Retry Limit*/
1185         mac->retry_short = 7;
1186         mac->retry_long = 7;
1187
1188         /*QOS*/
1189         rtlpci->acm_method = EACMWAY2_SW;
1190
1191         /*task */
1192         tasklet_setup(&rtlpriv->works.irq_tasklet, _rtl_pci_irq_tasklet);
1193         tasklet_setup(&rtlpriv->works.irq_prepare_bcn_tasklet,
1194                      _rtl_pci_prepare_bcn_tasklet);
1195         INIT_WORK(&rtlpriv->works.lps_change_work,
1196                   rtl_lps_change_work_callback);
1197 }
1198
1199 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1200                                  unsigned int prio, unsigned int entries)
1201 {
1202         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1203         struct rtl_priv *rtlpriv = rtl_priv(hw);
1204         struct rtl_tx_buffer_desc *buffer_desc;
1205         struct rtl_tx_desc *desc;
1206         dma_addr_t buffer_desc_dma, desc_dma;
1207         u32 nextdescaddress;
1208         int i;
1209
1210         /* alloc tx buffer desc for new trx flow*/
1211         if (rtlpriv->use_new_trx_flow) {
1212                 buffer_desc =
1213                    dma_alloc_coherent(&rtlpci->pdev->dev,
1214                                       sizeof(*buffer_desc) * entries,
1215                                       &buffer_desc_dma, GFP_KERNEL);
1216
1217                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1218                         pr_err("Cannot allocate TX ring (prio = %d)\n",
1219                                prio);
1220                         return -ENOMEM;
1221                 }
1222
1223                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1224                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1225
1226                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1227                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1228         }
1229
1230         /* alloc dma for this ring */
1231         desc = dma_alloc_coherent(&rtlpci->pdev->dev, sizeof(*desc) * entries,
1232                                   &desc_dma, GFP_KERNEL);
1233
1234         if (!desc || (unsigned long)desc & 0xFF) {
1235                 pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
1236                 return -ENOMEM;
1237         }
1238
1239         rtlpci->tx_ring[prio].desc = desc;
1240         rtlpci->tx_ring[prio].dma = desc_dma;
1241
1242         rtlpci->tx_ring[prio].idx = 0;
1243         rtlpci->tx_ring[prio].entries = entries;
1244         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1245
1246         rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1247                 prio, desc);
1248
1249         /* init every desc in this ring */
1250         if (!rtlpriv->use_new_trx_flow) {
1251                 for (i = 0; i < entries; i++) {
1252                         nextdescaddress = (u32)desc_dma +
1253                                           ((i + 1) % entries) *
1254                                           sizeof(*desc);
1255
1256                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1257                                                     true,
1258                                                     HW_DESC_TX_NEXTDESC_ADDR,
1259                                                     (u8 *)&nextdescaddress);
1260                 }
1261         }
1262         return 0;
1263 }
1264
1265 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1266 {
1267         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1268         struct rtl_priv *rtlpriv = rtl_priv(hw);
1269         int i;
1270
1271         if (rtlpriv->use_new_trx_flow) {
1272                 struct rtl_rx_buffer_desc *entry = NULL;
1273                 /* alloc dma for this ring */
1274                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1275                     dma_alloc_coherent(&rtlpci->pdev->dev,
1276                                        sizeof(*rtlpci->rx_ring[rxring_idx].buffer_desc) *
1277                                        rtlpci->rxringcount,
1278                                        &rtlpci->rx_ring[rxring_idx].dma, GFP_KERNEL);
1279                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1280                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1281                         pr_err("Cannot allocate RX ring\n");
1282                         return -ENOMEM;
1283                 }
1284
1285                 /* init every desc in this ring */
1286                 rtlpci->rx_ring[rxring_idx].idx = 0;
1287                 for (i = 0; i < rtlpci->rxringcount; i++) {
1288                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1289                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1290                                                       rxring_idx, i))
1291                                 return -ENOMEM;
1292                 }
1293         } else {
1294                 struct rtl_rx_desc *entry = NULL;
1295                 u8 tmp_one = 1;
1296                 /* alloc dma for this ring */
1297                 rtlpci->rx_ring[rxring_idx].desc =
1298                     dma_alloc_coherent(&rtlpci->pdev->dev,
1299                                        sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1300                                        rtlpci->rxringcount,
1301                                        &rtlpci->rx_ring[rxring_idx].dma, GFP_KERNEL);
1302                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1303                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1304                         pr_err("Cannot allocate RX ring\n");
1305                         return -ENOMEM;
1306                 }
1307
1308                 /* init every desc in this ring */
1309                 rtlpci->rx_ring[rxring_idx].idx = 0;
1310
1311                 for (i = 0; i < rtlpci->rxringcount; i++) {
1312                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1313                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1314                                                       rxring_idx, i))
1315                                 return -ENOMEM;
1316                 }
1317
1318                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1319                                             HW_DESC_RXERO, &tmp_one);
1320         }
1321         return 0;
1322 }
1323
1324 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1325                                   unsigned int prio)
1326 {
1327         struct rtl_priv *rtlpriv = rtl_priv(hw);
1328         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1329         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1330
1331         /* free every desc in this ring */
1332         while (skb_queue_len(&ring->queue)) {
1333                 u8 *entry;
1334                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1335
1336                 if (rtlpriv->use_new_trx_flow)
1337                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1338                 else
1339                         entry = (u8 *)(&ring->desc[ring->idx]);
1340
1341                 dma_unmap_single(&rtlpci->pdev->dev,
1342                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1343                                                 true, HW_DESC_TXBUFF_ADDR),
1344                                  skb->len, DMA_TO_DEVICE);
1345                 kfree_skb(skb);
1346                 ring->idx = (ring->idx + 1) % ring->entries;
1347         }
1348
1349         /* free dma of this ring */
1350         dma_free_coherent(&rtlpci->pdev->dev,
1351                           sizeof(*ring->desc) * ring->entries, ring->desc,
1352                           ring->dma);
1353         ring->desc = NULL;
1354         if (rtlpriv->use_new_trx_flow) {
1355                 dma_free_coherent(&rtlpci->pdev->dev,
1356                                   sizeof(*ring->buffer_desc) * ring->entries,
1357                                   ring->buffer_desc, ring->buffer_desc_dma);
1358                 ring->buffer_desc = NULL;
1359         }
1360 }
1361
1362 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1363 {
1364         struct rtl_priv *rtlpriv = rtl_priv(hw);
1365         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1366         int i;
1367
1368         /* free every desc in this ring */
1369         for (i = 0; i < rtlpci->rxringcount; i++) {
1370                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1371
1372                 if (!skb)
1373                         continue;
1374                 dma_unmap_single(&rtlpci->pdev->dev, *((dma_addr_t *)skb->cb),
1375                                  rtlpci->rxbuffersize, DMA_FROM_DEVICE);
1376                 kfree_skb(skb);
1377         }
1378
1379         /* free dma of this ring */
1380         if (rtlpriv->use_new_trx_flow) {
1381                 dma_free_coherent(&rtlpci->pdev->dev,
1382                                   sizeof(*rtlpci->rx_ring[rxring_idx].buffer_desc) *
1383                                   rtlpci->rxringcount,
1384                                   rtlpci->rx_ring[rxring_idx].buffer_desc,
1385                                   rtlpci->rx_ring[rxring_idx].dma);
1386                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1387         } else {
1388                 dma_free_coherent(&rtlpci->pdev->dev,
1389                                   sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1390                                   rtlpci->rxringcount,
1391                                   rtlpci->rx_ring[rxring_idx].desc,
1392                                   rtlpci->rx_ring[rxring_idx].dma);
1393                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1394         }
1395 }
1396
1397 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1398 {
1399         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1400         int ret;
1401         int i, rxring_idx;
1402
1403         /* rxring_idx 0:RX_MPDU_QUEUE
1404          * rxring_idx 1:RX_CMD_QUEUE
1405          */
1406         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1407                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1408                 if (ret)
1409                         return ret;
1410         }
1411
1412         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1413                 ret = _rtl_pci_init_tx_ring(hw, i, rtlpci->txringcount[i]);
1414                 if (ret)
1415                         goto err_free_rings;
1416         }
1417
1418         return 0;
1419
1420 err_free_rings:
1421         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1422                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1423
1424         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1425                 if (rtlpci->tx_ring[i].desc ||
1426                     rtlpci->tx_ring[i].buffer_desc)
1427                         _rtl_pci_free_tx_ring(hw, i);
1428
1429         return 1;
1430 }
1431
1432 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1433 {
1434         u32 i, rxring_idx;
1435
1436         /*free rx rings */
1437         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1438                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1439
1440         /*free tx rings */
1441         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1442                 _rtl_pci_free_tx_ring(hw, i);
1443
1444         return 0;
1445 }
1446
1447 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1448 {
1449         struct rtl_priv *rtlpriv = rtl_priv(hw);
1450         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1451         int i, rxring_idx;
1452         unsigned long flags;
1453         u8 tmp_one = 1;
1454         u32 bufferaddress;
1455         /* rxring_idx 0:RX_MPDU_QUEUE */
1456         /* rxring_idx 1:RX_CMD_QUEUE */
1457         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1458                 /* force the rx_ring[RX_MPDU_QUEUE/
1459                  * RX_CMD_QUEUE].idx to the first one
1460                  *new trx flow, do nothing
1461                  */
1462                 if (!rtlpriv->use_new_trx_flow &&
1463                     rtlpci->rx_ring[rxring_idx].desc) {
1464                         struct rtl_rx_desc *entry = NULL;
1465
1466                         rtlpci->rx_ring[rxring_idx].idx = 0;
1467                         for (i = 0; i < rtlpci->rxringcount; i++) {
1468                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1469                                 bufferaddress =
1470                                   rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1471                                   false, HW_DESC_RXBUFF_ADDR);
1472                                 memset((u8 *)entry, 0,
1473                                        sizeof(*rtlpci->rx_ring
1474                                        [rxring_idx].desc));/*clear one entry*/
1475                                 if (rtlpriv->use_new_trx_flow) {
1476                                         rtlpriv->cfg->ops->set_desc(hw,
1477                                             (u8 *)entry, false,
1478                                             HW_DESC_RX_PREPARE,
1479                                             (u8 *)&bufferaddress);
1480                                 } else {
1481                                         rtlpriv->cfg->ops->set_desc(hw,
1482                                             (u8 *)entry, false,
1483                                             HW_DESC_RXBUFF_ADDR,
1484                                             (u8 *)&bufferaddress);
1485                                         rtlpriv->cfg->ops->set_desc(hw,
1486                                             (u8 *)entry, false,
1487                                             HW_DESC_RXPKT_LEN,
1488                                             (u8 *)&rtlpci->rxbuffersize);
1489                                         rtlpriv->cfg->ops->set_desc(hw,
1490                                             (u8 *)entry, false,
1491                                             HW_DESC_RXOWN,
1492                                             (u8 *)&tmp_one);
1493                                 }
1494                         }
1495                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1496                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1497                 }
1498                 rtlpci->rx_ring[rxring_idx].idx = 0;
1499         }
1500
1501         /*after reset, release previous pending packet,
1502          *and force the  tx idx to the first one
1503          */
1504         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1505         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1506                 if (rtlpci->tx_ring[i].desc ||
1507                     rtlpci->tx_ring[i].buffer_desc) {
1508                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1509
1510                         while (skb_queue_len(&ring->queue)) {
1511                                 u8 *entry;
1512                                 struct sk_buff *skb =
1513                                         __skb_dequeue(&ring->queue);
1514                                 if (rtlpriv->use_new_trx_flow)
1515                                         entry = (u8 *)(&ring->buffer_desc
1516                                                                 [ring->idx]);
1517                                 else
1518                                         entry = (u8 *)(&ring->desc[ring->idx]);
1519
1520                                 dma_unmap_single(&rtlpci->pdev->dev,
1521                                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1522                                                                 true, HW_DESC_TXBUFF_ADDR),
1523                                                  skb->len, DMA_TO_DEVICE);
1524                                 dev_kfree_skb_irq(skb);
1525                                 ring->idx = (ring->idx + 1) % ring->entries;
1526                         }
1527
1528                         if (rtlpriv->use_new_trx_flow) {
1529                                 rtlpci->tx_ring[i].cur_tx_rp = 0;
1530                                 rtlpci->tx_ring[i].cur_tx_wp = 0;
1531                         }
1532
1533                         ring->idx = 0;
1534                         ring->entries = rtlpci->txringcount[i];
1535                 }
1536         }
1537         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1538
1539         return 0;
1540 }
1541
1542 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1543                                         struct ieee80211_sta *sta,
1544                                         struct sk_buff *skb)
1545 {
1546         struct rtl_priv *rtlpriv = rtl_priv(hw);
1547         struct rtl_sta_info *sta_entry = NULL;
1548         u8 tid = rtl_get_tid(skb);
1549         __le16 fc = rtl_get_fc(skb);
1550
1551         if (!sta)
1552                 return false;
1553         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1554
1555         if (!rtlpriv->rtlhal.earlymode_enable)
1556                 return false;
1557         if (ieee80211_is_nullfunc(fc))
1558                 return false;
1559         if (ieee80211_is_qos_nullfunc(fc))
1560                 return false;
1561         if (ieee80211_is_pspoll(fc))
1562                 return false;
1563         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1564                 return false;
1565         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1566                 return false;
1567         if (tid > 7)
1568                 return false;
1569
1570         /* maybe every tid should be checked */
1571         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1572                 return false;
1573
1574         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1575         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1576         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1577
1578         return true;
1579 }
1580
1581 static int rtl_pci_tx(struct ieee80211_hw *hw,
1582                       struct ieee80211_sta *sta,
1583                       struct sk_buff *skb,
1584                       struct rtl_tcb_desc *ptcb_desc)
1585 {
1586         struct rtl_priv *rtlpriv = rtl_priv(hw);
1587         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1588         struct rtl8192_tx_ring *ring;
1589         struct rtl_tx_desc *pdesc;
1590         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1591         u16 idx;
1592         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1593         unsigned long flags;
1594         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1595         __le16 fc = rtl_get_fc(skb);
1596         u8 *pda_addr = hdr->addr1;
1597         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1598         u8 own;
1599         u8 temp_one = 1;
1600
1601         if (ieee80211_is_mgmt(fc))
1602                 rtl_tx_mgmt_proc(hw, skb);
1603
1604         if (rtlpriv->psc.sw_ps_enabled) {
1605                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1606                     !ieee80211_has_pm(fc))
1607                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1608         }
1609
1610         rtl_action_proc(hw, skb, true);
1611
1612         if (is_multicast_ether_addr(pda_addr))
1613                 rtlpriv->stats.txbytesmulticast += skb->len;
1614         else if (is_broadcast_ether_addr(pda_addr))
1615                 rtlpriv->stats.txbytesbroadcast += skb->len;
1616         else
1617                 rtlpriv->stats.txbytesunicast += skb->len;
1618
1619         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1620         ring = &rtlpci->tx_ring[hw_queue];
1621         if (hw_queue != BEACON_QUEUE) {
1622                 if (rtlpriv->use_new_trx_flow)
1623                         idx = ring->cur_tx_wp;
1624                 else
1625                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1626                               ring->entries;
1627         } else {
1628                 idx = 0;
1629         }
1630
1631         pdesc = &ring->desc[idx];
1632         if (rtlpriv->use_new_trx_flow) {
1633                 ptx_bd_desc = &ring->buffer_desc[idx];
1634         } else {
1635                 own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
1636                                 true, HW_DESC_OWN);
1637
1638                 if (own == 1 && hw_queue != BEACON_QUEUE) {
1639                         rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1640                                 "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1641                                 hw_queue, ring->idx, idx,
1642                                 skb_queue_len(&ring->queue));
1643
1644                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1645                                                flags);
1646                         return skb->len;
1647                 }
1648         }
1649
1650         if (rtlpriv->cfg->ops->get_available_desc &&
1651             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1652                 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1653                         "get_available_desc fail\n");
1654                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1655                 return skb->len;
1656         }
1657
1658         if (ieee80211_is_data(fc))
1659                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1660
1661         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1662                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1663
1664         __skb_queue_tail(&ring->queue, skb);
1665
1666         if (rtlpriv->use_new_trx_flow) {
1667                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1668                                             HW_DESC_OWN, &hw_queue);
1669         } else {
1670                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1671                                             HW_DESC_OWN, &temp_one);
1672         }
1673
1674         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1675             hw_queue != BEACON_QUEUE) {
1676                 rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
1677                         "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1678                          hw_queue, ring->idx, idx,
1679                          skb_queue_len(&ring->queue));
1680
1681                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1682         }
1683
1684         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1685
1686         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1687
1688         return 0;
1689 }
1690
1691 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1692 {
1693         struct rtl_priv *rtlpriv = rtl_priv(hw);
1694         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1695         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1696         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1697         u16 i = 0;
1698         int queue_id;
1699         struct rtl8192_tx_ring *ring;
1700
1701         if (mac->skip_scan)
1702                 return;
1703
1704         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1705                 u32 queue_len;
1706
1707                 if (((queues >> queue_id) & 0x1) == 0) {
1708                         queue_id--;
1709                         continue;
1710                 }
1711                 ring = &pcipriv->dev.tx_ring[queue_id];
1712                 queue_len = skb_queue_len(&ring->queue);
1713                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1714                     queue_id == TXCMD_QUEUE) {
1715                         queue_id--;
1716                         continue;
1717                 } else {
1718                         msleep(20);
1719                         i++;
1720                 }
1721
1722                 /* we just wait 1s for all queues */
1723                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1724                     is_hal_stop(rtlhal) || i >= 200)
1725                         return;
1726         }
1727 }
1728
1729 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1730 {
1731         struct rtl_priv *rtlpriv = rtl_priv(hw);
1732         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1733
1734         _rtl_pci_deinit_trx_ring(hw);
1735
1736         synchronize_irq(rtlpci->pdev->irq);
1737         tasklet_kill(&rtlpriv->works.irq_tasklet);
1738         cancel_work_sync(&rtlpriv->works.lps_change_work);
1739
1740         destroy_workqueue(rtlpriv->works.rtl_wq);
1741 }
1742
1743 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1744 {
1745         int err;
1746
1747         _rtl_pci_init_struct(hw, pdev);
1748
1749         err = _rtl_pci_init_trx_ring(hw);
1750         if (err) {
1751                 pr_err("tx ring initialization failed\n");
1752                 return err;
1753         }
1754
1755         return 0;
1756 }
1757
1758 static int rtl_pci_start(struct ieee80211_hw *hw)
1759 {
1760         struct rtl_priv *rtlpriv = rtl_priv(hw);
1761         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1762         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1763         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1764         struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
1765         struct rtl_btc_ops *btc_ops = rtlpriv->btcoexist.btc_ops;
1766
1767         int err;
1768
1769         rtl_pci_reset_trx_ring(hw);
1770
1771         rtlpci->driver_is_goingto_unload = false;
1772         if (rtlpriv->cfg->ops->get_btc_status &&
1773             rtlpriv->cfg->ops->get_btc_status()) {
1774                 rtlpriv->btcoexist.btc_info.ap_num = 36;
1775                 btc_ops->btc_init_variables(rtlpriv);
1776                 btc_ops->btc_init_hal_vars(rtlpriv);
1777         } else if (btc_ops) {
1778                 btc_ops->btc_init_variables_wifi_only(rtlpriv);
1779         }
1780
1781         err = rtlpriv->cfg->ops->hw_init(hw);
1782         if (err) {
1783                 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1784                         "Failed to config hardware!\n");
1785                 kfree(rtlpriv->btcoexist.btc_context);
1786                 kfree(rtlpriv->btcoexist.wifi_only_context);
1787                 return err;
1788         }
1789         rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
1790                         &rtlmac->retry_long);
1791
1792         rtlpriv->cfg->ops->enable_interrupt(hw);
1793         rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1794
1795         rtl_init_rx_config(hw);
1796
1797         /*should be after adapter start and interrupt enable. */
1798         set_hal_start(rtlhal);
1799
1800         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1801
1802         rtlpci->up_first_time = false;
1803
1804         rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "%s OK\n", __func__);
1805         return 0;
1806 }
1807
1808 static void rtl_pci_stop(struct ieee80211_hw *hw)
1809 {
1810         struct rtl_priv *rtlpriv = rtl_priv(hw);
1811         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1812         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1813         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1814         unsigned long flags;
1815         u8 rf_timeout = 0;
1816
1817         if (rtlpriv->cfg->ops->get_btc_status())
1818                 rtlpriv->btcoexist.btc_ops->btc_halt_notify(rtlpriv);
1819
1820         if (rtlpriv->btcoexist.btc_ops)
1821                 rtlpriv->btcoexist.btc_ops->btc_deinit_variables(rtlpriv);
1822
1823         /*should be before disable interrupt&adapter
1824          *and will do it immediately.
1825          */
1826         set_hal_stop(rtlhal);
1827
1828         rtlpci->driver_is_goingto_unload = true;
1829         rtlpriv->cfg->ops->disable_interrupt(hw);
1830         cancel_work_sync(&rtlpriv->works.lps_change_work);
1831
1832         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1833         while (ppsc->rfchange_inprogress) {
1834                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1835                 if (rf_timeout > 100) {
1836                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1837                         break;
1838                 }
1839                 mdelay(1);
1840                 rf_timeout++;
1841                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1842         }
1843         ppsc->rfchange_inprogress = true;
1844         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1845
1846         rtlpriv->cfg->ops->hw_disable(hw);
1847         /* some things are not needed if firmware not available */
1848         if (!rtlpriv->max_fw_size)
1849                 return;
1850         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1851
1852         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1853         ppsc->rfchange_inprogress = false;
1854         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1855
1856         rtl_pci_enable_aspm(hw);
1857 }
1858
1859 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1860                                   struct ieee80211_hw *hw)
1861 {
1862         struct rtl_priv *rtlpriv = rtl_priv(hw);
1863         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1864         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1865         struct pci_dev *bridge_pdev = pdev->bus->self;
1866         u16 venderid;
1867         u16 deviceid;
1868         u8 revisionid;
1869         u16 irqline;
1870         u8 tmp;
1871
1872         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1873         venderid = pdev->vendor;
1874         deviceid = pdev->device;
1875         pci_read_config_byte(pdev, 0x8, &revisionid);
1876         pci_read_config_word(pdev, 0x3C, &irqline);
1877
1878         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1879          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1880          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1881          * the correct driver is r8192e_pci, thus this routine should
1882          * return false.
1883          */
1884         if (deviceid == RTL_PCI_8192SE_DID &&
1885             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1886                 return false;
1887
1888         if (deviceid == RTL_PCI_8192_DID ||
1889             deviceid == RTL_PCI_0044_DID ||
1890             deviceid == RTL_PCI_0047_DID ||
1891             deviceid == RTL_PCI_8192SE_DID ||
1892             deviceid == RTL_PCI_8174_DID ||
1893             deviceid == RTL_PCI_8173_DID ||
1894             deviceid == RTL_PCI_8172_DID ||
1895             deviceid == RTL_PCI_8171_DID) {
1896                 switch (revisionid) {
1897                 case RTL_PCI_REVISION_ID_8192PCIE:
1898                         rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1899                                 "8192 PCI-E is found - vid/did=%x/%x\n",
1900                                 venderid, deviceid);
1901                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1902                         return false;
1903                 case RTL_PCI_REVISION_ID_8192SE:
1904                         rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1905                                 "8192SE is found - vid/did=%x/%x\n",
1906                                 venderid, deviceid);
1907                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1908                         break;
1909                 default:
1910                         rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1911                                 "Err: Unknown device - vid/did=%x/%x\n",
1912                                 venderid, deviceid);
1913                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1914                         break;
1915                 }
1916         } else if (deviceid == RTL_PCI_8723AE_DID) {
1917                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1918                 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1919                         "8723AE PCI-E is found - vid/did=%x/%x\n",
1920                         venderid, deviceid);
1921         } else if (deviceid == RTL_PCI_8192CET_DID ||
1922                    deviceid == RTL_PCI_8192CE_DID ||
1923                    deviceid == RTL_PCI_8191CE_DID ||
1924                    deviceid == RTL_PCI_8188CE_DID) {
1925                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1926                 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1927                         "8192C PCI-E is found - vid/did=%x/%x\n",
1928                         venderid, deviceid);
1929         } else if (deviceid == RTL_PCI_8192DE_DID ||
1930                    deviceid == RTL_PCI_8192DE_DID2) {
1931                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1932                 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1933                         "8192D PCI-E is found - vid/did=%x/%x\n",
1934                         venderid, deviceid);
1935         } else if (deviceid == RTL_PCI_8188EE_DID) {
1936                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1937                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1938                         "Find adapter, Hardware type is 8188EE\n");
1939         } else if (deviceid == RTL_PCI_8723BE_DID) {
1940                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1941                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1942                         "Find adapter, Hardware type is 8723BE\n");
1943         } else if (deviceid == RTL_PCI_8192EE_DID) {
1944                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1945                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1946                         "Find adapter, Hardware type is 8192EE\n");
1947         } else if (deviceid == RTL_PCI_8821AE_DID) {
1948                 rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
1949                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1950                         "Find adapter, Hardware type is 8821AE\n");
1951         } else if (deviceid == RTL_PCI_8812AE_DID) {
1952                 rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
1953                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1954                         "Find adapter, Hardware type is 8812AE\n");
1955         } else if (deviceid == RTL_PCI_8822BE_DID) {
1956                 rtlhal->hw_type = HARDWARE_TYPE_RTL8822BE;
1957                 rtlhal->bandset = BAND_ON_BOTH;
1958                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1959                         "Find adapter, Hardware type is 8822BE\n");
1960         } else {
1961                 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1962                         "Err: Unknown device - vid/did=%x/%x\n",
1963                          venderid, deviceid);
1964
1965                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1966         }
1967
1968         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1969                 if (revisionid == 0 || revisionid == 1) {
1970                         if (revisionid == 0) {
1971                                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1972                                         "Find 92DE MAC0\n");
1973                                 rtlhal->interfaceindex = 0;
1974                         } else if (revisionid == 1) {
1975                                 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1976                                         "Find 92DE MAC1\n");
1977                                 rtlhal->interfaceindex = 1;
1978                         }
1979                 } else {
1980                         rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1981                                 "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
1982                                  venderid, deviceid, revisionid);
1983                         rtlhal->interfaceindex = 0;
1984                 }
1985         }
1986
1987         switch (rtlhal->hw_type) {
1988         case HARDWARE_TYPE_RTL8192EE:
1989         case HARDWARE_TYPE_RTL8822BE:
1990                 /* use new trx flow */
1991                 rtlpriv->use_new_trx_flow = true;
1992                 break;
1993
1994         default:
1995                 rtlpriv->use_new_trx_flow = false;
1996                 break;
1997         }
1998
1999         /*find bus info */
2000         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2001         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2002         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2003
2004         /*find bridge info */
2005         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2006         /* some ARM have no bridge_pdev and will crash here
2007          * so we should check if bridge_pdev is NULL
2008          */
2009         if (bridge_pdev) {
2010                 /*find bridge info if available */
2011                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2012                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2013                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2014                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2015                                 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
2016                                         "Pci Bridge Vendor is found index: %d\n",
2017                                         tmp);
2018                                 break;
2019                         }
2020                 }
2021         }
2022
2023         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2024                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2025                 pcipriv->ndis_adapter.pcibridge_busnum =
2026                     bridge_pdev->bus->number;
2027                 pcipriv->ndis_adapter.pcibridge_devnum =
2028                     PCI_SLOT(bridge_pdev->devfn);
2029                 pcipriv->ndis_adapter.pcibridge_funcnum =
2030                     PCI_FUNC(bridge_pdev->devfn);
2031                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2032                     pci_pcie_cap(bridge_pdev);
2033                 pcipriv->ndis_adapter.num4bytes =
2034                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2035
2036                 rtl_pci_get_linkcontrol_field(hw);
2037
2038                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2039                     PCI_BRIDGE_VENDOR_AMD) {
2040                         pcipriv->ndis_adapter.amd_l1_patch =
2041                             rtl_pci_get_amd_l1_patch(hw);
2042                 }
2043         }
2044
2045         rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
2046                 "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2047                 pcipriv->ndis_adapter.busnumber,
2048                 pcipriv->ndis_adapter.devnumber,
2049                 pcipriv->ndis_adapter.funcnumber,
2050                 pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2051
2052         rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
2053                 "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2054                 pcipriv->ndis_adapter.pcibridge_busnum,
2055                 pcipriv->ndis_adapter.pcibridge_devnum,
2056                 pcipriv->ndis_adapter.pcibridge_funcnum,
2057                 pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2058                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2059                 pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2060                 pcipriv->ndis_adapter.amd_l1_patch);
2061
2062         rtl_pci_parse_configuration(pdev, hw);
2063         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2064
2065         return true;
2066 }
2067
2068 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2069 {
2070         struct rtl_priv *rtlpriv = rtl_priv(hw);
2071         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2072         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2073         int ret;
2074
2075         ret = pci_enable_msi(rtlpci->pdev);
2076         if (ret < 0)
2077                 return ret;
2078
2079         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2080                           IRQF_SHARED, KBUILD_MODNAME, hw);
2081         if (ret < 0) {
2082                 pci_disable_msi(rtlpci->pdev);
2083                 return ret;
2084         }
2085
2086         rtlpci->using_msi = true;
2087
2088         rtl_dbg(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2089                 "MSI Interrupt Mode!\n");
2090         return 0;
2091 }
2092
2093 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2094 {
2095         struct rtl_priv *rtlpriv = rtl_priv(hw);
2096         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2097         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2098         int ret;
2099
2100         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2101                           IRQF_SHARED, KBUILD_MODNAME, hw);
2102         if (ret < 0)
2103                 return ret;
2104
2105         rtlpci->using_msi = false;
2106         rtl_dbg(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2107                 "Pin-based Interrupt Mode!\n");
2108         return 0;
2109 }
2110
2111 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2112 {
2113         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2114         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2115         int ret;
2116
2117         if (rtlpci->msi_support) {
2118                 ret = rtl_pci_intr_mode_msi(hw);
2119                 if (ret < 0)
2120                         ret = rtl_pci_intr_mode_legacy(hw);
2121         } else {
2122                 ret = rtl_pci_intr_mode_legacy(hw);
2123         }
2124         return ret;
2125 }
2126
2127 static void platform_enable_dma64(struct pci_dev *pdev, bool dma64)
2128 {
2129         u8      value;
2130
2131         pci_read_config_byte(pdev, 0x719, &value);
2132
2133         /* 0x719 Bit5 is DMA64 bit fetch. */
2134         if (dma64)
2135                 value |= BIT(5);
2136         else
2137                 value &= ~BIT(5);
2138
2139         pci_write_config_byte(pdev, 0x719, value);
2140 }
2141
2142 int rtl_pci_probe(struct pci_dev *pdev,
2143                   const struct pci_device_id *id)
2144 {
2145         struct ieee80211_hw *hw = NULL;
2146
2147         struct rtl_priv *rtlpriv = NULL;
2148         struct rtl_pci_priv *pcipriv = NULL;
2149         struct rtl_pci *rtlpci;
2150         unsigned long pmem_start, pmem_len, pmem_flags;
2151         int err;
2152
2153         err = pci_enable_device(pdev);
2154         if (err) {
2155                 WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
2156                           pci_name(pdev));
2157                 return err;
2158         }
2159
2160         if (((struct rtl_hal_cfg *)id->driver_data)->mod_params->dma64 &&
2161             !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
2162                 if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
2163                         WARN_ONCE(true,
2164                                   "Unable to obtain 64bit DMA for consistent allocations\n");
2165                         err = -ENOMEM;
2166                         goto fail1;
2167                 }
2168
2169                 platform_enable_dma64(pdev, true);
2170         } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
2171                 if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
2172                         WARN_ONCE(true,
2173                                   "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
2174                         err = -ENOMEM;
2175                         goto fail1;
2176                 }
2177
2178                 platform_enable_dma64(pdev, false);
2179         }
2180
2181         pci_set_master(pdev);
2182
2183         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2184                                 sizeof(struct rtl_priv), &rtl_ops);
2185         if (!hw) {
2186                 WARN_ONCE(true,
2187                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2188                 err = -ENOMEM;
2189                 goto fail1;
2190         }
2191
2192         SET_IEEE80211_DEV(hw, &pdev->dev);
2193         pci_set_drvdata(pdev, hw);
2194
2195         rtlpriv = hw->priv;
2196         rtlpriv->hw = hw;
2197         pcipriv = (void *)rtlpriv->priv;
2198         pcipriv->dev.pdev = pdev;
2199         init_completion(&rtlpriv->firmware_loading_complete);
2200         /*proximity init here*/
2201         rtlpriv->proximity.proxim_on = false;
2202
2203         pcipriv = (void *)rtlpriv->priv;
2204         pcipriv->dev.pdev = pdev;
2205
2206         /* init cfg & intf_ops */
2207         rtlpriv->rtlhal.interface = INTF_PCI;
2208         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2209         rtlpriv->intf_ops = &rtl_pci_ops;
2210         rtlpriv->glb_var = &rtl_global_var;
2211         rtl_efuse_ops_init(hw);
2212
2213         /* MEM map */
2214         err = pci_request_regions(pdev, KBUILD_MODNAME);
2215         if (err) {
2216                 WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
2217                 goto fail1;
2218         }
2219
2220         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2221         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2222         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2223
2224         /*shared mem start */
2225         rtlpriv->io.pci_mem_start =
2226                         (unsigned long)pci_iomap(pdev,
2227                         rtlpriv->cfg->bar_id, pmem_len);
2228         if (rtlpriv->io.pci_mem_start == 0) {
2229                 WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
2230                 err = -ENOMEM;
2231                 goto fail2;
2232         }
2233
2234         rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
2235                 "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2236                 pmem_start, pmem_len, pmem_flags,
2237                 rtlpriv->io.pci_mem_start);
2238
2239         /* Disable Clk Request */
2240         pci_write_config_byte(pdev, 0x81, 0);
2241         /* leave D3 mode */
2242         pci_write_config_byte(pdev, 0x44, 0);
2243         pci_write_config_byte(pdev, 0x04, 0x06);
2244         pci_write_config_byte(pdev, 0x04, 0x07);
2245
2246         /* find adapter */
2247         if (!_rtl_pci_find_adapter(pdev, hw)) {
2248                 err = -ENODEV;
2249                 goto fail2;
2250         }
2251
2252         /* Init IO handler */
2253         _rtl_pci_io_handler_init(&pdev->dev, hw);
2254
2255         /*like read eeprom and so on */
2256         rtlpriv->cfg->ops->read_eeprom_info(hw);
2257
2258         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2259                 pr_err("Can't init_sw_vars\n");
2260                 err = -ENODEV;
2261                 goto fail3;
2262         }
2263         rtl_init_sw_leds(hw);
2264
2265         /*aspm */
2266         rtl_pci_init_aspm(hw);
2267
2268         /* Init mac80211 sw */
2269         err = rtl_init_core(hw);
2270         if (err) {
2271                 pr_err("Can't allocate sw for mac80211\n");
2272                 goto fail3;
2273         }
2274
2275         /* Init PCI sw */
2276         err = rtl_pci_init(hw, pdev);
2277         if (err) {
2278                 pr_err("Failed to init PCI\n");
2279                 goto fail3;
2280         }
2281
2282         err = ieee80211_register_hw(hw);
2283         if (err) {
2284                 pr_err("Can't register mac80211 hw.\n");
2285                 err = -ENODEV;
2286                 goto fail3;
2287         }
2288         rtlpriv->mac80211.mac80211_registered = 1;
2289
2290         /* add for debug */
2291         rtl_debug_add_one(hw);
2292
2293         /*init rfkill */
2294         rtl_init_rfkill(hw);    /* Init PCI sw */
2295
2296         rtlpci = rtl_pcidev(pcipriv);
2297         err = rtl_pci_intr_mode_decide(hw);
2298         if (err) {
2299                 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
2300                         "%s: failed to register IRQ handler\n",
2301                         wiphy_name(hw->wiphy));
2302                 goto fail3;
2303         }
2304         rtlpci->irq_alloc = 1;
2305
2306         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2307         return 0;
2308
2309 fail3:
2310         pci_set_drvdata(pdev, NULL);
2311         rtl_deinit_core(hw);
2312
2313 fail2:
2314         if (rtlpriv->io.pci_mem_start != 0)
2315                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2316
2317         pci_release_regions(pdev);
2318         complete(&rtlpriv->firmware_loading_complete);
2319
2320 fail1:
2321         if (hw)
2322                 ieee80211_free_hw(hw);
2323         pci_disable_device(pdev);
2324
2325         return err;
2326 }
2327 EXPORT_SYMBOL(rtl_pci_probe);
2328
2329 void rtl_pci_disconnect(struct pci_dev *pdev)
2330 {
2331         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2332         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2333         struct rtl_priv *rtlpriv = rtl_priv(hw);
2334         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2335         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2336
2337         /* just in case driver is removed before firmware callback */
2338         wait_for_completion(&rtlpriv->firmware_loading_complete);
2339         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2340
2341         /* remove form debug */
2342         rtl_debug_remove_one(hw);
2343
2344         /*ieee80211_unregister_hw will call ops_stop */
2345         if (rtlmac->mac80211_registered == 1) {
2346                 ieee80211_unregister_hw(hw);
2347                 rtlmac->mac80211_registered = 0;
2348         } else {
2349                 rtl_deinit_deferred_work(hw, false);
2350                 rtlpriv->intf_ops->adapter_stop(hw);
2351         }
2352         rtlpriv->cfg->ops->disable_interrupt(hw);
2353
2354         /*deinit rfkill */
2355         rtl_deinit_rfkill(hw);
2356
2357         rtl_pci_deinit(hw);
2358         rtl_deinit_core(hw);
2359         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2360
2361         if (rtlpci->irq_alloc) {
2362                 free_irq(rtlpci->pdev->irq, hw);
2363                 rtlpci->irq_alloc = 0;
2364         }
2365
2366         if (rtlpci->using_msi)
2367                 pci_disable_msi(rtlpci->pdev);
2368
2369         list_del(&rtlpriv->list);
2370         if (rtlpriv->io.pci_mem_start != 0) {
2371                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2372                 pci_release_regions(pdev);
2373         }
2374
2375         pci_disable_device(pdev);
2376
2377         rtl_pci_disable_aspm(hw);
2378
2379         pci_set_drvdata(pdev, NULL);
2380
2381         ieee80211_free_hw(hw);
2382 }
2383 EXPORT_SYMBOL(rtl_pci_disconnect);
2384
2385 #ifdef CONFIG_PM_SLEEP
2386 /***************************************
2387  * kernel pci power state define:
2388  * PCI_D0         ((pci_power_t __force) 0)
2389  * PCI_D1         ((pci_power_t __force) 1)
2390  * PCI_D2         ((pci_power_t __force) 2)
2391  * PCI_D3hot      ((pci_power_t __force) 3)
2392  * PCI_D3cold     ((pci_power_t __force) 4)
2393  * PCI_UNKNOWN    ((pci_power_t __force) 5)
2394
2395  * This function is called when system
2396  * goes into suspend state mac80211 will
2397  * call rtl_mac_stop() from the mac80211
2398  * suspend function first, So there is
2399  * no need to call hw_disable here.
2400  ****************************************/
2401 int rtl_pci_suspend(struct device *dev)
2402 {
2403         struct ieee80211_hw *hw = dev_get_drvdata(dev);
2404         struct rtl_priv *rtlpriv = rtl_priv(hw);
2405
2406         rtlpriv->cfg->ops->hw_suspend(hw);
2407         rtl_deinit_rfkill(hw);
2408
2409         return 0;
2410 }
2411 EXPORT_SYMBOL(rtl_pci_suspend);
2412
2413 int rtl_pci_resume(struct device *dev)
2414 {
2415         struct ieee80211_hw *hw = dev_get_drvdata(dev);
2416         struct rtl_priv *rtlpriv = rtl_priv(hw);
2417
2418         rtlpriv->cfg->ops->hw_resume(hw);
2419         rtl_init_rfkill(hw);
2420         return 0;
2421 }
2422 EXPORT_SYMBOL(rtl_pci_resume);
2423 #endif /* CONFIG_PM_SLEEP */
2424
2425 const struct rtl_intf_ops rtl_pci_ops = {
2426         .read_efuse_byte = read_efuse_byte,
2427         .adapter_start = rtl_pci_start,
2428         .adapter_stop = rtl_pci_stop,
2429         .check_buddy_priv = rtl_pci_check_buddy_priv,
2430         .adapter_tx = rtl_pci_tx,
2431         .flush = rtl_pci_flush,
2432         .reset_trx_ring = rtl_pci_reset_trx_ring,
2433         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2434
2435         .disable_aspm = rtl_pci_disable_aspm,
2436         .enable_aspm = rtl_pci_enable_aspm,
2437 };