1 // SPDX-License-Identifier: GPL-2.0
5 /* Copyright (c) 2020-2022, Alibaba Group. */
8 /* Copyright (c) 2008-2019, IBM Corporation */
10 /* Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. */
12 #include <linux/vmalloc.h>
13 #include <net/addrconf.h>
14 #include <rdma/erdma-abi.h>
15 #include <rdma/ib_umem.h>
16 #include <rdma/uverbs_ioctl.h>
20 #include "erdma_verbs.h"
22 static int create_qp_cmd(struct erdma_ucontext *uctx, struct erdma_qp *qp)
24 struct erdma_dev *dev = to_edev(qp->ibqp.device);
25 struct erdma_pd *pd = to_epd(qp->ibqp.pd);
26 struct erdma_cmdq_create_qp_req req;
27 struct erdma_uqp *user_qp;
31 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
32 CMDQ_OPCODE_CREATE_QP);
34 req.cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_QP_SQ_DEPTH_MASK,
35 ilog2(qp->attrs.sq_size)) |
36 FIELD_PREP(ERDMA_CMD_CREATE_QP_QPN_MASK, QP_ID(qp));
37 req.cfg1 = FIELD_PREP(ERDMA_CMD_CREATE_QP_RQ_DEPTH_MASK,
38 ilog2(qp->attrs.rq_size)) |
39 FIELD_PREP(ERDMA_CMD_CREATE_QP_PD_MASK, pd->pdn);
41 if (rdma_is_kernel_res(&qp->ibqp.res)) {
42 u32 pgsz_range = ilog2(SZ_1M) - ERDMA_HW_PAGE_SHIFT;
45 FIELD_PREP(ERDMA_CMD_CREATE_QP_PAGE_SIZE_MASK,
47 FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->scq->cqn);
49 FIELD_PREP(ERDMA_CMD_CREATE_QP_PAGE_SIZE_MASK,
51 FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->rcq->cqn);
54 FIELD_PREP(ERDMA_CMD_CREATE_QP_PAGE_OFFSET_MASK, 0) |
55 FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_CNT_MASK, 1) |
56 FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_TYPE_MASK,
58 req.rq_mtt_cfg = req.sq_mtt_cfg;
60 req.rq_buf_addr = qp->kern_qp.rq_buf_dma_addr;
61 req.sq_buf_addr = qp->kern_qp.sq_buf_dma_addr;
62 req.sq_db_info_dma_addr = qp->kern_qp.sq_buf_dma_addr +
63 (qp->attrs.sq_size << SQEBB_SHIFT);
64 req.rq_db_info_dma_addr = qp->kern_qp.rq_buf_dma_addr +
65 (qp->attrs.rq_size << RQE_SHIFT);
67 user_qp = &qp->user_qp;
68 req.sq_cqn_mtt_cfg = FIELD_PREP(
69 ERDMA_CMD_CREATE_QP_PAGE_SIZE_MASK,
70 ilog2(user_qp->sq_mtt.page_size) - ERDMA_HW_PAGE_SHIFT);
72 FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->scq->cqn);
74 req.rq_cqn_mtt_cfg = FIELD_PREP(
75 ERDMA_CMD_CREATE_QP_PAGE_SIZE_MASK,
76 ilog2(user_qp->rq_mtt.page_size) - ERDMA_HW_PAGE_SHIFT);
78 FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->rcq->cqn);
80 req.sq_mtt_cfg = user_qp->sq_mtt.page_offset;
81 req.sq_mtt_cfg |= FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_CNT_MASK,
82 user_qp->sq_mtt.mtt_nents) |
83 FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_TYPE_MASK,
84 user_qp->sq_mtt.mtt_type);
86 req.rq_mtt_cfg = user_qp->rq_mtt.page_offset;
87 req.rq_mtt_cfg |= FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_CNT_MASK,
88 user_qp->rq_mtt.mtt_nents) |
89 FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_TYPE_MASK,
90 user_qp->rq_mtt.mtt_type);
92 req.sq_buf_addr = user_qp->sq_mtt.mtt_entry[0];
93 req.rq_buf_addr = user_qp->rq_mtt.mtt_entry[0];
95 req.sq_db_info_dma_addr = user_qp->sq_db_info_dma_addr;
96 req.rq_db_info_dma_addr = user_qp->rq_db_info_dma_addr;
98 if (uctx->ext_db.enable) {
100 FIELD_PREP(ERDMA_CMD_CREATE_QP_DB_CFG_MASK, 1);
102 FIELD_PREP(ERDMA_CMD_CREATE_QP_SQDB_CFG_MASK,
103 uctx->ext_db.sdb_off) |
104 FIELD_PREP(ERDMA_CMD_CREATE_QP_RQDB_CFG_MASK,
105 uctx->ext_db.rdb_off);
109 err = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), &resp0,
113 FIELD_GET(ERDMA_CMDQ_CREATE_QP_RESP_COOKIE_MASK, resp0);
118 static int regmr_cmd(struct erdma_dev *dev, struct erdma_mr *mr)
120 struct erdma_cmdq_reg_mr_req req;
121 struct erdma_pd *pd = to_epd(mr->ibmr.pd);
125 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA, CMDQ_OPCODE_REG_MR);
127 req.cfg0 = FIELD_PREP(ERDMA_CMD_MR_VALID_MASK, mr->valid) |
128 FIELD_PREP(ERDMA_CMD_MR_KEY_MASK, mr->ibmr.lkey & 0xFF) |
129 FIELD_PREP(ERDMA_CMD_MR_MPT_IDX_MASK, mr->ibmr.lkey >> 8);
130 req.cfg1 = FIELD_PREP(ERDMA_CMD_REGMR_PD_MASK, pd->pdn) |
131 FIELD_PREP(ERDMA_CMD_REGMR_TYPE_MASK, mr->type) |
132 FIELD_PREP(ERDMA_CMD_REGMR_RIGHT_MASK, mr->access);
133 req.cfg2 = FIELD_PREP(ERDMA_CMD_REGMR_PAGESIZE_MASK,
134 ilog2(mr->mem.page_size)) |
135 FIELD_PREP(ERDMA_CMD_REGMR_MTT_TYPE_MASK, mr->mem.mtt_type) |
136 FIELD_PREP(ERDMA_CMD_REGMR_MTT_CNT_MASK, mr->mem.page_cnt);
138 if (mr->type == ERDMA_MR_TYPE_DMA)
141 if (mr->type == ERDMA_MR_TYPE_NORMAL) {
142 req.start_va = mr->mem.va;
143 req.size = mr->mem.len;
146 if (mr->type == ERDMA_MR_TYPE_FRMR ||
147 mr->mem.mtt_type == ERDMA_MR_INDIRECT_MTT) {
148 phy_addr = req.phy_addr;
149 *phy_addr = mr->mem.mtt_entry[0];
151 phy_addr = req.phy_addr;
152 for (i = 0; i < mr->mem.mtt_nents; i++)
153 *phy_addr++ = mr->mem.mtt_entry[i];
157 return erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
160 static int create_cq_cmd(struct erdma_ucontext *uctx, struct erdma_cq *cq)
162 struct erdma_dev *dev = to_edev(cq->ibcq.device);
163 struct erdma_cmdq_create_cq_req req;
164 struct erdma_mem *mtt;
167 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
168 CMDQ_OPCODE_CREATE_CQ);
170 req.cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_CQN_MASK, cq->cqn) |
171 FIELD_PREP(ERDMA_CMD_CREATE_CQ_DEPTH_MASK, ilog2(cq->depth));
172 req.cfg1 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_EQN_MASK, cq->assoc_eqn);
174 if (rdma_is_kernel_res(&cq->ibcq.res)) {
176 req.cfg0 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_PAGESIZE_MASK,
177 ilog2(page_size) - ERDMA_HW_PAGE_SHIFT);
178 req.qbuf_addr_l = lower_32_bits(cq->kern_cq.qbuf_dma_addr);
179 req.qbuf_addr_h = upper_32_bits(cq->kern_cq.qbuf_dma_addr);
181 req.cfg1 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_CNT_MASK, 1) |
182 FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_TYPE_MASK,
183 ERDMA_MR_INLINE_MTT);
185 req.first_page_offset = 0;
186 req.cq_db_info_addr =
187 cq->kern_cq.qbuf_dma_addr + (cq->depth << CQE_SHIFT);
189 mtt = &cq->user_cq.qbuf_mtt;
191 FIELD_PREP(ERDMA_CMD_CREATE_CQ_PAGESIZE_MASK,
192 ilog2(mtt->page_size) - ERDMA_HW_PAGE_SHIFT);
193 if (mtt->mtt_nents == 1) {
194 req.qbuf_addr_l = lower_32_bits(*(u64 *)mtt->mtt_buf);
195 req.qbuf_addr_h = upper_32_bits(*(u64 *)mtt->mtt_buf);
197 req.qbuf_addr_l = lower_32_bits(mtt->mtt_entry[0]);
198 req.qbuf_addr_h = upper_32_bits(mtt->mtt_entry[0]);
200 req.cfg1 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_CNT_MASK,
202 req.cfg1 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_TYPE_MASK,
205 req.first_page_offset = mtt->page_offset;
206 req.cq_db_info_addr = cq->user_cq.db_info_dma_addr;
208 if (uctx->ext_db.enable) {
209 req.cfg1 |= FIELD_PREP(
210 ERDMA_CMD_CREATE_CQ_MTT_DB_CFG_MASK, 1);
211 req.cfg2 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_DB_CFG_MASK,
212 uctx->ext_db.cdb_off);
216 return erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
219 static int erdma_alloc_idx(struct erdma_resource_cb *res_cb)
224 spin_lock_irqsave(&res_cb->lock, flags);
225 idx = find_next_zero_bit(res_cb->bitmap, res_cb->max_cap,
226 res_cb->next_alloc_idx);
227 if (idx == res_cb->max_cap) {
228 idx = find_first_zero_bit(res_cb->bitmap, res_cb->max_cap);
229 if (idx == res_cb->max_cap) {
230 res_cb->next_alloc_idx = 1;
231 spin_unlock_irqrestore(&res_cb->lock, flags);
236 set_bit(idx, res_cb->bitmap);
237 res_cb->next_alloc_idx = idx + 1;
238 spin_unlock_irqrestore(&res_cb->lock, flags);
243 static inline void erdma_free_idx(struct erdma_resource_cb *res_cb, u32 idx)
248 spin_lock_irqsave(&res_cb->lock, flags);
249 used = __test_and_clear_bit(idx, res_cb->bitmap);
250 spin_unlock_irqrestore(&res_cb->lock, flags);
254 static struct rdma_user_mmap_entry *
255 erdma_user_mmap_entry_insert(struct erdma_ucontext *uctx, void *address,
256 u32 size, u8 mmap_flag, u64 *mmap_offset)
258 struct erdma_user_mmap_entry *entry =
259 kzalloc(sizeof(*entry), GFP_KERNEL);
265 entry->address = (u64)address;
266 entry->mmap_flag = mmap_flag;
268 size = PAGE_ALIGN(size);
270 ret = rdma_user_mmap_entry_insert(&uctx->ibucontext, &entry->rdma_entry,
277 *mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
279 return &entry->rdma_entry;
282 int erdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr,
283 struct ib_udata *unused)
285 struct erdma_dev *dev = to_edev(ibdev);
287 memset(attr, 0, sizeof(*attr));
289 attr->max_mr_size = dev->attrs.max_mr_size;
290 attr->vendor_id = PCI_VENDOR_ID_ALIBABA;
291 attr->vendor_part_id = dev->pdev->device;
292 attr->hw_ver = dev->pdev->revision;
293 attr->max_qp = dev->attrs.max_qp - 1;
294 attr->max_qp_wr = min(dev->attrs.max_send_wr, dev->attrs.max_recv_wr);
295 attr->max_qp_rd_atom = dev->attrs.max_ord;
296 attr->max_qp_init_rd_atom = dev->attrs.max_ird;
297 attr->max_res_rd_atom = dev->attrs.max_qp * dev->attrs.max_ird;
298 attr->device_cap_flags = IB_DEVICE_MEM_MGT_EXTENSIONS;
299 attr->kernel_cap_flags = IBK_LOCAL_DMA_LKEY;
300 ibdev->local_dma_lkey = dev->attrs.local_dma_key;
301 attr->max_send_sge = dev->attrs.max_send_sge;
302 attr->max_recv_sge = dev->attrs.max_recv_sge;
303 attr->max_sge_rd = dev->attrs.max_sge_rd;
304 attr->max_cq = dev->attrs.max_cq - 1;
305 attr->max_cqe = dev->attrs.max_cqe;
306 attr->max_mr = dev->attrs.max_mr;
307 attr->max_pd = dev->attrs.max_pd;
308 attr->max_mw = dev->attrs.max_mw;
309 attr->max_fast_reg_page_list_len = ERDMA_MAX_FRMR_PA;
310 attr->page_size_cap = ERDMA_PAGE_SIZE_SUPPORT;
312 if (dev->attrs.cap_flags & ERDMA_DEV_CAP_FLAGS_ATOMIC)
313 attr->atomic_cap = IB_ATOMIC_GLOB;
315 attr->fw_ver = dev->attrs.fw_version;
318 addrconf_addr_eui48((u8 *)&attr->sys_image_guid,
319 dev->netdev->dev_addr);
324 int erdma_query_gid(struct ib_device *ibdev, u32 port, int idx,
327 struct erdma_dev *dev = to_edev(ibdev);
329 memset(gid, 0, sizeof(*gid));
330 ether_addr_copy(gid->raw, dev->attrs.peer_addr);
335 int erdma_query_port(struct ib_device *ibdev, u32 port,
336 struct ib_port_attr *attr)
338 struct erdma_dev *dev = to_edev(ibdev);
339 struct net_device *ndev = dev->netdev;
341 memset(attr, 0, sizeof(*attr));
343 attr->gid_tbl_len = 1;
344 attr->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_DEVICE_MGMT_SUP;
345 attr->max_msg_sz = -1;
350 ib_get_eth_speed(ibdev, port, &attr->active_speed, &attr->active_width);
351 attr->max_mtu = ib_mtu_int_to_enum(ndev->mtu);
352 attr->active_mtu = ib_mtu_int_to_enum(ndev->mtu);
353 if (netif_running(ndev) && netif_carrier_ok(ndev))
354 dev->state = IB_PORT_ACTIVE;
356 dev->state = IB_PORT_DOWN;
357 attr->state = dev->state;
360 if (dev->state == IB_PORT_ACTIVE)
361 attr->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
363 attr->phys_state = IB_PORT_PHYS_STATE_DISABLED;
368 int erdma_get_port_immutable(struct ib_device *ibdev, u32 port,
369 struct ib_port_immutable *port_immutable)
371 port_immutable->gid_tbl_len = 1;
372 port_immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
377 int erdma_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
379 struct erdma_pd *pd = to_epd(ibpd);
380 struct erdma_dev *dev = to_edev(ibpd->device);
383 pdn = erdma_alloc_idx(&dev->res_cb[ERDMA_RES_TYPE_PD]);
392 int erdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
394 struct erdma_pd *pd = to_epd(ibpd);
395 struct erdma_dev *dev = to_edev(ibpd->device);
397 erdma_free_idx(&dev->res_cb[ERDMA_RES_TYPE_PD], pd->pdn);
402 static void erdma_flush_worker(struct work_struct *work)
404 struct delayed_work *dwork = to_delayed_work(work);
405 struct erdma_qp *qp =
406 container_of(dwork, struct erdma_qp, reflush_dwork);
407 struct erdma_cmdq_reflush_req req;
409 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
410 CMDQ_OPCODE_REFLUSH);
412 req.sq_pi = qp->kern_qp.sq_pi;
413 req.rq_pi = qp->kern_qp.rq_pi;
414 erdma_post_cmd_wait(&qp->dev->cmdq, &req, sizeof(req), NULL, NULL);
417 static int erdma_qp_validate_cap(struct erdma_dev *dev,
418 struct ib_qp_init_attr *attrs)
420 if ((attrs->cap.max_send_wr > dev->attrs.max_send_wr) ||
421 (attrs->cap.max_recv_wr > dev->attrs.max_recv_wr) ||
422 (attrs->cap.max_send_sge > dev->attrs.max_send_sge) ||
423 (attrs->cap.max_recv_sge > dev->attrs.max_recv_sge) ||
424 (attrs->cap.max_inline_data > ERDMA_MAX_INLINE) ||
425 !attrs->cap.max_send_wr || !attrs->cap.max_recv_wr) {
432 static int erdma_qp_validate_attr(struct erdma_dev *dev,
433 struct ib_qp_init_attr *attrs)
435 if (attrs->qp_type != IB_QPT_RC)
441 if (!attrs->send_cq || !attrs->recv_cq)
447 static void free_kernel_qp(struct erdma_qp *qp)
449 struct erdma_dev *dev = qp->dev;
451 vfree(qp->kern_qp.swr_tbl);
452 vfree(qp->kern_qp.rwr_tbl);
454 if (qp->kern_qp.sq_buf)
457 WARPPED_BUFSIZE(qp->attrs.sq_size << SQEBB_SHIFT),
458 qp->kern_qp.sq_buf, qp->kern_qp.sq_buf_dma_addr);
460 if (qp->kern_qp.rq_buf)
463 WARPPED_BUFSIZE(qp->attrs.rq_size << RQE_SHIFT),
464 qp->kern_qp.rq_buf, qp->kern_qp.rq_buf_dma_addr);
467 static int init_kernel_qp(struct erdma_dev *dev, struct erdma_qp *qp,
468 struct ib_qp_init_attr *attrs)
470 struct erdma_kqp *kqp = &qp->kern_qp;
473 if (attrs->sq_sig_type == IB_SIGNAL_ALL_WR)
481 dev->func_bar + (ERDMA_SDB_SHARED_PAGE_INDEX << PAGE_SHIFT);
482 kqp->hw_rq_db = dev->func_bar + ERDMA_BAR_RQDB_SPACE_OFFSET;
484 kqp->swr_tbl = vmalloc(qp->attrs.sq_size * sizeof(u64));
485 kqp->rwr_tbl = vmalloc(qp->attrs.rq_size * sizeof(u64));
486 if (!kqp->swr_tbl || !kqp->rwr_tbl)
489 size = (qp->attrs.sq_size << SQEBB_SHIFT) + ERDMA_EXTRA_BUFFER_SIZE;
490 kqp->sq_buf = dma_alloc_coherent(&dev->pdev->dev, size,
491 &kqp->sq_buf_dma_addr, GFP_KERNEL);
495 size = (qp->attrs.rq_size << RQE_SHIFT) + ERDMA_EXTRA_BUFFER_SIZE;
496 kqp->rq_buf = dma_alloc_coherent(&dev->pdev->dev, size,
497 &kqp->rq_buf_dma_addr, GFP_KERNEL);
501 kqp->sq_db_info = kqp->sq_buf + (qp->attrs.sq_size << SQEBB_SHIFT);
502 kqp->rq_db_info = kqp->rq_buf + (qp->attrs.rq_size << RQE_SHIFT);
511 static int get_mtt_entries(struct erdma_dev *dev, struct erdma_mem *mem,
512 u64 start, u64 len, int access, u64 virt,
513 unsigned long req_page_size, u8 force_indirect_mtt)
515 struct ib_block_iter biter;
516 uint64_t *phy_addr = NULL;
519 mem->umem = ib_umem_get(&dev->ibdev, start, len, access);
520 if (IS_ERR(mem->umem)) {
521 ret = PTR_ERR(mem->umem);
528 mem->page_size = ib_umem_find_best_pgsz(mem->umem, req_page_size, virt);
529 mem->page_offset = start & (mem->page_size - 1);
530 mem->mtt_nents = ib_umem_num_dma_blocks(mem->umem, mem->page_size);
531 mem->page_cnt = mem->mtt_nents;
533 if (mem->page_cnt > ERDMA_MAX_INLINE_MTT_ENTRIES ||
534 force_indirect_mtt) {
535 mem->mtt_type = ERDMA_MR_INDIRECT_MTT;
537 alloc_pages_exact(MTT_SIZE(mem->page_cnt), GFP_KERNEL);
542 phy_addr = mem->mtt_buf;
544 mem->mtt_type = ERDMA_MR_INLINE_MTT;
545 phy_addr = mem->mtt_entry;
548 rdma_umem_for_each_dma_block(mem->umem, &biter, mem->page_size) {
549 *phy_addr = rdma_block_iter_dma_address(&biter);
553 if (mem->mtt_type == ERDMA_MR_INDIRECT_MTT) {
555 dma_map_single(&dev->pdev->dev, mem->mtt_buf,
556 MTT_SIZE(mem->page_cnt), DMA_TO_DEVICE);
557 if (dma_mapping_error(&dev->pdev->dev, mem->mtt_entry[0])) {
558 free_pages_exact(mem->mtt_buf, MTT_SIZE(mem->page_cnt));
569 ib_umem_release(mem->umem);
576 static void put_mtt_entries(struct erdma_dev *dev, struct erdma_mem *mem)
579 dma_unmap_single(&dev->pdev->dev, mem->mtt_entry[0],
580 MTT_SIZE(mem->page_cnt), DMA_TO_DEVICE);
581 free_pages_exact(mem->mtt_buf, MTT_SIZE(mem->page_cnt));
585 ib_umem_release(mem->umem);
590 static int erdma_map_user_dbrecords(struct erdma_ucontext *ctx,
592 struct erdma_user_dbrecords_page **dbr_page,
593 dma_addr_t *dma_addr)
595 struct erdma_user_dbrecords_page *page = NULL;
598 mutex_lock(&ctx->dbrecords_page_mutex);
600 list_for_each_entry(page, &ctx->dbrecords_page_list, list)
601 if (page->va == (dbrecords_va & PAGE_MASK))
604 page = kmalloc(sizeof(*page), GFP_KERNEL);
610 page->va = (dbrecords_va & PAGE_MASK);
613 page->umem = ib_umem_get(ctx->ibucontext.device,
614 dbrecords_va & PAGE_MASK, PAGE_SIZE, 0);
615 if (IS_ERR(page->umem)) {
616 rv = PTR_ERR(page->umem);
621 list_add(&page->list, &ctx->dbrecords_page_list);
624 *dma_addr = sg_dma_address(page->umem->sgt_append.sgt.sgl) +
625 (dbrecords_va & ~PAGE_MASK);
630 mutex_unlock(&ctx->dbrecords_page_mutex);
635 erdma_unmap_user_dbrecords(struct erdma_ucontext *ctx,
636 struct erdma_user_dbrecords_page **dbr_page)
638 if (!ctx || !(*dbr_page))
641 mutex_lock(&ctx->dbrecords_page_mutex);
642 if (--(*dbr_page)->refcnt == 0) {
643 list_del(&(*dbr_page)->list);
644 ib_umem_release((*dbr_page)->umem);
649 mutex_unlock(&ctx->dbrecords_page_mutex);
652 static int init_user_qp(struct erdma_qp *qp, struct erdma_ucontext *uctx,
653 u64 va, u32 len, u64 db_info_va)
655 dma_addr_t db_info_dma_addr;
659 if (len < (ALIGN(qp->attrs.sq_size * SQEBB_SIZE, ERDMA_HW_PAGE_SIZE) +
660 qp->attrs.rq_size * RQE_SIZE))
663 ret = get_mtt_entries(qp->dev, &qp->user_qp.sq_mtt, va,
664 qp->attrs.sq_size << SQEBB_SHIFT, 0, va,
669 rq_offset = ALIGN(qp->attrs.sq_size << SQEBB_SHIFT, ERDMA_HW_PAGE_SIZE);
670 qp->user_qp.rq_offset = rq_offset;
672 ret = get_mtt_entries(qp->dev, &qp->user_qp.rq_mtt, va + rq_offset,
673 qp->attrs.rq_size << RQE_SHIFT, 0, va + rq_offset,
678 ret = erdma_map_user_dbrecords(uctx, db_info_va,
679 &qp->user_qp.user_dbr_page,
684 qp->user_qp.sq_db_info_dma_addr = db_info_dma_addr;
685 qp->user_qp.rq_db_info_dma_addr = db_info_dma_addr + ERDMA_DB_SIZE;
690 put_mtt_entries(qp->dev, &qp->user_qp.rq_mtt);
693 put_mtt_entries(qp->dev, &qp->user_qp.sq_mtt);
698 static void free_user_qp(struct erdma_qp *qp, struct erdma_ucontext *uctx)
700 put_mtt_entries(qp->dev, &qp->user_qp.sq_mtt);
701 put_mtt_entries(qp->dev, &qp->user_qp.rq_mtt);
702 erdma_unmap_user_dbrecords(uctx, &qp->user_qp.user_dbr_page);
705 int erdma_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *attrs,
706 struct ib_udata *udata)
708 struct erdma_qp *qp = to_eqp(ibqp);
709 struct erdma_dev *dev = to_edev(ibqp->device);
710 struct erdma_ucontext *uctx = rdma_udata_to_drv_context(
711 udata, struct erdma_ucontext, ibucontext);
712 struct erdma_ureq_create_qp ureq;
713 struct erdma_uresp_create_qp uresp;
716 ret = erdma_qp_validate_cap(dev, attrs);
720 ret = erdma_qp_validate_attr(dev, attrs);
724 qp->scq = to_ecq(attrs->send_cq);
725 qp->rcq = to_ecq(attrs->recv_cq);
727 qp->attrs.cc = dev->attrs.cc;
729 init_rwsem(&qp->state_lock);
731 init_completion(&qp->safe_free);
733 ret = xa_alloc_cyclic(&dev->qp_xa, &qp->ibqp.qp_num, qp,
734 XA_LIMIT(1, dev->attrs.max_qp - 1),
735 &dev->next_alloc_qpn, GFP_KERNEL);
741 qp->attrs.sq_size = roundup_pow_of_two(attrs->cap.max_send_wr *
742 ERDMA_MAX_WQEBB_PER_SQE);
743 qp->attrs.rq_size = roundup_pow_of_two(attrs->cap.max_recv_wr);
746 ret = ib_copy_from_udata(&ureq, udata,
747 min(sizeof(ureq), udata->inlen));
751 ret = init_user_qp(qp, uctx, ureq.qbuf_va, ureq.qbuf_len,
756 memset(&uresp, 0, sizeof(uresp));
758 uresp.num_sqe = qp->attrs.sq_size;
759 uresp.num_rqe = qp->attrs.rq_size;
760 uresp.qp_id = QP_ID(qp);
761 uresp.rq_offset = qp->user_qp.rq_offset;
763 ret = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
767 init_kernel_qp(dev, qp, attrs);
770 qp->attrs.max_send_sge = attrs->cap.max_send_sge;
771 qp->attrs.max_recv_sge = attrs->cap.max_recv_sge;
772 qp->attrs.state = ERDMA_QP_STATE_IDLE;
773 INIT_DELAYED_WORK(&qp->reflush_dwork, erdma_flush_worker);
775 ret = create_qp_cmd(uctx, qp);
779 spin_lock_init(&qp->lock);
785 free_user_qp(qp, uctx);
789 xa_erase(&dev->qp_xa, QP_ID(qp));
794 static int erdma_create_stag(struct erdma_dev *dev, u32 *stag)
798 stag_idx = erdma_alloc_idx(&dev->res_cb[ERDMA_RES_TYPE_STAG_IDX]);
802 /* For now, we always let key field be zero. */
803 *stag = (stag_idx << 8);
808 struct ib_mr *erdma_get_dma_mr(struct ib_pd *ibpd, int acc)
810 struct erdma_dev *dev = to_edev(ibpd->device);
815 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
817 return ERR_PTR(-ENOMEM);
819 ret = erdma_create_stag(dev, &stag);
823 mr->type = ERDMA_MR_TYPE_DMA;
825 mr->ibmr.lkey = stag;
826 mr->ibmr.rkey = stag;
828 mr->access = ERDMA_MR_ACC_LR | to_erdma_access_flags(acc);
829 ret = regmr_cmd(dev, mr);
831 goto out_remove_stag;
836 erdma_free_idx(&dev->res_cb[ERDMA_RES_TYPE_STAG_IDX],
845 struct ib_mr *erdma_ib_alloc_mr(struct ib_pd *ibpd, enum ib_mr_type mr_type,
849 struct erdma_dev *dev = to_edev(ibpd->device);
853 if (mr_type != IB_MR_TYPE_MEM_REG)
854 return ERR_PTR(-EOPNOTSUPP);
856 if (max_num_sg > ERDMA_MR_MAX_MTT_CNT)
857 return ERR_PTR(-EINVAL);
859 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
861 return ERR_PTR(-ENOMEM);
863 ret = erdma_create_stag(dev, &stag);
867 mr->type = ERDMA_MR_TYPE_FRMR;
869 mr->ibmr.lkey = stag;
870 mr->ibmr.rkey = stag;
872 /* update it in FRMR. */
873 mr->access = ERDMA_MR_ACC_LR | ERDMA_MR_ACC_LW | ERDMA_MR_ACC_RR |
876 mr->mem.page_size = PAGE_SIZE; /* update it later. */
877 mr->mem.page_cnt = max_num_sg;
878 mr->mem.mtt_type = ERDMA_MR_INDIRECT_MTT;
880 alloc_pages_exact(MTT_SIZE(mr->mem.page_cnt), GFP_KERNEL);
881 if (!mr->mem.mtt_buf) {
883 goto out_remove_stag;
886 mr->mem.mtt_entry[0] =
887 dma_map_single(&dev->pdev->dev, mr->mem.mtt_buf,
888 MTT_SIZE(mr->mem.page_cnt), DMA_TO_DEVICE);
889 if (dma_mapping_error(&dev->pdev->dev, mr->mem.mtt_entry[0])) {
894 ret = regmr_cmd(dev, mr);
901 dma_unmap_single(&dev->pdev->dev, mr->mem.mtt_entry[0],
902 MTT_SIZE(mr->mem.page_cnt), DMA_TO_DEVICE);
904 free_pages_exact(mr->mem.mtt_buf, MTT_SIZE(mr->mem.page_cnt));
907 erdma_free_idx(&dev->res_cb[ERDMA_RES_TYPE_STAG_IDX],
916 static int erdma_set_page(struct ib_mr *ibmr, u64 addr)
918 struct erdma_mr *mr = to_emr(ibmr);
920 if (mr->mem.mtt_nents >= mr->mem.page_cnt)
923 *((u64 *)mr->mem.mtt_buf + mr->mem.mtt_nents) = addr;
929 int erdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
930 unsigned int *sg_offset)
932 struct erdma_mr *mr = to_emr(ibmr);
935 mr->mem.mtt_nents = 0;
937 num = ib_sg_to_pages(&mr->ibmr, sg, sg_nents, sg_offset,
943 struct ib_mr *erdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
944 u64 virt, int access, struct ib_udata *udata)
946 struct erdma_mr *mr = NULL;
947 struct erdma_dev *dev = to_edev(ibpd->device);
951 if (!len || len > dev->attrs.max_mr_size)
952 return ERR_PTR(-EINVAL);
954 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
956 return ERR_PTR(-ENOMEM);
958 ret = get_mtt_entries(dev, &mr->mem, start, len, access, virt,
963 ret = erdma_create_stag(dev, &stag);
965 goto err_out_put_mtt;
967 mr->ibmr.lkey = mr->ibmr.rkey = stag;
971 mr->access = ERDMA_MR_ACC_LR | to_erdma_access_flags(access);
973 mr->type = ERDMA_MR_TYPE_NORMAL;
975 ret = regmr_cmd(dev, mr);
982 erdma_free_idx(&dev->res_cb[ERDMA_RES_TYPE_STAG_IDX],
986 put_mtt_entries(dev, &mr->mem);
994 int erdma_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
997 struct erdma_dev *dev = to_edev(ibmr->device);
998 struct erdma_cmdq_dereg_mr_req req;
1003 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
1004 CMDQ_OPCODE_DEREG_MR);
1006 req.cfg = FIELD_PREP(ERDMA_CMD_MR_MPT_IDX_MASK, ibmr->lkey >> 8) |
1007 FIELD_PREP(ERDMA_CMD_MR_KEY_MASK, ibmr->lkey & 0xFF);
1009 ret = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
1013 erdma_free_idx(&dev->res_cb[ERDMA_RES_TYPE_STAG_IDX], ibmr->lkey >> 8);
1015 put_mtt_entries(dev, &mr->mem);
1021 int erdma_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata)
1023 struct erdma_cq *cq = to_ecq(ibcq);
1024 struct erdma_dev *dev = to_edev(ibcq->device);
1025 struct erdma_ucontext *ctx = rdma_udata_to_drv_context(
1026 udata, struct erdma_ucontext, ibucontext);
1028 struct erdma_cmdq_destroy_cq_req req;
1030 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
1031 CMDQ_OPCODE_DESTROY_CQ);
1034 err = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
1038 if (rdma_is_kernel_res(&cq->ibcq.res)) {
1039 dma_free_coherent(&dev->pdev->dev,
1040 WARPPED_BUFSIZE(cq->depth << CQE_SHIFT),
1041 cq->kern_cq.qbuf, cq->kern_cq.qbuf_dma_addr);
1043 erdma_unmap_user_dbrecords(ctx, &cq->user_cq.user_dbr_page);
1044 put_mtt_entries(dev, &cq->user_cq.qbuf_mtt);
1047 xa_erase(&dev->cq_xa, cq->cqn);
1052 int erdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
1054 struct erdma_qp *qp = to_eqp(ibqp);
1055 struct erdma_dev *dev = to_edev(ibqp->device);
1056 struct erdma_ucontext *ctx = rdma_udata_to_drv_context(
1057 udata, struct erdma_ucontext, ibucontext);
1058 struct erdma_qp_attrs qp_attrs;
1060 struct erdma_cmdq_destroy_qp_req req;
1062 down_write(&qp->state_lock);
1063 qp_attrs.state = ERDMA_QP_STATE_ERROR;
1064 erdma_modify_qp_internal(qp, &qp_attrs, ERDMA_QP_ATTR_STATE);
1065 up_write(&qp->state_lock);
1067 cancel_delayed_work_sync(&qp->reflush_dwork);
1069 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_RDMA,
1070 CMDQ_OPCODE_DESTROY_QP);
1071 req.qpn = QP_ID(qp);
1073 err = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
1078 wait_for_completion(&qp->safe_free);
1080 if (rdma_is_kernel_res(&qp->ibqp.res)) {
1081 vfree(qp->kern_qp.swr_tbl);
1082 vfree(qp->kern_qp.rwr_tbl);
1085 WARPPED_BUFSIZE(qp->attrs.rq_size << RQE_SHIFT),
1086 qp->kern_qp.rq_buf, qp->kern_qp.rq_buf_dma_addr);
1089 WARPPED_BUFSIZE(qp->attrs.sq_size << SQEBB_SHIFT),
1090 qp->kern_qp.sq_buf, qp->kern_qp.sq_buf_dma_addr);
1092 put_mtt_entries(dev, &qp->user_qp.sq_mtt);
1093 put_mtt_entries(dev, &qp->user_qp.rq_mtt);
1094 erdma_unmap_user_dbrecords(ctx, &qp->user_qp.user_dbr_page);
1098 erdma_cep_put(qp->cep);
1099 xa_erase(&dev->qp_xa, QP_ID(qp));
1104 void erdma_qp_get_ref(struct ib_qp *ibqp)
1106 erdma_qp_get(to_eqp(ibqp));
1109 void erdma_qp_put_ref(struct ib_qp *ibqp)
1111 erdma_qp_put(to_eqp(ibqp));
1114 int erdma_mmap(struct ib_ucontext *ctx, struct vm_area_struct *vma)
1116 struct rdma_user_mmap_entry *rdma_entry;
1117 struct erdma_user_mmap_entry *entry;
1121 rdma_entry = rdma_user_mmap_entry_get(ctx, vma);
1125 entry = to_emmap(rdma_entry);
1127 switch (entry->mmap_flag) {
1128 case ERDMA_MMAP_IO_NC:
1130 prot = pgprot_device(vma->vm_page_prot);
1137 err = rdma_user_mmap_io(ctx, vma, PFN_DOWN(entry->address), PAGE_SIZE,
1141 rdma_user_mmap_entry_put(rdma_entry);
1145 void erdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
1147 struct erdma_user_mmap_entry *entry = to_emmap(rdma_entry);
1152 static int alloc_db_resources(struct erdma_dev *dev, struct erdma_ucontext *ctx,
1155 struct erdma_cmdq_ext_db_req req = {};
1160 * CAP_SYS_RAWIO is required if hardware does not support extend
1161 * doorbell mechanism.
1163 if (!ext_db_en && !capable(CAP_SYS_RAWIO))
1167 ctx->sdb = dev->func_bar_addr + ERDMA_BAR_SQDB_SPACE_OFFSET;
1168 ctx->rdb = dev->func_bar_addr + ERDMA_BAR_RQDB_SPACE_OFFSET;
1169 ctx->cdb = dev->func_bar_addr + ERDMA_BAR_CQDB_SPACE_OFFSET;
1173 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_COMMON,
1174 CMDQ_OPCODE_ALLOC_DB);
1176 req.cfg = FIELD_PREP(ERDMA_CMD_EXT_DB_CQ_EN_MASK, 1) |
1177 FIELD_PREP(ERDMA_CMD_EXT_DB_RQ_EN_MASK, 1) |
1178 FIELD_PREP(ERDMA_CMD_EXT_DB_SQ_EN_MASK, 1);
1180 ret = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), &val0, &val1);
1184 ctx->ext_db.enable = true;
1185 ctx->ext_db.sdb_off = ERDMA_GET(val0, ALLOC_DB_RESP_SDB);
1186 ctx->ext_db.rdb_off = ERDMA_GET(val0, ALLOC_DB_RESP_RDB);
1187 ctx->ext_db.cdb_off = ERDMA_GET(val0, ALLOC_DB_RESP_CDB);
1189 ctx->sdb = dev->func_bar_addr + (ctx->ext_db.sdb_off << PAGE_SHIFT);
1190 ctx->cdb = dev->func_bar_addr + (ctx->ext_db.rdb_off << PAGE_SHIFT);
1191 ctx->rdb = dev->func_bar_addr + (ctx->ext_db.cdb_off << PAGE_SHIFT);
1196 static void free_db_resources(struct erdma_dev *dev, struct erdma_ucontext *ctx)
1198 struct erdma_cmdq_ext_db_req req = {};
1201 if (!ctx->ext_db.enable)
1204 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_COMMON,
1205 CMDQ_OPCODE_FREE_DB);
1207 req.cfg = FIELD_PREP(ERDMA_CMD_EXT_DB_CQ_EN_MASK, 1) |
1208 FIELD_PREP(ERDMA_CMD_EXT_DB_RQ_EN_MASK, 1) |
1209 FIELD_PREP(ERDMA_CMD_EXT_DB_SQ_EN_MASK, 1);
1211 req.sdb_off = ctx->ext_db.sdb_off;
1212 req.rdb_off = ctx->ext_db.rdb_off;
1213 req.cdb_off = ctx->ext_db.cdb_off;
1215 ret = erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
1217 ibdev_err_ratelimited(&dev->ibdev,
1218 "free db resources failed %d", ret);
1221 static void erdma_uctx_user_mmap_entries_remove(struct erdma_ucontext *uctx)
1223 rdma_user_mmap_entry_remove(uctx->sq_db_mmap_entry);
1224 rdma_user_mmap_entry_remove(uctx->rq_db_mmap_entry);
1225 rdma_user_mmap_entry_remove(uctx->cq_db_mmap_entry);
1228 int erdma_alloc_ucontext(struct ib_ucontext *ibctx, struct ib_udata *udata)
1230 struct erdma_ucontext *ctx = to_ectx(ibctx);
1231 struct erdma_dev *dev = to_edev(ibctx->device);
1233 struct erdma_uresp_alloc_ctx uresp = {};
1235 if (atomic_inc_return(&dev->num_ctx) > ERDMA_MAX_CONTEXT) {
1240 if (udata->outlen < sizeof(uresp)) {
1245 INIT_LIST_HEAD(&ctx->dbrecords_page_list);
1246 mutex_init(&ctx->dbrecords_page_mutex);
1248 ret = alloc_db_resources(dev, ctx,
1249 !!(dev->attrs.cap_flags &
1250 ERDMA_DEV_CAP_FLAGS_EXTEND_DB));
1254 ctx->sq_db_mmap_entry = erdma_user_mmap_entry_insert(
1255 ctx, (void *)ctx->sdb, PAGE_SIZE, ERDMA_MMAP_IO_NC, &uresp.sdb);
1256 if (!ctx->sq_db_mmap_entry) {
1258 goto err_free_ext_db;
1261 ctx->rq_db_mmap_entry = erdma_user_mmap_entry_insert(
1262 ctx, (void *)ctx->rdb, PAGE_SIZE, ERDMA_MMAP_IO_NC, &uresp.rdb);
1263 if (!ctx->rq_db_mmap_entry) {
1265 goto err_put_mmap_entries;
1268 ctx->cq_db_mmap_entry = erdma_user_mmap_entry_insert(
1269 ctx, (void *)ctx->cdb, PAGE_SIZE, ERDMA_MMAP_IO_NC, &uresp.cdb);
1270 if (!ctx->cq_db_mmap_entry) {
1272 goto err_put_mmap_entries;
1275 uresp.dev_id = dev->pdev->device;
1277 ret = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1279 goto err_put_mmap_entries;
1283 err_put_mmap_entries:
1284 erdma_uctx_user_mmap_entries_remove(ctx);
1287 free_db_resources(dev, ctx);
1290 atomic_dec(&dev->num_ctx);
1294 void erdma_dealloc_ucontext(struct ib_ucontext *ibctx)
1296 struct erdma_dev *dev = to_edev(ibctx->device);
1297 struct erdma_ucontext *ctx = to_ectx(ibctx);
1299 erdma_uctx_user_mmap_entries_remove(ctx);
1300 free_db_resources(dev, ctx);
1301 atomic_dec(&dev->num_ctx);
1304 static int ib_qp_state_to_erdma_qp_state[IB_QPS_ERR + 1] = {
1305 [IB_QPS_RESET] = ERDMA_QP_STATE_IDLE,
1306 [IB_QPS_INIT] = ERDMA_QP_STATE_IDLE,
1307 [IB_QPS_RTR] = ERDMA_QP_STATE_RTR,
1308 [IB_QPS_RTS] = ERDMA_QP_STATE_RTS,
1309 [IB_QPS_SQD] = ERDMA_QP_STATE_CLOSING,
1310 [IB_QPS_SQE] = ERDMA_QP_STATE_TERMINATE,
1311 [IB_QPS_ERR] = ERDMA_QP_STATE_ERROR
1314 int erdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1315 struct ib_udata *udata)
1317 struct erdma_qp_attrs new_attrs;
1318 enum erdma_qp_attr_mask erdma_attr_mask = 0;
1319 struct erdma_qp *qp = to_eqp(ibqp);
1322 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1325 memset(&new_attrs, 0, sizeof(new_attrs));
1327 if (attr_mask & IB_QP_STATE) {
1328 new_attrs.state = ib_qp_state_to_erdma_qp_state[attr->qp_state];
1330 erdma_attr_mask |= ERDMA_QP_ATTR_STATE;
1333 down_write(&qp->state_lock);
1335 ret = erdma_modify_qp_internal(qp, &new_attrs, erdma_attr_mask);
1337 up_write(&qp->state_lock);
1342 int erdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
1343 int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1345 struct erdma_qp *qp;
1346 struct erdma_dev *dev;
1348 if (ibqp && qp_attr && qp_init_attr) {
1350 dev = to_edev(ibqp->device);
1355 qp_attr->cap.max_inline_data = ERDMA_MAX_INLINE;
1356 qp_init_attr->cap.max_inline_data = ERDMA_MAX_INLINE;
1358 qp_attr->cap.max_send_wr = qp->attrs.sq_size;
1359 qp_attr->cap.max_recv_wr = qp->attrs.rq_size;
1360 qp_attr->cap.max_send_sge = qp->attrs.max_send_sge;
1361 qp_attr->cap.max_recv_sge = qp->attrs.max_recv_sge;
1363 qp_attr->path_mtu = ib_mtu_int_to_enum(dev->netdev->mtu);
1364 qp_attr->max_rd_atomic = qp->attrs.irq_size;
1365 qp_attr->max_dest_rd_atomic = qp->attrs.orq_size;
1367 qp_attr->qp_access_flags = IB_ACCESS_LOCAL_WRITE |
1368 IB_ACCESS_REMOTE_WRITE |
1369 IB_ACCESS_REMOTE_READ;
1371 qp_init_attr->cap = qp_attr->cap;
1376 static int erdma_init_user_cq(struct erdma_ucontext *ctx, struct erdma_cq *cq,
1377 struct erdma_ureq_create_cq *ureq)
1380 struct erdma_dev *dev = to_edev(cq->ibcq.device);
1382 ret = get_mtt_entries(dev, &cq->user_cq.qbuf_mtt, ureq->qbuf_va,
1383 ureq->qbuf_len, 0, ureq->qbuf_va, SZ_64M - SZ_4K,
1388 ret = erdma_map_user_dbrecords(ctx, ureq->db_record_va,
1389 &cq->user_cq.user_dbr_page,
1390 &cq->user_cq.db_info_dma_addr);
1392 put_mtt_entries(dev, &cq->user_cq.qbuf_mtt);
1397 static int erdma_init_kernel_cq(struct erdma_cq *cq)
1399 struct erdma_dev *dev = to_edev(cq->ibcq.device);
1402 dma_alloc_coherent(&dev->pdev->dev,
1403 WARPPED_BUFSIZE(cq->depth << CQE_SHIFT),
1404 &cq->kern_cq.qbuf_dma_addr, GFP_KERNEL);
1405 if (!cq->kern_cq.qbuf)
1408 cq->kern_cq.db_record =
1409 (u64 *)(cq->kern_cq.qbuf + (cq->depth << CQE_SHIFT));
1410 spin_lock_init(&cq->kern_cq.lock);
1411 /* use default cqdb addr */
1412 cq->kern_cq.db = dev->func_bar + ERDMA_BAR_CQDB_SPACE_OFFSET;
1417 int erdma_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
1418 struct ib_udata *udata)
1420 struct erdma_cq *cq = to_ecq(ibcq);
1421 struct erdma_dev *dev = to_edev(ibcq->device);
1422 unsigned int depth = attr->cqe;
1424 struct erdma_ucontext *ctx = rdma_udata_to_drv_context(
1425 udata, struct erdma_ucontext, ibucontext);
1427 if (depth > dev->attrs.max_cqe)
1430 depth = roundup_pow_of_two(depth);
1431 cq->ibcq.cqe = depth;
1433 cq->assoc_eqn = attr->comp_vector + 1;
1435 ret = xa_alloc_cyclic(&dev->cq_xa, &cq->cqn, cq,
1436 XA_LIMIT(1, dev->attrs.max_cq - 1),
1437 &dev->next_alloc_cqn, GFP_KERNEL);
1441 if (!rdma_is_kernel_res(&ibcq->res)) {
1442 struct erdma_ureq_create_cq ureq;
1443 struct erdma_uresp_create_cq uresp;
1445 ret = ib_copy_from_udata(&ureq, udata,
1446 min(udata->inlen, sizeof(ureq)));
1450 ret = erdma_init_user_cq(ctx, cq, &ureq);
1454 uresp.cq_id = cq->cqn;
1455 uresp.num_cqe = depth;
1457 ret = ib_copy_to_udata(udata, &uresp,
1458 min(sizeof(uresp), udata->outlen));
1462 ret = erdma_init_kernel_cq(cq);
1467 ret = create_cq_cmd(ctx, cq);
1474 if (!rdma_is_kernel_res(&ibcq->res)) {
1475 erdma_unmap_user_dbrecords(ctx, &cq->user_cq.user_dbr_page);
1476 put_mtt_entries(dev, &cq->user_cq.qbuf_mtt);
1478 dma_free_coherent(&dev->pdev->dev,
1479 WARPPED_BUFSIZE(depth << CQE_SHIFT),
1480 cq->kern_cq.qbuf, cq->kern_cq.qbuf_dma_addr);
1484 xa_erase(&dev->cq_xa, cq->cqn);
1489 void erdma_set_mtu(struct erdma_dev *dev, u32 mtu)
1491 struct erdma_cmdq_config_mtu_req req;
1493 erdma_cmdq_build_reqhdr(&req.hdr, CMDQ_SUBMOD_COMMON,
1494 CMDQ_OPCODE_CONF_MTU);
1497 erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
1500 void erdma_port_event(struct erdma_dev *dev, enum ib_event_type reason)
1502 struct ib_event event;
1504 event.device = &dev->ibdev;
1505 event.element.port_num = 1;
1506 event.event = reason;
1508 ib_dispatch_event(&event);