2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/export.h>
34 #include <linux/etherdevice.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/eswitch.h>
38 #include "mlx5_core.h"
40 /* Mutex to hold while enabling or disabling RoCE */
41 static DEFINE_MUTEX(mlx5_roce_en_lock);
43 static int _mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod,
44 u16 vport, u32 *out, int outlen)
46 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {0};
48 MLX5_SET(query_vport_state_in, in, opcode,
49 MLX5_CMD_OP_QUERY_VPORT_STATE);
50 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
51 MLX5_SET(query_vport_state_in, in, vport_number, vport);
53 MLX5_SET(query_vport_state_in, in, other_vport, 1);
55 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
58 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
60 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
62 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
64 return MLX5_GET(query_vport_state_out, out, state);
67 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
68 u16 vport, u8 other_vport, u8 state)
70 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {0};
71 u32 out[MLX5_ST_SZ_DW(modify_vport_state_out)] = {0};
73 MLX5_SET(modify_vport_state_in, in, opcode,
74 MLX5_CMD_OP_MODIFY_VPORT_STATE);
75 MLX5_SET(modify_vport_state_in, in, op_mod, opmod);
76 MLX5_SET(modify_vport_state_in, in, vport_number, vport);
77 MLX5_SET(modify_vport_state_in, in, other_vport, other_vport);
78 MLX5_SET(modify_vport_state_in, in, admin_state, state);
80 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
83 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,
86 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
88 MLX5_SET(query_nic_vport_context_in, in, opcode,
89 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
90 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
92 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
94 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
97 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
100 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
102 MLX5_SET(modify_nic_vport_context_in, in, opcode,
103 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
104 return mlx5_cmd_exec(mdev, in, inlen, out, sizeof(out));
107 int mlx5_query_nic_vport_min_inline(struct mlx5_core_dev *mdev,
108 u16 vport, u8 *min_inline)
110 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {0};
113 err = mlx5_query_nic_vport_context(mdev, vport, out, sizeof(out));
115 *min_inline = MLX5_GET(query_nic_vport_context_out, out,
116 nic_vport_context.min_wqe_inline_mode);
119 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_min_inline);
121 void mlx5_query_min_inline(struct mlx5_core_dev *mdev,
124 switch (MLX5_CAP_ETH(mdev, wqe_inline_mode)) {
125 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
126 if (!mlx5_query_nic_vport_min_inline(mdev, 0, min_inline_mode))
129 case MLX5_CAP_INLINE_MODE_L2:
130 *min_inline_mode = MLX5_INLINE_MODE_L2;
132 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
133 *min_inline_mode = MLX5_INLINE_MODE_NONE;
137 EXPORT_SYMBOL_GPL(mlx5_query_min_inline);
139 int mlx5_modify_nic_vport_min_inline(struct mlx5_core_dev *mdev,
140 u16 vport, u8 min_inline)
142 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
143 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
146 MLX5_SET(modify_nic_vport_context_in, in,
147 field_select.min_inline, 1);
148 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
149 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
151 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
152 in, nic_vport_context);
153 MLX5_SET(nic_vport_context, nic_vport_ctx,
154 min_wqe_inline_mode, min_inline);
156 return mlx5_modify_nic_vport_context(mdev, in, inlen);
159 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
160 u16 vport, bool other, u8 *addr)
162 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
163 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {};
168 out = kvzalloc(outlen, GFP_KERNEL);
172 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
173 nic_vport_context.permanent_address);
175 MLX5_SET(query_nic_vport_context_in, in, opcode,
176 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
177 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
178 MLX5_SET(query_nic_vport_context_in, in, other_vport, other);
180 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
182 ether_addr_copy(addr, &out_addr[2]);
187 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
189 int mlx5_query_mac_address(struct mlx5_core_dev *mdev, u8 *addr)
191 return mlx5_query_nic_vport_mac_address(mdev, 0, false, addr);
193 EXPORT_SYMBOL_GPL(mlx5_query_mac_address);
195 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev,
199 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
204 in = kvzalloc(inlen, GFP_KERNEL);
208 MLX5_SET(modify_nic_vport_context_in, in,
209 field_select.permanent_address, 1);
210 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
211 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
213 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
214 in, nic_vport_context);
215 perm_mac = MLX5_ADDR_OF(nic_vport_context, nic_vport_ctx,
218 ether_addr_copy(&perm_mac[2], addr);
220 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
226 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
228 int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu)
230 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
234 out = kvzalloc(outlen, GFP_KERNEL);
238 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
240 *mtu = MLX5_GET(query_nic_vport_context_out, out,
241 nic_vport_context.mtu);
246 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
248 int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
250 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
254 in = kvzalloc(inlen, GFP_KERNEL);
258 MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
259 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
261 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
266 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
268 int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
270 enum mlx5_list_type list_type,
271 u8 addr_list[][ETH_ALEN],
274 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
283 req_list_size = *list_size;
285 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
286 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
287 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
289 if (req_list_size > max_list_size) {
290 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
291 req_list_size, max_list_size);
292 req_list_size = max_list_size;
295 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
296 req_list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
298 out = kzalloc(out_sz, GFP_KERNEL);
302 MLX5_SET(query_nic_vport_context_in, in, opcode,
303 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
304 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type, list_type);
305 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
306 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
308 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
312 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
314 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
317 *list_size = req_list_size;
318 for (i = 0; i < req_list_size; i++) {
319 u8 *mac_addr = MLX5_ADDR_OF(nic_vport_context,
321 current_uc_mac_address[i]) + 2;
322 ether_addr_copy(addr_list[i], mac_addr);
328 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_list);
330 int mlx5_modify_nic_vport_mac_list(struct mlx5_core_dev *dev,
331 enum mlx5_list_type list_type,
332 u8 addr_list[][ETH_ALEN],
335 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
343 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
344 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
345 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
347 if (list_size > max_list_size)
350 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
351 list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
353 memset(out, 0, sizeof(out));
354 in = kzalloc(in_sz, GFP_KERNEL);
358 MLX5_SET(modify_nic_vport_context_in, in, opcode,
359 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
360 MLX5_SET(modify_nic_vport_context_in, in,
361 field_select.addresses_list, 1);
363 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
366 MLX5_SET(nic_vport_context, nic_vport_ctx,
367 allowed_list_type, list_type);
368 MLX5_SET(nic_vport_context, nic_vport_ctx,
369 allowed_list_size, list_size);
371 for (i = 0; i < list_size; i++) {
372 u8 *curr_mac = MLX5_ADDR_OF(nic_vport_context,
374 current_uc_mac_address[i]) + 2;
375 ether_addr_copy(curr_mac, addr_list[i]);
378 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
382 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_list);
384 int mlx5_modify_nic_vport_vlans(struct mlx5_core_dev *dev,
388 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
396 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
398 if (list_size > max_list_size)
401 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
402 list_size * MLX5_ST_SZ_BYTES(vlan_layout);
404 memset(out, 0, sizeof(out));
405 in = kzalloc(in_sz, GFP_KERNEL);
409 MLX5_SET(modify_nic_vport_context_in, in, opcode,
410 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
411 MLX5_SET(modify_nic_vport_context_in, in,
412 field_select.addresses_list, 1);
414 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
417 MLX5_SET(nic_vport_context, nic_vport_ctx,
418 allowed_list_type, MLX5_NVPRT_LIST_TYPE_VLAN);
419 MLX5_SET(nic_vport_context, nic_vport_ctx,
420 allowed_list_size, list_size);
422 for (i = 0; i < list_size; i++) {
423 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
425 current_uc_mac_address[i]);
426 MLX5_SET(vlan_layout, vlan_addr, vlan, vlans[i]);
429 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
433 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_vlans);
435 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
436 u64 *system_image_guid)
439 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
441 out = kvzalloc(outlen, GFP_KERNEL);
445 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
447 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
448 nic_vport_context.system_image_guid);
454 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
456 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
459 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
461 out = kvzalloc(outlen, GFP_KERNEL);
465 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
467 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
468 nic_vport_context.node_guid);
474 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
476 int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
477 u16 vport, u64 node_guid)
479 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
480 void *nic_vport_context;
486 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
489 in = kvzalloc(inlen, GFP_KERNEL);
493 MLX5_SET(modify_nic_vport_context_in, in,
494 field_select.node_guid, 1);
495 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
496 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
498 nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
499 in, nic_vport_context);
500 MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
502 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
509 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
513 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
515 out = kvzalloc(outlen, GFP_KERNEL);
519 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
521 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
522 nic_vport_context.qkey_violation_counter);
528 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
530 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,
531 u8 port_num, u16 vf_num, u16 gid_index,
534 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
535 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
536 int is_group_manager;
544 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
545 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
546 mlx5_core_dbg(dev, "vf_num %d, index %d, gid_table_size %d\n",
547 vf_num, gid_index, tbsz);
549 if (gid_index > tbsz && gid_index != 0xffff)
552 if (gid_index == 0xffff)
557 out_sz += nout * sizeof(*gid);
559 in = kzalloc(in_sz, GFP_KERNEL);
560 out = kzalloc(out_sz, GFP_KERNEL);
566 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
568 if (is_group_manager) {
569 MLX5_SET(query_hca_vport_gid_in, in, vport_number, vf_num);
570 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
576 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
578 if (MLX5_CAP_GEN(dev, num_ports) == 2)
579 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
581 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
585 tmp = out + MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
586 gid->global.subnet_prefix = tmp->global.subnet_prefix;
587 gid->global.interface_id = tmp->global.interface_id;
594 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
596 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
597 u8 port_num, u16 vf_num, u16 pkey_index,
600 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
601 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
602 int is_group_manager;
611 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
613 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
614 if (pkey_index > tbsz && pkey_index != 0xffff)
617 if (pkey_index == 0xffff)
622 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
624 in = kzalloc(in_sz, GFP_KERNEL);
625 out = kzalloc(out_sz, GFP_KERNEL);
631 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
633 if (is_group_manager) {
634 MLX5_SET(query_hca_vport_pkey_in, in, vport_number, vf_num);
635 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
641 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
643 if (MLX5_CAP_GEN(dev, num_ports) == 2)
644 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
646 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
650 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
651 for (i = 0; i < nout; i++, pkey++, pkarr += MLX5_ST_SZ_BYTES(pkey))
652 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
659 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
661 int mlx5_query_hca_vport_context(struct mlx5_core_dev *dev,
662 u8 other_vport, u8 port_num,
664 struct mlx5_hca_vport_context *rep)
666 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
667 int in[MLX5_ST_SZ_DW(query_hca_vport_context_in)] = {0};
668 int is_group_manager;
673 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
675 out = kzalloc(out_sz, GFP_KERNEL);
679 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
682 if (is_group_manager) {
683 MLX5_SET(query_hca_vport_context_in, in, other_vport, 1);
684 MLX5_SET(query_hca_vport_context_in, in, vport_number, vf_num);
691 if (MLX5_CAP_GEN(dev, num_ports) == 2)
692 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
694 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
698 ctx = MLX5_ADDR_OF(query_hca_vport_context_out, out, hca_vport_context);
699 rep->field_select = MLX5_GET_PR(hca_vport_context, ctx, field_select);
700 rep->sm_virt_aware = MLX5_GET_PR(hca_vport_context, ctx, sm_virt_aware);
701 rep->has_smi = MLX5_GET_PR(hca_vport_context, ctx, has_smi);
702 rep->has_raw = MLX5_GET_PR(hca_vport_context, ctx, has_raw);
703 rep->policy = MLX5_GET_PR(hca_vport_context, ctx, vport_state_policy);
704 rep->phys_state = MLX5_GET_PR(hca_vport_context, ctx,
705 port_physical_state);
706 rep->vport_state = MLX5_GET_PR(hca_vport_context, ctx, vport_state);
707 rep->port_physical_state = MLX5_GET_PR(hca_vport_context, ctx,
708 port_physical_state);
709 rep->port_guid = MLX5_GET64_PR(hca_vport_context, ctx, port_guid);
710 rep->node_guid = MLX5_GET64_PR(hca_vport_context, ctx, node_guid);
711 rep->cap_mask1 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask1);
712 rep->cap_mask1_perm = MLX5_GET_PR(hca_vport_context, ctx,
713 cap_mask1_field_select);
714 rep->cap_mask2 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask2);
715 rep->cap_mask2_perm = MLX5_GET_PR(hca_vport_context, ctx,
716 cap_mask2_field_select);
717 rep->lid = MLX5_GET_PR(hca_vport_context, ctx, lid);
718 rep->init_type_reply = MLX5_GET_PR(hca_vport_context, ctx,
720 rep->lmc = MLX5_GET_PR(hca_vport_context, ctx, lmc);
721 rep->subnet_timeout = MLX5_GET_PR(hca_vport_context, ctx,
723 rep->sm_lid = MLX5_GET_PR(hca_vport_context, ctx, sm_lid);
724 rep->sm_sl = MLX5_GET_PR(hca_vport_context, ctx, sm_sl);
725 rep->qkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
726 qkey_violation_counter);
727 rep->pkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
728 pkey_violation_counter);
729 rep->grh_required = MLX5_GET_PR(hca_vport_context, ctx, grh_required);
730 rep->sys_image_guid = MLX5_GET64_PR(hca_vport_context, ctx,
737 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_context);
739 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *dev,
742 struct mlx5_hca_vport_context *rep;
745 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
749 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
751 *sys_image_guid = rep->sys_image_guid;
756 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
758 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *dev,
761 struct mlx5_hca_vport_context *rep;
764 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
768 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
770 *node_guid = rep->node_guid;
775 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
777 int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,
784 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
787 out = kzalloc(outlen, GFP_KERNEL);
791 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
795 *promisc_uc = MLX5_GET(query_nic_vport_context_out, out,
796 nic_vport_context.promisc_uc);
797 *promisc_mc = MLX5_GET(query_nic_vport_context_out, out,
798 nic_vport_context.promisc_mc);
799 *promisc_all = MLX5_GET(query_nic_vport_context_out, out,
800 nic_vport_context.promisc_all);
806 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_promisc);
808 int mlx5_modify_nic_vport_promisc(struct mlx5_core_dev *mdev,
814 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
817 in = kvzalloc(inlen, GFP_KERNEL);
821 MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
822 MLX5_SET(modify_nic_vport_context_in, in,
823 nic_vport_context.promisc_uc, promisc_uc);
824 MLX5_SET(modify_nic_vport_context_in, in,
825 nic_vport_context.promisc_mc, promisc_mc);
826 MLX5_SET(modify_nic_vport_context_in, in,
827 nic_vport_context.promisc_all, promisc_all);
829 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
835 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_promisc);
842 int mlx5_nic_vport_update_local_lb(struct mlx5_core_dev *mdev, bool enable)
844 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
848 if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) &&
849 !MLX5_CAP_GEN(mdev, disable_local_lb_uc))
852 in = kvzalloc(inlen, GFP_KERNEL);
856 MLX5_SET(modify_nic_vport_context_in, in,
857 nic_vport_context.disable_mc_local_lb, !enable);
858 MLX5_SET(modify_nic_vport_context_in, in,
859 nic_vport_context.disable_uc_local_lb, !enable);
861 if (MLX5_CAP_GEN(mdev, disable_local_lb_mc))
862 MLX5_SET(modify_nic_vport_context_in, in,
863 field_select.disable_mc_local_lb, 1);
865 if (MLX5_CAP_GEN(mdev, disable_local_lb_uc))
866 MLX5_SET(modify_nic_vport_context_in, in,
867 field_select.disable_uc_local_lb, 1);
869 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
872 mlx5_core_dbg(mdev, "%s local_lb\n",
873 enable ? "enable" : "disable");
878 EXPORT_SYMBOL_GPL(mlx5_nic_vport_update_local_lb);
880 int mlx5_nic_vport_query_local_lb(struct mlx5_core_dev *mdev, bool *status)
882 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
887 out = kzalloc(outlen, GFP_KERNEL);
891 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
895 value = MLX5_GET(query_nic_vport_context_out, out,
896 nic_vport_context.disable_mc_local_lb) << MC_LOCAL_LB;
898 value |= MLX5_GET(query_nic_vport_context_out, out,
899 nic_vport_context.disable_uc_local_lb) << UC_LOCAL_LB;
907 EXPORT_SYMBOL_GPL(mlx5_nic_vport_query_local_lb);
909 enum mlx5_vport_roce_state {
910 MLX5_VPORT_ROCE_DISABLED = 0,
911 MLX5_VPORT_ROCE_ENABLED = 1,
914 static int mlx5_nic_vport_update_roce_state(struct mlx5_core_dev *mdev,
915 enum mlx5_vport_roce_state state)
918 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
921 in = kvzalloc(inlen, GFP_KERNEL);
925 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
926 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
929 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
936 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
940 mutex_lock(&mlx5_roce_en_lock);
941 if (!mdev->roce.roce_en)
942 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_ENABLED);
945 mdev->roce.roce_en++;
946 mutex_unlock(&mlx5_roce_en_lock);
950 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
952 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
956 mutex_lock(&mlx5_roce_en_lock);
957 if (mdev->roce.roce_en) {
958 mdev->roce.roce_en--;
959 if (mdev->roce.roce_en == 0)
960 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_DISABLED);
963 mdev->roce.roce_en++;
965 mutex_unlock(&mlx5_roce_en_lock);
968 EXPORT_SYMBOL_GPL(mlx5_nic_vport_disable_roce);
970 int mlx5_core_query_vport_counter(struct mlx5_core_dev *dev, u8 other_vport,
971 int vf, u8 port_num, void *out,
974 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
975 int is_group_manager;
979 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
980 in = kvzalloc(in_sz, GFP_KERNEL);
986 MLX5_SET(query_vport_counter_in, in, opcode,
987 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
989 if (is_group_manager) {
990 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
991 MLX5_SET(query_vport_counter_in, in, vport_number, vf + 1);
997 if (MLX5_CAP_GEN(dev, num_ports) == 2)
998 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
1000 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
1005 EXPORT_SYMBOL_GPL(mlx5_core_query_vport_counter);
1007 int mlx5_query_vport_down_stats(struct mlx5_core_dev *mdev, u16 vport,
1008 u8 other_vport, u64 *rx_discard_vport_down,
1009 u64 *tx_discard_vport_down)
1011 u32 out[MLX5_ST_SZ_DW(query_vnic_env_out)] = {0};
1012 u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {0};
1015 MLX5_SET(query_vnic_env_in, in, opcode,
1016 MLX5_CMD_OP_QUERY_VNIC_ENV);
1017 MLX5_SET(query_vnic_env_in, in, op_mod, 0);
1018 MLX5_SET(query_vnic_env_in, in, vport_number, vport);
1019 MLX5_SET(query_vnic_env_in, in, other_vport, other_vport);
1021 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
1025 *rx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1026 vport_env.receive_discard_vport_down);
1027 *tx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1028 vport_env.transmit_discard_vport_down);
1032 int mlx5_core_modify_hca_vport_context(struct mlx5_core_dev *dev,
1033 u8 other_vport, u8 port_num,
1035 struct mlx5_hca_vport_context *req)
1037 int in_sz = MLX5_ST_SZ_BYTES(modify_hca_vport_context_in);
1038 u8 out[MLX5_ST_SZ_BYTES(modify_hca_vport_context_out)];
1039 int is_group_manager;
1044 mlx5_core_dbg(dev, "vf %d\n", vf);
1045 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
1046 in = kzalloc(in_sz, GFP_KERNEL);
1050 memset(out, 0, sizeof(out));
1051 MLX5_SET(modify_hca_vport_context_in, in, opcode, MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT);
1053 if (is_group_manager) {
1054 MLX5_SET(modify_hca_vport_context_in, in, other_vport, 1);
1055 MLX5_SET(modify_hca_vport_context_in, in, vport_number, vf);
1062 if (MLX5_CAP_GEN(dev, num_ports) > 1)
1063 MLX5_SET(modify_hca_vport_context_in, in, port_num, port_num);
1065 ctx = MLX5_ADDR_OF(modify_hca_vport_context_in, in, hca_vport_context);
1066 MLX5_SET(hca_vport_context, ctx, field_select, req->field_select);
1067 if (req->field_select & MLX5_HCA_VPORT_SEL_STATE_POLICY)
1068 MLX5_SET(hca_vport_context, ctx, vport_state_policy,
1070 if (req->field_select & MLX5_HCA_VPORT_SEL_PORT_GUID)
1071 MLX5_SET64(hca_vport_context, ctx, port_guid, req->port_guid);
1072 if (req->field_select & MLX5_HCA_VPORT_SEL_NODE_GUID)
1073 MLX5_SET64(hca_vport_context, ctx, node_guid, req->node_guid);
1074 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
1079 EXPORT_SYMBOL_GPL(mlx5_core_modify_hca_vport_context);
1081 int mlx5_nic_vport_affiliate_multiport(struct mlx5_core_dev *master_mdev,
1082 struct mlx5_core_dev *port_mdev)
1084 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1088 in = kvzalloc(inlen, GFP_KERNEL);
1092 err = mlx5_nic_vport_enable_roce(port_mdev);
1096 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1097 MLX5_SET(modify_nic_vport_context_in, in,
1098 nic_vport_context.affiliated_vhca_id,
1099 MLX5_CAP_GEN(master_mdev, vhca_id));
1100 MLX5_SET(modify_nic_vport_context_in, in,
1101 nic_vport_context.affiliation_criteria,
1102 MLX5_CAP_GEN(port_mdev, affiliate_nic_vport_criteria));
1104 err = mlx5_modify_nic_vport_context(port_mdev, in, inlen);
1106 mlx5_nic_vport_disable_roce(port_mdev);
1112 EXPORT_SYMBOL_GPL(mlx5_nic_vport_affiliate_multiport);
1114 int mlx5_nic_vport_unaffiliate_multiport(struct mlx5_core_dev *port_mdev)
1116 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1120 in = kvzalloc(inlen, GFP_KERNEL);
1124 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1125 MLX5_SET(modify_nic_vport_context_in, in,
1126 nic_vport_context.affiliated_vhca_id, 0);
1127 MLX5_SET(modify_nic_vport_context_in, in,
1128 nic_vport_context.affiliation_criteria, 0);
1130 err = mlx5_modify_nic_vport_context(port_mdev, in, inlen);
1132 mlx5_nic_vport_disable_roce(port_mdev);
1137 EXPORT_SYMBOL_GPL(mlx5_nic_vport_unaffiliate_multiport);
1139 u64 mlx5_query_nic_system_image_guid(struct mlx5_core_dev *mdev)
1141 int port_type_cap = MLX5_CAP_GEN(mdev, port_type);
1144 if (mdev->sys_image_guid)
1145 return mdev->sys_image_guid;
1147 if (port_type_cap == MLX5_CAP_PORT_TYPE_ETH)
1148 mlx5_query_nic_vport_system_image_guid(mdev, &tmp);
1150 mlx5_query_hca_vport_system_image_guid(mdev, &tmp);
1152 mdev->sys_image_guid = tmp;
1156 EXPORT_SYMBOL_GPL(mlx5_query_nic_system_image_guid);
1159 * mlx5_eswitch_get_total_vports - Get total vports of the eswitch
1161 * @dev: Pointer to core device
1163 * mlx5_eswitch_get_total_vports returns total number of vports for
1166 u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev)
1168 return MLX5_SPECIAL_VPORTS(dev) + mlx5_core_max_vfs(dev);
1170 EXPORT_SYMBOL(mlx5_eswitch_get_total_vports);