drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 /* ethtool support for igb */
   5
   6 #include <linux/vmalloc.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/pci.h>
   9 #include <linux/delay.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/if_ether.h>
  12 #include <linux/ethtool.h>
  13 #include <linux/sched.h>
  14 #include <linux/slab.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/highmem.h>
  17 #include <linux/mdio.h>
  18
  19 #include "igb.h"
  20
  21 struct igb_stats {
  22         char stat_string[ETH_GSTRING_LEN];
  23         int sizeof_stat;
  24         int stat_offset;
  25 };
  26
  27 #define IGB_STAT(_name, _stat) { \
  28         .stat_string = _name, \
  29         .sizeof_stat = sizeof_field(struct igb_adapter, _stat), \
  30         .stat_offset = offsetof(struct igb_adapter, _stat) \
  31 }
  32 static const struct igb_stats igb_gstrings_stats[] = {
  33         IGB_STAT("rx_packets", stats.gprc),
  34         IGB_STAT("tx_packets", stats.gptc),
  35         IGB_STAT("rx_bytes", stats.gorc),
  36         IGB_STAT("tx_bytes", stats.gotc),
  37         IGB_STAT("rx_broadcast", stats.bprc),
  38         IGB_STAT("tx_broadcast", stats.bptc),
  39         IGB_STAT("rx_multicast", stats.mprc),
  40         IGB_STAT("tx_multicast", stats.mptc),
  41         IGB_STAT("multicast", stats.mprc),
  42         IGB_STAT("collisions", stats.colc),
  43         IGB_STAT("rx_crc_errors", stats.crcerrs),
  44         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  45         IGB_STAT("rx_missed_errors", stats.mpc),
  46         IGB_STAT("tx_aborted_errors", stats.ecol),
  47         IGB_STAT("tx_carrier_errors", stats.tncrs),
  48         IGB_STAT("tx_window_errors", stats.latecol),
  49         IGB_STAT("tx_abort_late_coll", stats.latecol),
  50         IGB_STAT("tx_deferred_ok", stats.dc),
  51         IGB_STAT("tx_single_coll_ok", stats.scc),
  52         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  53         IGB_STAT("tx_timeout_count", tx_timeout_count),
  54         IGB_STAT("rx_long_length_errors", stats.roc),
  55         IGB_STAT("rx_short_length_errors", stats.ruc),
  56         IGB_STAT("rx_align_errors", stats.algnerrc),
  57         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  58         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  59         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  60         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  61         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  62         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  63         IGB_STAT("rx_long_byte_count", stats.gorc),
  64         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  65         IGB_STAT("tx_smbus", stats.mgptc),
  66         IGB_STAT("rx_smbus", stats.mgprc),
  67         IGB_STAT("dropped_smbus", stats.mgpdc),
  68         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  69         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  70         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  71         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  72         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  73         IGB_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
  74         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  75 };
  76
  77 #define IGB_NETDEV_STAT(_net_stat) { \
  78         .stat_string = __stringify(_net_stat), \
  79         .sizeof_stat = sizeof_field(struct rtnl_link_stats64, _net_stat), \
  80         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
  81 }
  82 static const struct igb_stats igb_gstrings_net_stats[] = {
  83         IGB_NETDEV_STAT(rx_errors),
  84         IGB_NETDEV_STAT(tx_errors),
  85         IGB_NETDEV_STAT(tx_dropped),
  86         IGB_NETDEV_STAT(rx_length_errors),
  87         IGB_NETDEV_STAT(rx_over_errors),
  88         IGB_NETDEV_STAT(rx_frame_errors),
  89         IGB_NETDEV_STAT(rx_fifo_errors),
  90         IGB_NETDEV_STAT(tx_fifo_errors),
  91         IGB_NETDEV_STAT(tx_heartbeat_errors)
  92 };
  93
  94 #define IGB_GLOBAL_STATS_LEN    \
  95         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
  96 #define IGB_NETDEV_STATS_LEN    \
  97         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
  98 #define IGB_RX_QUEUE_STATS_LEN \
  99         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 100
 101 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 102
 103 #define IGB_QUEUE_STATS_LEN \
 104         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 105           IGB_RX_QUEUE_STATS_LEN) + \
 106          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 107           IGB_TX_QUEUE_STATS_LEN))
 108 #define IGB_STATS_LEN \
 109         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 110
 111 enum igb_diagnostics_results {
 112         TEST_REG = 0,
 113         TEST_EEP,
 114         TEST_IRQ,
 115         TEST_LOOP,
 116         TEST_LINK
 117 };
 118
 119 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 120         [TEST_REG]  = "Register test  (offline)",
 121         [TEST_EEP]  = "Eeprom test    (offline)",
 122         [TEST_IRQ]  = "Interrupt test (offline)",
 123         [TEST_LOOP] = "Loopback test  (offline)",
 124         [TEST_LINK] = "Link test   (on/offline)"
 125 };
 126 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 127
 128 static const char igb_priv_flags_strings[][ETH_GSTRING_LEN] = {
 129 #define IGB_PRIV_FLAGS_LEGACY_RX        BIT(0)
 130         "legacy-rx",
 131 };
 132
 133 #define IGB_PRIV_FLAGS_STR_LEN ARRAY_SIZE(igb_priv_flags_strings)
 134
 135 static int igb_get_link_ksettings(struct net_device *netdev,
 136                                   struct ethtool_link_ksettings *cmd)
 137 {
 138         struct igb_adapter *adapter = netdev_priv(netdev);
 139         struct e1000_hw *hw = &adapter->hw;
 140         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
 141         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
 142         u32 status;
 143         u32 speed;
 144         u32 supported, advertising;
 145
 146         status = rd32(E1000_STATUS);
 147         if (hw->phy.media_type == e1000_media_type_copper) {
 148
 149                 supported = (SUPPORTED_10baseT_Half |
 150                              SUPPORTED_10baseT_Full |
 151                              SUPPORTED_100baseT_Half |
 152                              SUPPORTED_100baseT_Full |
 153                              SUPPORTED_1000baseT_Full|
 154                              SUPPORTED_Autoneg |
 155                              SUPPORTED_TP |
 156                              SUPPORTED_Pause);
 157                 advertising = ADVERTISED_TP;
 158
 159                 if (hw->mac.autoneg == 1) {
 160                         advertising |= ADVERTISED_Autoneg;
 161                         /* the e1000 autoneg seems to match ethtool nicely */
 162                         advertising |= hw->phy.autoneg_advertised;
 163                 }
 164
 165                 cmd->base.port = PORT_TP;
 166                 cmd->base.phy_address = hw->phy.addr;
 167         } else {
 168                 supported = (SUPPORTED_FIBRE |
 169                              SUPPORTED_1000baseKX_Full |
 170                              SUPPORTED_Autoneg |
 171                              SUPPORTED_Pause);
 172                 advertising = (ADVERTISED_FIBRE |
 173                                ADVERTISED_1000baseKX_Full);
 174                 if (hw->mac.type == e1000_i354) {
 175                         if ((hw->device_id ==
 176                              E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) &&
 177                             !(status & E1000_STATUS_2P5_SKU_OVER)) {
 178                                 supported |= SUPPORTED_2500baseX_Full;
 179                                 supported &= ~SUPPORTED_1000baseKX_Full;
 180                                 advertising |= ADVERTISED_2500baseX_Full;
 181                                 advertising &= ~ADVERTISED_1000baseKX_Full;
 182                         }
 183                 }
 184                 if (eth_flags->e100_base_fx || eth_flags->e100_base_lx) {
 185                         supported |= SUPPORTED_100baseT_Full;
 186                         advertising |= ADVERTISED_100baseT_Full;
 187                 }
 188                 if (hw->mac.autoneg == 1)
 189                         advertising |= ADVERTISED_Autoneg;
 190
 191                 cmd->base.port = PORT_FIBRE;
 192         }
 193         if (hw->mac.autoneg != 1)
 194                 advertising &= ~(ADVERTISED_Pause |
 195                                  ADVERTISED_Asym_Pause);
 196
 197         switch (hw->fc.requested_mode) {
 198         case e1000_fc_full:
 199                 advertising |= ADVERTISED_Pause;
 200                 break;
 201         case e1000_fc_rx_pause:
 202                 advertising |= (ADVERTISED_Pause |
 203                                 ADVERTISED_Asym_Pause);
 204                 break;
 205         case e1000_fc_tx_pause:
 206                 advertising |=  ADVERTISED_Asym_Pause;
 207                 break;
 208         default:
 209                 advertising &= ~(ADVERTISED_Pause |
 210                                  ADVERTISED_Asym_Pause);
 211         }
 212         if (status & E1000_STATUS_LU) {
 213                 if ((status & E1000_STATUS_2P5_SKU) &&
 214                     !(status & E1000_STATUS_2P5_SKU_OVER)) {
 215                         speed = SPEED_2500;
 216                 } else if (status & E1000_STATUS_SPEED_1000) {
 217                         speed = SPEED_1000;
 218                 } else if (status & E1000_STATUS_SPEED_100) {
 219                         speed = SPEED_100;
 220                 } else {
 221                         speed = SPEED_10;
 222                 }
 223                 if ((status & E1000_STATUS_FD) ||
 224                     hw->phy.media_type != e1000_media_type_copper)
 225                         cmd->base.duplex = DUPLEX_FULL;
 226                 else
 227                         cmd->base.duplex = DUPLEX_HALF;
 228         } else {
 229                 speed = SPEED_UNKNOWN;
 230                 cmd->base.duplex = DUPLEX_UNKNOWN;
 231         }
 232         cmd->base.speed = speed;
 233         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 234             hw->mac.autoneg)
 235                 cmd->base.autoneg = AUTONEG_ENABLE;
 236         else
 237                 cmd->base.autoneg = AUTONEG_DISABLE;
 238
 239         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 240         if (hw->phy.media_type == e1000_media_type_copper)
 241                 cmd->base.eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 242                                                       ETH_TP_MDI;
 243         else
 244                 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
 245
 246         if (hw->phy.mdix == AUTO_ALL_MODES)
 247                 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 248         else
 249                 cmd->base.eth_tp_mdix_ctrl = hw->phy.mdix;
 250
 251         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
 252                                                 supported);
 253         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
 254                                                 advertising);
 255
 256         return 0;
 257 }
 258
 259 static int igb_set_link_ksettings(struct net_device *netdev,
 260                                   const struct ethtool_link_ksettings *cmd)
 261 {
 262         struct igb_adapter *adapter = netdev_priv(netdev);
 263         struct e1000_hw *hw = &adapter->hw;
 264         u32 advertising;
 265
 266         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 267          * cannot be changed
 268          */
 269         if (igb_check_reset_block(hw)) {
 270                 dev_err(&adapter->pdev->dev,
 271                         "Cannot change link characteristics when SoL/IDER is active.\n");
 272                 return -EINVAL;
 273         }
 274
 275         /* MDI setting is only allowed when autoneg enabled because
 276          * some hardware doesn't allow MDI setting when speed or
 277          * duplex is forced.
 278          */
 279         if (cmd->base.eth_tp_mdix_ctrl) {
 280                 if (hw->phy.media_type != e1000_media_type_copper)
 281                         return -EOPNOTSUPP;
 282
 283                 if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 284                     (cmd->base.autoneg != AUTONEG_ENABLE)) {
 285                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 286                         return -EINVAL;
 287                 }
 288         }
 289
 290         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 291                 usleep_range(1000, 2000);
 292
 293         ethtool_convert_link_mode_to_legacy_u32(&advertising,
 294                                                 cmd->link_modes.advertising);
 295
 296         if (cmd->base.autoneg == AUTONEG_ENABLE) {
 297                 hw->mac.autoneg = 1;
 298                 if (hw->phy.media_type == e1000_media_type_fiber) {
 299                         hw->phy.autoneg_advertised = advertising |
 300                                                      ADVERTISED_FIBRE |
 301                                                      ADVERTISED_Autoneg;
 302                         switch (adapter->link_speed) {
 303                         case SPEED_2500:
 304                                 hw->phy.autoneg_advertised =
 305                                         ADVERTISED_2500baseX_Full;
 306                                 break;
 307                         case SPEED_1000:
 308                                 hw->phy.autoneg_advertised =
 309                                         ADVERTISED_1000baseT_Full;
 310                                 break;
 311                         case SPEED_100:
 312                                 hw->phy.autoneg_advertised =
 313                                         ADVERTISED_100baseT_Full;
 314                                 break;
 315                         default:
 316                                 break;
 317                         }
 318                 } else {
 319                         hw->phy.autoneg_advertised = advertising |
 320                                                      ADVERTISED_TP |
 321                                                      ADVERTISED_Autoneg;
 322                 }
 323                 advertising = hw->phy.autoneg_advertised;
 324                 if (adapter->fc_autoneg)
 325                         hw->fc.requested_mode = e1000_fc_default;
 326         } else {
 327                 u32 speed = cmd->base.speed;
 328                 /* calling this overrides forced MDI setting */
 329                 if (igb_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
 330                         clear_bit(__IGB_RESETTING, &adapter->state);
 331                         return -EINVAL;
 332                 }
 333         }
 334
 335         /* MDI-X => 2; MDI => 1; Auto => 3 */
 336         if (cmd->base.eth_tp_mdix_ctrl) {
 337                 /* fix up the value for auto (3 => 0) as zero is mapped
 338                  * internally to auto
 339                  */
 340                 if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 341                         hw->phy.mdix = AUTO_ALL_MODES;
 342                 else
 343                         hw->phy.mdix = cmd->base.eth_tp_mdix_ctrl;
 344         }
 345
 346         /* reset the link */
 347         if (netif_running(adapter->netdev)) {
 348                 igb_down(adapter);
 349                 igb_up(adapter);
 350         } else
 351                 igb_reset(adapter);
 352
 353         clear_bit(__IGB_RESETTING, &adapter->state);
 354         return 0;
 355 }
 356
 357 static u32 igb_get_link(struct net_device *netdev)
 358 {
 359         struct igb_adapter *adapter = netdev_priv(netdev);
 360         struct e1000_mac_info *mac = &adapter->hw.mac;
 361
 362         /* If the link is not reported up to netdev, interrupts are disabled,
 363          * and so the physical link state may have changed since we last
 364          * looked. Set get_link_status to make sure that the true link
 365          * state is interrogated, rather than pulling a cached and possibly
 366          * stale link state from the driver.
 367          */
 368         if (!netif_carrier_ok(netdev))
 369                 mac->get_link_status = 1;
 370
 371         return igb_has_link(adapter);
 372 }
 373
 374 static void igb_get_pauseparam(struct net_device *netdev,
 375                                struct ethtool_pauseparam *pause)
 376 {
 377         struct igb_adapter *adapter = netdev_priv(netdev);
 378         struct e1000_hw *hw = &adapter->hw;
 379
 380         pause->autoneg =
 381                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 382
 383         if (hw->fc.current_mode == e1000_fc_rx_pause)
 384                 pause->rx_pause = 1;
 385         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 386                 pause->tx_pause = 1;
 387         else if (hw->fc.current_mode == e1000_fc_full) {
 388                 pause->rx_pause = 1;
 389                 pause->tx_pause = 1;
 390         }
 391 }
 392
 393 static int igb_set_pauseparam(struct net_device *netdev,
 394                               struct ethtool_pauseparam *pause)
 395 {
 396         struct igb_adapter *adapter = netdev_priv(netdev);
 397         struct e1000_hw *hw = &adapter->hw;
 398         int retval = 0;
 399         int i;
 400
 401         /* 100basefx does not support setting link flow control */
 402         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
 403                 return -EINVAL;
 404
 405         adapter->fc_autoneg = pause->autoneg;
 406
 407         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 408                 usleep_range(1000, 2000);
 409
 410         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 411                 hw->fc.requested_mode = e1000_fc_default;
 412                 if (netif_running(adapter->netdev)) {
 413                         igb_down(adapter);
 414                         igb_up(adapter);
 415                 } else {
 416                         igb_reset(adapter);
 417                 }
 418         } else {
 419                 if (pause->rx_pause && pause->tx_pause)
 420                         hw->fc.requested_mode = e1000_fc_full;
 421                 else if (pause->rx_pause && !pause->tx_pause)
 422                         hw->fc.requested_mode = e1000_fc_rx_pause;
 423                 else if (!pause->rx_pause && pause->tx_pause)
 424                         hw->fc.requested_mode = e1000_fc_tx_pause;
 425                 else if (!pause->rx_pause && !pause->tx_pause)
 426                         hw->fc.requested_mode = e1000_fc_none;
 427
 428                 hw->fc.current_mode = hw->fc.requested_mode;
 429
 430                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 431                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 432
 433                 /* Make sure SRRCTL considers new fc settings for each ring */
 434                 for (i = 0; i < adapter->num_rx_queues; i++) {
 435                         struct igb_ring *ring = adapter->rx_ring[i];
 436
 437                         igb_setup_srrctl(adapter, ring);
 438                 }
 439         }
 440
 441         clear_bit(__IGB_RESETTING, &adapter->state);
 442         return retval;
 443 }
 444
 445 static u32 igb_get_msglevel(struct net_device *netdev)
 446 {
 447         struct igb_adapter *adapter = netdev_priv(netdev);
 448         return adapter->msg_enable;
 449 }
 450
 451 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 452 {
 453         struct igb_adapter *adapter = netdev_priv(netdev);
 454         adapter->msg_enable = data;
 455 }
 456
 457 static int igb_get_regs_len(struct net_device *netdev)
 458 {
 459 #define IGB_REGS_LEN 740
 460         return IGB_REGS_LEN * sizeof(u32);
 461 }
 462
 463 static void igb_get_regs(struct net_device *netdev,
 464                          struct ethtool_regs *regs, void *p)
 465 {
 466         struct igb_adapter *adapter = netdev_priv(netdev);
 467         struct e1000_hw *hw = &adapter->hw;
 468         u32 *regs_buff = p;
 469         u8 i;
 470
 471         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 472
 473         regs->version = (1u << 24) | (hw->revision_id << 16) | hw->device_id;
 474
 475         /* General Registers */
 476         regs_buff[0] = rd32(E1000_CTRL);
 477         regs_buff[1] = rd32(E1000_STATUS);
 478         regs_buff[2] = rd32(E1000_CTRL_EXT);
 479         regs_buff[3] = rd32(E1000_MDIC);
 480         regs_buff[4] = rd32(E1000_SCTL);
 481         regs_buff[5] = rd32(E1000_CONNSW);
 482         regs_buff[6] = rd32(E1000_VET);
 483         regs_buff[7] = rd32(E1000_LEDCTL);
 484         regs_buff[8] = rd32(E1000_PBA);
 485         regs_buff[9] = rd32(E1000_PBS);
 486         regs_buff[10] = rd32(E1000_FRTIMER);
 487         regs_buff[11] = rd32(E1000_TCPTIMER);
 488
 489         /* NVM Register */
 490         regs_buff[12] = rd32(E1000_EECD);
 491
 492         /* Interrupt */
 493         /* Reading EICS for EICR because they read the
 494          * same but EICS does not clear on read
 495          */
 496         regs_buff[13] = rd32(E1000_EICS);
 497         regs_buff[14] = rd32(E1000_EICS);
 498         regs_buff[15] = rd32(E1000_EIMS);
 499         regs_buff[16] = rd32(E1000_EIMC);
 500         regs_buff[17] = rd32(E1000_EIAC);
 501         regs_buff[18] = rd32(E1000_EIAM);
 502         /* Reading ICS for ICR because they read the
 503          * same but ICS does not clear on read
 504          */
 505         regs_buff[19] = rd32(E1000_ICS);
 506         regs_buff[20] = rd32(E1000_ICS);
 507         regs_buff[21] = rd32(E1000_IMS);
 508         regs_buff[22] = rd32(E1000_IMC);
 509         regs_buff[23] = rd32(E1000_IAC);
 510         regs_buff[24] = rd32(E1000_IAM);
 511         regs_buff[25] = rd32(E1000_IMIRVP);
 512
 513         /* Flow Control */
 514         regs_buff[26] = rd32(E1000_FCAL);
 515         regs_buff[27] = rd32(E1000_FCAH);
 516         regs_buff[28] = rd32(E1000_FCTTV);
 517         regs_buff[29] = rd32(E1000_FCRTL);
 518         regs_buff[30] = rd32(E1000_FCRTH);
 519         regs_buff[31] = rd32(E1000_FCRTV);
 520
 521         /* Receive */
 522         regs_buff[32] = rd32(E1000_RCTL);
 523         regs_buff[33] = rd32(E1000_RXCSUM);
 524         regs_buff[34] = rd32(E1000_RLPML);
 525         regs_buff[35] = rd32(E1000_RFCTL);
 526         regs_buff[36] = rd32(E1000_MRQC);
 527         regs_buff[37] = rd32(E1000_VT_CTL);
 528
 529         /* Transmit */
 530         regs_buff[38] = rd32(E1000_TCTL);
 531         regs_buff[39] = rd32(E1000_TCTL_EXT);
 532         regs_buff[40] = rd32(E1000_TIPG);
 533         regs_buff[41] = rd32(E1000_DTXCTL);
 534
 535         /* Wake Up */
 536         regs_buff[42] = rd32(E1000_WUC);
 537         regs_buff[43] = rd32(E1000_WUFC);
 538         regs_buff[44] = rd32(E1000_WUS);
 539         regs_buff[45] = rd32(E1000_IPAV);
 540         regs_buff[46] = rd32(E1000_WUPL);
 541
 542         /* MAC */
 543         regs_buff[47] = rd32(E1000_PCS_CFG0);
 544         regs_buff[48] = rd32(E1000_PCS_LCTL);
 545         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 546         regs_buff[50] = rd32(E1000_PCS_ANADV);
 547         regs_buff[51] = rd32(E1000_PCS_LPAB);
 548         regs_buff[52] = rd32(E1000_PCS_NPTX);
 549         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 550
 551         /* Statistics */
 552         regs_buff[54] = adapter->stats.crcerrs;
 553         regs_buff[55] = adapter->stats.algnerrc;
 554         regs_buff[56] = adapter->stats.symerrs;
 555         regs_buff[57] = adapter->stats.rxerrc;
 556         regs_buff[58] = adapter->stats.mpc;
 557         regs_buff[59] = adapter->stats.scc;
 558         regs_buff[60] = adapter->stats.ecol;
 559         regs_buff[61] = adapter->stats.mcc;
 560         regs_buff[62] = adapter->stats.latecol;
 561         regs_buff[63] = adapter->stats.colc;
 562         regs_buff[64] = adapter->stats.dc;
 563         regs_buff[65] = adapter->stats.tncrs;
 564         regs_buff[66] = adapter->stats.sec;
 565         regs_buff[67] = adapter->stats.htdpmc;
 566         regs_buff[68] = adapter->stats.rlec;
 567         regs_buff[69] = adapter->stats.xonrxc;
 568         regs_buff[70] = adapter->stats.xontxc;
 569         regs_buff[71] = adapter->stats.xoffrxc;
 570         regs_buff[72] = adapter->stats.xofftxc;
 571         regs_buff[73] = adapter->stats.fcruc;
 572         regs_buff[74] = adapter->stats.prc64;
 573         regs_buff[75] = adapter->stats.prc127;
 574         regs_buff[76] = adapter->stats.prc255;
 575         regs_buff[77] = adapter->stats.prc511;
 576         regs_buff[78] = adapter->stats.prc1023;
 577         regs_buff[79] = adapter->stats.prc1522;
 578         regs_buff[80] = adapter->stats.gprc;
 579         regs_buff[81] = adapter->stats.bprc;
 580         regs_buff[82] = adapter->stats.mprc;
 581         regs_buff[83] = adapter->stats.gptc;
 582         regs_buff[84] = adapter->stats.gorc;
 583         regs_buff[86] = adapter->stats.gotc;
 584         regs_buff[88] = adapter->stats.rnbc;
 585         regs_buff[89] = adapter->stats.ruc;
 586         regs_buff[90] = adapter->stats.rfc;
 587         regs_buff[91] = adapter->stats.roc;
 588         regs_buff[92] = adapter->stats.rjc;
 589         regs_buff[93] = adapter->stats.mgprc;
 590         regs_buff[94] = adapter->stats.mgpdc;
 591         regs_buff[95] = adapter->stats.mgptc;
 592         regs_buff[96] = adapter->stats.tor;
 593         regs_buff[98] = adapter->stats.tot;
 594         regs_buff[100] = adapter->stats.tpr;
 595         regs_buff[101] = adapter->stats.tpt;
 596         regs_buff[102] = adapter->stats.ptc64;
 597         regs_buff[103] = adapter->stats.ptc127;
 598         regs_buff[104] = adapter->stats.ptc255;
 599         regs_buff[105] = adapter->stats.ptc511;
 600         regs_buff[106] = adapter->stats.ptc1023;
 601         regs_buff[107] = adapter->stats.ptc1522;
 602         regs_buff[108] = adapter->stats.mptc;
 603         regs_buff[109] = adapter->stats.bptc;
 604         regs_buff[110] = adapter->stats.tsctc;
 605         regs_buff[111] = adapter->stats.iac;
 606         regs_buff[112] = adapter->stats.rpthc;
 607         regs_buff[113] = adapter->stats.hgptc;
 608         regs_buff[114] = adapter->stats.hgorc;
 609         regs_buff[116] = adapter->stats.hgotc;
 610         regs_buff[118] = adapter->stats.lenerrs;
 611         regs_buff[119] = adapter->stats.scvpc;
 612         regs_buff[120] = adapter->stats.hrmpc;
 613
 614         for (i = 0; i < 4; i++)
 615                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 616         for (i = 0; i < 4; i++)
 617                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 618         for (i = 0; i < 4; i++)
 619                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 620         for (i = 0; i < 4; i++)
 621                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 622         for (i = 0; i < 4; i++)
 623                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 624         for (i = 0; i < 4; i++)
 625                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 626         for (i = 0; i < 4; i++)
 627                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 628         for (i = 0; i < 4; i++)
 629                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 630
 631         for (i = 0; i < 10; i++)
 632                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 633         for (i = 0; i < 8; i++)
 634                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 635         for (i = 0; i < 8; i++)
 636                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 637         for (i = 0; i < 16; i++)
 638                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 639         for (i = 0; i < 16; i++)
 640                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 641
 642         for (i = 0; i < 4; i++)
 643                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 644         for (i = 0; i < 4; i++)
 645                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 646         for (i = 0; i < 4; i++)
 647                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 648         for (i = 0; i < 4; i++)
 649                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 650         for (i = 0; i < 4; i++)
 651                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 652         for (i = 0; i < 4; i++)
 653                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 654         for (i = 0; i < 4; i++)
 655                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 656         for (i = 0; i < 4; i++)
 657                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 658         for (i = 0; i < 4; i++)
 659                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 660
 661         for (i = 0; i < 4; i++)
 662                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 663         for (i = 0; i < 4; i++)
 664                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 665         for (i = 0; i < 32; i++)
 666                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 667         for (i = 0; i < 128; i++)
 668                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 669         for (i = 0; i < 128; i++)
 670                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 671         for (i = 0; i < 4; i++)
 672                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 673
 674         regs_buff[547] = rd32(E1000_TDFH);
 675         regs_buff[548] = rd32(E1000_TDFT);
 676         regs_buff[549] = rd32(E1000_TDFHS);
 677         regs_buff[550] = rd32(E1000_TDFPC);
 678
 679         if (hw->mac.type > e1000_82580) {
 680                 regs_buff[551] = adapter->stats.o2bgptc;
 681                 regs_buff[552] = adapter->stats.b2ospc;
 682                 regs_buff[553] = adapter->stats.o2bspc;
 683                 regs_buff[554] = adapter->stats.b2ogprc;
 684         }
 685
 686         if (hw->mac.type == e1000_82576) {
 687                 for (i = 0; i < 12; i++)
 688                         regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 689                 for (i = 0; i < 4; i++)
 690                         regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 691                 for (i = 0; i < 12; i++)
 692                         regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 693                 for (i = 0; i < 12; i++)
 694                         regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 695                 for (i = 0; i < 12; i++)
 696                         regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 697                 for (i = 0; i < 12; i++)
 698                         regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 699                 for (i = 0; i < 12; i++)
 700                         regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 701                 for (i = 0; i < 12; i++)
 702                         regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 703
 704                 for (i = 0; i < 12; i++)
 705                         regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 706                 for (i = 0; i < 12; i++)
 707                         regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 708                 for (i = 0; i < 12; i++)
 709                         regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 710                 for (i = 0; i < 12; i++)
 711                         regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 712                 for (i = 0; i < 12; i++)
 713                         regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 714                 for (i = 0; i < 12; i++)
 715                         regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 716                 for (i = 0; i < 12; i++)
 717                         regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 718                 for (i = 0; i < 12; i++)
 719                         regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 720         }
 721
 722         if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211)
 723                 regs_buff[739] = rd32(E1000_I210_RR2DCDELAY);
 724 }
 725
 726 static int igb_get_eeprom_len(struct net_device *netdev)
 727 {
 728         struct igb_adapter *adapter = netdev_priv(netdev);
 729         return adapter->hw.nvm.word_size * 2;
 730 }
 731
 732 static int igb_get_eeprom(struct net_device *netdev,
 733                           struct ethtool_eeprom *eeprom, u8 *bytes)
 734 {
 735         struct igb_adapter *adapter = netdev_priv(netdev);
 736         struct e1000_hw *hw = &adapter->hw;
 737         u16 *eeprom_buff;
 738         int first_word, last_word;
 739         int ret_val = 0;
 740         u16 i;
 741
 742         if (eeprom->len == 0)
 743                 return -EINVAL;
 744
 745         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 746
 747         first_word = eeprom->offset >> 1;
 748         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 749
 750         eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
 751                                     GFP_KERNEL);
 752         if (!eeprom_buff)
 753                 return -ENOMEM;
 754
 755         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 756                 ret_val = hw->nvm.ops.read(hw, first_word,
 757                                            last_word - first_word + 1,
 758                                            eeprom_buff);
 759         else {
 760                 for (i = 0; i < last_word - first_word + 1; i++) {
 761                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 762                                                    &eeprom_buff[i]);
 763                         if (ret_val)
 764                                 break;
 765                 }
 766         }
 767
 768         /* Device's eeprom is always little-endian, word addressable */
 769         for (i = 0; i < last_word - first_word + 1; i++)
 770                 le16_to_cpus(&eeprom_buff[i]);
 771
 772         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 773                         eeprom->len);
 774         kfree(eeprom_buff);
 775
 776         return ret_val;
 777 }
 778
 779 static int igb_set_eeprom(struct net_device *netdev,
 780                           struct ethtool_eeprom *eeprom, u8 *bytes)
 781 {
 782         struct igb_adapter *adapter = netdev_priv(netdev);
 783         struct e1000_hw *hw = &adapter->hw;
 784         u16 *eeprom_buff;
 785         void *ptr;
 786         int max_len, first_word, last_word, ret_val = 0;
 787         u16 i;
 788
 789         if (eeprom->len == 0)
 790                 return -EOPNOTSUPP;
 791
 792         if ((hw->mac.type >= e1000_i210) &&
 793             !igb_get_flash_presence_i210(hw)) {
 794                 return -EOPNOTSUPP;
 795         }
 796
 797         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 798                 return -EFAULT;
 799
 800         max_len = hw->nvm.word_size * 2;
 801
 802         first_word = eeprom->offset >> 1;
 803         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 804         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 805         if (!eeprom_buff)
 806                 return -ENOMEM;
 807
 808         ptr = (void *)eeprom_buff;
 809
 810         if (eeprom->offset & 1) {
 811                 /* need read/modify/write of first changed EEPROM word
 812                  * only the second byte of the word is being modified
 813                  */
 814                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 815                                             &eeprom_buff[0]);
 816                 ptr++;
 817         }
 818         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 819                 /* need read/modify/write of last changed EEPROM word
 820                  * only the first byte of the word is being modified
 821                  */
 822                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 823                                    &eeprom_buff[last_word - first_word]);
 824         }
 825
 826         /* Device's eeprom is always little-endian, word addressable */
 827         for (i = 0; i < last_word - first_word + 1; i++)
 828                 le16_to_cpus(&eeprom_buff[i]);
 829
 830         memcpy(ptr, bytes, eeprom->len);
 831
 832         for (i = 0; i < last_word - first_word + 1; i++)
 833                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 834
 835         ret_val = hw->nvm.ops.write(hw, first_word,
 836                                     last_word - first_word + 1, eeprom_buff);
 837
 838         /* Update the checksum if nvm write succeeded */
 839         if (ret_val == 0)
 840                 hw->nvm.ops.update(hw);
 841
 842         igb_set_fw_version(adapter);
 843         kfree(eeprom_buff);
 844         return ret_val;
 845 }
 846
 847 static void igb_get_drvinfo(struct net_device *netdev,
 848                             struct ethtool_drvinfo *drvinfo)
 849 {
 850         struct igb_adapter *adapter = netdev_priv(netdev);
 851
 852         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 853         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
 854
 855         /* EEPROM image version # is reported as firmware version # for
 856          * 82575 controllers
 857          */
 858         strlcpy(drvinfo->fw_version, adapter->fw_version,
 859                 sizeof(drvinfo->fw_version));
 860         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 861                 sizeof(drvinfo->bus_info));
 862
 863         drvinfo->n_priv_flags = IGB_PRIV_FLAGS_STR_LEN;
 864 }
 865
 866 static void igb_get_ringparam(struct net_device *netdev,
 867                               struct ethtool_ringparam *ring)
 868 {
 869         struct igb_adapter *adapter = netdev_priv(netdev);
 870
 871         ring->rx_max_pending = IGB_MAX_RXD;
 872         ring->tx_max_pending = IGB_MAX_TXD;
 873         ring->rx_pending = adapter->rx_ring_count;
 874         ring->tx_pending = adapter->tx_ring_count;
 875 }
 876
 877 static int igb_set_ringparam(struct net_device *netdev,
 878                              struct ethtool_ringparam *ring)
 879 {
 880         struct igb_adapter *adapter = netdev_priv(netdev);
 881         struct igb_ring *temp_ring;
 882         int i, err = 0;
 883         u16 new_rx_count, new_tx_count;
 884
 885         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 886                 return -EINVAL;
 887
 888         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 889         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 890         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 891
 892         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 893         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 894         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 895
 896         if ((new_tx_count == adapter->tx_ring_count) &&
 897             (new_rx_count == adapter->rx_ring_count)) {
 898                 /* nothing to do */
 899                 return 0;
 900         }
 901
 902         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 903                 usleep_range(1000, 2000);
 904
 905         if (!netif_running(adapter->netdev)) {
 906                 for (i = 0; i < adapter->num_tx_queues; i++)
 907                         adapter->tx_ring[i]->count = new_tx_count;
 908                 for (i = 0; i < adapter->num_rx_queues; i++)
 909                         adapter->rx_ring[i]->count = new_rx_count;
 910                 adapter->tx_ring_count = new_tx_count;
 911                 adapter->rx_ring_count = new_rx_count;
 912                 goto clear_reset;
 913         }
 914
 915         if (adapter->num_tx_queues > adapter->num_rx_queues)
 916                 temp_ring = vmalloc(array_size(sizeof(struct igb_ring),
 917                                                adapter->num_tx_queues));
 918         else
 919                 temp_ring = vmalloc(array_size(sizeof(struct igb_ring),
 920                                                adapter->num_rx_queues));
 921
 922         if (!temp_ring) {
 923                 err = -ENOMEM;
 924                 goto clear_reset;
 925         }
 926
 927         igb_down(adapter);
 928
 929         /* We can't just free everything and then setup again,
 930          * because the ISRs in MSI-X mode get passed pointers
 931          * to the Tx and Rx ring structs.
 932          */
 933         if (new_tx_count != adapter->tx_ring_count) {
 934                 for (i = 0; i < adapter->num_tx_queues; i++) {
 935                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 936                                sizeof(struct igb_ring));
 937
 938                         temp_ring[i].count = new_tx_count;
 939                         err = igb_setup_tx_resources(&temp_ring[i]);
 940                         if (err) {
 941                                 while (i) {
 942                                         i--;
 943                                         igb_free_tx_resources(&temp_ring[i]);
 944                                 }
 945                                 goto err_setup;
 946                         }
 947                 }
 948
 949                 for (i = 0; i < adapter->num_tx_queues; i++) {
 950                         igb_free_tx_resources(adapter->tx_ring[i]);
 951
 952                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 953                                sizeof(struct igb_ring));
 954                 }
 955
 956                 adapter->tx_ring_count = new_tx_count;
 957         }
 958
 959         if (new_rx_count != adapter->rx_ring_count) {
 960                 for (i = 0; i < adapter->num_rx_queues; i++) {
 961                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 962                                sizeof(struct igb_ring));
 963
 964                         temp_ring[i].count = new_rx_count;
 965                         err = igb_setup_rx_resources(&temp_ring[i]);
 966                         if (err) {
 967                                 while (i) {
 968                                         i--;
 969                                         igb_free_rx_resources(&temp_ring[i]);
 970                                 }
 971                                 goto err_setup;
 972                         }
 973
 974                 }
 975
 976                 for (i = 0; i < adapter->num_rx_queues; i++) {
 977                         igb_free_rx_resources(adapter->rx_ring[i]);
 978
 979                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 980                                sizeof(struct igb_ring));
 981                 }
 982
 983                 adapter->rx_ring_count = new_rx_count;
 984         }
 985 err_setup:
 986         igb_up(adapter);
 987         vfree(temp_ring);
 988 clear_reset:
 989         clear_bit(__IGB_RESETTING, &adapter->state);
 990         return err;
 991 }
 992
 993 /* ethtool register test data */
 994 struct igb_reg_test {
 995         u16 reg;
 996         u16 reg_offset;
 997         u16 array_len;
 998         u16 test_type;
 999         u32 mask;
1000         u32 write;
1001 };
1002
1003 /* In the hardware, registers are laid out either singly, in arrays
1004  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
1005  * most tests take place on arrays or single registers (handled
1006  * as a single-element array) and special-case the tables.
1007  * Table tests are always pattern tests.
1008  *
1009  * We also make provision for some required setup steps by specifying
1010  * registers to be written without any read-back testing.
1011  */
1012
1013 #define PATTERN_TEST    1
1014 #define SET_READ_TEST   2
1015 #define WRITE_NO_TEST   3
1016 #define TABLE32_TEST    4
1017 #define TABLE64_TEST_LO 5
1018 #define TABLE64_TEST_HI 6
1019
1020 /* i210 reg test */
1021 static struct igb_reg_test reg_test_i210[] = {
1022         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1023         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1024         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1025         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1026         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1027         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1028         /* RDH is read-only for i210, only test RDT. */
1029         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1030         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1031         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1032         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1033         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1034         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1035         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1036         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1037         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1038         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1039         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1040         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1041         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1042                                                 0xFFFFFFFF, 0xFFFFFFFF },
1043         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1044                                                 0x900FFFFF, 0xFFFFFFFF },
1045         { E1000_MTA,       0, 128, TABLE32_TEST,
1046                                                 0xFFFFFFFF, 0xFFFFFFFF },
1047         { 0, 0, 0, 0, 0 }
1048 };
1049
1050 /* i350 reg test */
1051 static struct igb_reg_test reg_test_i350[] = {
1052         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1053         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1054         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1055         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1056         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1057         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1058         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1059         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1060         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1061         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1062         /* RDH is read-only for i350, only test RDT. */
1063         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1064         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1065         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1066         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1067         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1068         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1069         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1070         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1071         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1072         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1073         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1074         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1075         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1076         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1077         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1078         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1079         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1080         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1081                                                 0xFFFFFFFF, 0xFFFFFFFF },
1082         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1083                                                 0xC3FFFFFF, 0xFFFFFFFF },
1084         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1085                                                 0xFFFFFFFF, 0xFFFFFFFF },
1086         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1087                                                 0xC3FFFFFF, 0xFFFFFFFF },
1088         { E1000_MTA,       0, 128, TABLE32_TEST,
1089                                                 0xFFFFFFFF, 0xFFFFFFFF },
1090         { 0, 0, 0, 0 }
1091 };
1092
1093 /* 82580 reg test */
1094 static struct igb_reg_test reg_test_82580[] = {
1095         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1096         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1097         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1098         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1099         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1100         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1101         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1102         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1103         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1104         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1105         /* RDH is read-only for 82580, only test RDT. */
1106         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1107         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1108         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1109         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1110         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1111         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1112         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1113         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1114         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1115         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1116         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1117         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1118         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1119         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1120         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1121         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1122         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1123         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1124                                                 0xFFFFFFFF, 0xFFFFFFFF },
1125         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1126                                                 0x83FFFFFF, 0xFFFFFFFF },
1127         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1128                                                 0xFFFFFFFF, 0xFFFFFFFF },
1129         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1130                                                 0x83FFFFFF, 0xFFFFFFFF },
1131         { E1000_MTA,       0, 128, TABLE32_TEST,
1132                                                 0xFFFFFFFF, 0xFFFFFFFF },
1133         { 0, 0, 0, 0 }
1134 };
1135
1136 /* 82576 reg test */
1137 static struct igb_reg_test reg_test_82576[] = {
1138         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1139         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1140         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1141         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1142         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1143         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1144         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1145         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1146         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1147         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1148         /* Enable all RX queues before testing. */
1149         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1150           E1000_RXDCTL_QUEUE_ENABLE },
1151         { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST, 0,
1152           E1000_RXDCTL_QUEUE_ENABLE },
1153         /* RDH is read-only for 82576, only test RDT. */
1154         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1155         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1156         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1157         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1158         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1159         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1160         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1161         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1162         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1163         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1164         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1165         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1166         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1167         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1168         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1169         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1170         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1171         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1172         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1173         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1174         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1175         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1176         { 0, 0, 0, 0 }
1177 };
1178
1179 /* 82575 register test */
1180 static struct igb_reg_test reg_test_82575[] = {
1181         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1182         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1183         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1184         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1185         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1186         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1187         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1188         /* Enable all four RX queues before testing. */
1189         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1190           E1000_RXDCTL_QUEUE_ENABLE },
1191         /* RDH is read-only for 82575, only test RDT. */
1192         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1193         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1194         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1195         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1196         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1197         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1198         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1199         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1200         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1201         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1202         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1203         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1204         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1205         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1206         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1207         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1208         { 0, 0, 0, 0 }
1209 };
1210
1211 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1212                              int reg, u32 mask, u32 write)
1213 {
1214         struct e1000_hw *hw = &adapter->hw;
1215         u32 pat, val;
1216         static const u32 _test[] = {
1217                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1218         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1219                 wr32(reg, (_test[pat] & write));
1220                 val = rd32(reg) & mask;
1221                 if (val != (_test[pat] & write & mask)) {
1222                         dev_err(&adapter->pdev->dev,
1223                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1224                                 reg, val, (_test[pat] & write & mask));
1225                         *data = reg;
1226                         return true;
1227                 }
1228         }
1229
1230         return false;
1231 }
1232
1233 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1234                               int reg, u32 mask, u32 write)
1235 {
1236         struct e1000_hw *hw = &adapter->hw;
1237         u32 val;
1238
1239         wr32(reg, write & mask);
1240         val = rd32(reg);
1241         if ((write & mask) != (val & mask)) {
1242                 dev_err(&adapter->pdev->dev,
1243                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1244                         reg, (val & mask), (write & mask));
1245                 *data = reg;
1246                 return true;
1247         }
1248
1249         return false;
1250 }
1251
1252 #define REG_PATTERN_TEST(reg, mask, write) \
1253         do { \
1254                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1255                         return 1; \
1256         } while (0)
1257
1258 #define REG_SET_AND_CHECK(reg, mask, write) \
1259         do { \
1260                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1261                         return 1; \
1262         } while (0)
1263
1264 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1265 {
1266         struct e1000_hw *hw = &adapter->hw;
1267         struct igb_reg_test *test;
1268         u32 value, before, after;
1269         u32 i, toggle;
1270
1271         switch (adapter->hw.mac.type) {
1272         case e1000_i350:
1273         case e1000_i354:
1274                 test = reg_test_i350;
1275                 toggle = 0x7FEFF3FF;
1276                 break;
1277         case e1000_i210:
1278         case e1000_i211:
1279                 test = reg_test_i210;
1280                 toggle = 0x7FEFF3FF;
1281                 break;
1282         case e1000_82580:
1283                 test = reg_test_82580;
1284                 toggle = 0x7FEFF3FF;
1285                 break;
1286         case e1000_82576:
1287                 test = reg_test_82576;
1288                 toggle = 0x7FFFF3FF;
1289                 break;
1290         default:
1291                 test = reg_test_82575;
1292                 toggle = 0x7FFFF3FF;
1293                 break;
1294         }
1295
1296         /* Because the status register is such a special case,
1297          * we handle it separately from the rest of the register
1298          * tests.  Some bits are read-only, some toggle, and some
1299          * are writable on newer MACs.
1300          */
1301         before = rd32(E1000_STATUS);
1302         value = (rd32(E1000_STATUS) & toggle);
1303         wr32(E1000_STATUS, toggle);
1304         after = rd32(E1000_STATUS) & toggle;
1305         if (value != after) {
1306                 dev_err(&adapter->pdev->dev,
1307                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1308                         after, value);
1309                 *data = 1;
1310                 return 1;
1311         }
1312         /* restore previous status */
1313         wr32(E1000_STATUS, before);
1314
1315         /* Perform the remainder of the register test, looping through
1316          * the test table until we either fail or reach the null entry.
1317          */
1318         while (test->reg) {
1319                 for (i = 0; i < test->array_len; i++) {
1320                         switch (test->test_type) {
1321                         case PATTERN_TEST:
1322                                 REG_PATTERN_TEST(test->reg +
1323                                                 (i * test->reg_offset),
1324                                                 test->mask,
1325                                                 test->write);
1326                                 break;
1327                         case SET_READ_TEST:
1328                                 REG_SET_AND_CHECK(test->reg +
1329                                                 (i * test->reg_offset),
1330                                                 test->mask,
1331                                                 test->write);
1332                                 break;
1333                         case WRITE_NO_TEST:
1334                                 writel(test->write,
1335                                     (adapter->hw.hw_addr + test->reg)
1336                                         + (i * test->reg_offset));
1337                                 break;
1338                         case TABLE32_TEST:
1339                                 REG_PATTERN_TEST(test->reg + (i * 4),
1340                                                 test->mask,
1341                                                 test->write);
1342                                 break;
1343                         case TABLE64_TEST_LO:
1344                                 REG_PATTERN_TEST(test->reg + (i * 8),
1345                                                 test->mask,
1346                                                 test->write);
1347                                 break;
1348                         case TABLE64_TEST_HI:
1349                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1350                                                 test->mask,
1351                                                 test->write);
1352                                 break;
1353                         }
1354                 }
1355                 test++;
1356         }
1357
1358         *data = 0;
1359         return 0;
1360 }
1361
1362 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1363 {
1364         struct e1000_hw *hw = &adapter->hw;
1365
1366         *data = 0;
1367
1368         /* Validate eeprom on all parts but flashless */
1369         switch (hw->mac.type) {
1370         case e1000_i210:
1371         case e1000_i211:
1372                 if (igb_get_flash_presence_i210(hw)) {
1373                         if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1374                                 *data = 2;
1375                 }
1376                 break;
1377         default:
1378                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1379                         *data = 2;
1380                 break;
1381         }
1382
1383         return *data;
1384 }
1385
1386 static irqreturn_t igb_test_intr(int irq, void *data)
1387 {
1388         struct igb_adapter *adapter = (struct igb_adapter *) data;
1389         struct e1000_hw *hw = &adapter->hw;
1390
1391         adapter->test_icr |= rd32(E1000_ICR);
1392
1393         return IRQ_HANDLED;
1394 }
1395
1396 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1397 {
1398         struct e1000_hw *hw = &adapter->hw;
1399         struct net_device *netdev = adapter->netdev;
1400         u32 mask, ics_mask, i = 0, shared_int = true;
1401         u32 irq = adapter->pdev->irq;
1402
1403         *data = 0;
1404
1405         /* Hook up test interrupt handler just for this test */
1406         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1407                 if (request_irq(adapter->msix_entries[0].vector,
1408                                 igb_test_intr, 0, netdev->name, adapter)) {
1409                         *data = 1;
1410                         return -1;
1411                 }
1412         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1413                 shared_int = false;
1414                 if (request_irq(irq,
1415                                 igb_test_intr, 0, netdev->name, adapter)) {
1416                         *data = 1;
1417                         return -1;
1418                 }
1419         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1420                                 netdev->name, adapter)) {
1421                 shared_int = false;
1422         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1423                  netdev->name, adapter)) {
1424                 *data = 1;
1425                 return -1;
1426         }
1427         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1428                 (shared_int ? "shared" : "unshared"));
1429
1430         /* Disable all the interrupts */
1431         wr32(E1000_IMC, ~0);
1432         wrfl();
1433         usleep_range(10000, 11000);
1434
1435         /* Define all writable bits for ICS */
1436         switch (hw->mac.type) {
1437         case e1000_82575:
1438                 ics_mask = 0x37F47EDD;
1439                 break;
1440         case e1000_82576:
1441                 ics_mask = 0x77D4FBFD;
1442                 break;
1443         case e1000_82580:
1444                 ics_mask = 0x77DCFED5;
1445                 break;
1446         case e1000_i350:
1447         case e1000_i354:
1448         case e1000_i210:
1449         case e1000_i211:
1450                 ics_mask = 0x77DCFED5;
1451                 break;
1452         default:
1453                 ics_mask = 0x7FFFFFFF;
1454                 break;
1455         }
1456
1457         /* Test each interrupt */
1458         for (; i < 31; i++) {
1459                 /* Interrupt to test */
1460                 mask = BIT(i);
1461
1462                 if (!(mask & ics_mask))
1463                         continue;
1464
1465                 if (!shared_int) {
1466                         /* Disable the interrupt to be reported in
1467                          * the cause register and then force the same
1468                          * interrupt and see if one gets posted.  If
1469                          * an interrupt was posted to the bus, the
1470                          * test failed.
1471                          */
1472                         adapter->test_icr = 0;
1473
1474                         /* Flush any pending interrupts */
1475                         wr32(E1000_ICR, ~0);
1476
1477                         wr32(E1000_IMC, mask);
1478                         wr32(E1000_ICS, mask);
1479                         wrfl();
1480                         usleep_range(10000, 11000);
1481
1482                         if (adapter->test_icr & mask) {
1483                                 *data = 3;
1484                                 break;
1485                         }
1486                 }
1487
1488                 /* Enable the interrupt to be reported in
1489                  * the cause register and then force the same
1490                  * interrupt and see if one gets posted.  If
1491                  * an interrupt was not posted to the bus, the
1492                  * test failed.
1493                  */
1494                 adapter->test_icr = 0;
1495
1496                 /* Flush any pending interrupts */
1497                 wr32(E1000_ICR, ~0);
1498
1499                 wr32(E1000_IMS, mask);
1500                 wr32(E1000_ICS, mask);
1501                 wrfl();
1502                 usleep_range(10000, 11000);
1503
1504                 if (!(adapter->test_icr & mask)) {
1505                         *data = 4;
1506                         break;
1507                 }
1508
1509                 if (!shared_int) {
1510                         /* Disable the other interrupts to be reported in
1511                          * the cause register and then force the other
1512                          * interrupts and see if any get posted.  If
1513                          * an interrupt was posted to the bus, the
1514                          * test failed.
1515                          */
1516                         adapter->test_icr = 0;
1517
1518                         /* Flush any pending interrupts */
1519                         wr32(E1000_ICR, ~0);
1520
1521                         wr32(E1000_IMC, ~mask);
1522                         wr32(E1000_ICS, ~mask);
1523                         wrfl();
1524                         usleep_range(10000, 11000);
1525
1526                         if (adapter->test_icr & mask) {
1527                                 *data = 5;
1528                                 break;
1529                         }
1530                 }
1531         }
1532
1533         /* Disable all the interrupts */
1534         wr32(E1000_IMC, ~0);
1535         wrfl();
1536         usleep_range(10000, 11000);
1537
1538         /* Unhook test interrupt handler */
1539         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1540                 free_irq(adapter->msix_entries[0].vector, adapter);
1541         else
1542                 free_irq(irq, adapter);
1543
1544         return *data;
1545 }
1546
1547 static void igb_free_desc_rings(struct igb_adapter *adapter)
1548 {
1549         igb_free_tx_resources(&adapter->test_tx_ring);
1550         igb_free_rx_resources(&adapter->test_rx_ring);
1551 }
1552
1553 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1554 {
1555         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1556         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1557         struct e1000_hw *hw = &adapter->hw;
1558         int ret_val;
1559
1560         /* Setup Tx descriptor ring and Tx buffers */
1561         tx_ring->count = IGB_DEFAULT_TXD;
1562         tx_ring->dev = &adapter->pdev->dev;
1563         tx_ring->netdev = adapter->netdev;
1564         tx_ring->reg_idx = adapter->vfs_allocated_count;
1565
1566         if (igb_setup_tx_resources(tx_ring)) {
1567                 ret_val = 1;
1568                 goto err_nomem;
1569         }
1570
1571         igb_setup_tctl(adapter);
1572         igb_configure_tx_ring(adapter, tx_ring);
1573
1574         /* Setup Rx descriptor ring and Rx buffers */
1575         rx_ring->count = IGB_DEFAULT_RXD;
1576         rx_ring->dev = &adapter->pdev->dev;
1577         rx_ring->netdev = adapter->netdev;
1578         rx_ring->reg_idx = adapter->vfs_allocated_count;
1579
1580         if (igb_setup_rx_resources(rx_ring)) {
1581                 ret_val = 3;
1582                 goto err_nomem;
1583         }
1584
1585         /* set the default queue to queue 0 of PF */
1586         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1587
1588         /* enable receive ring */
1589         igb_setup_rctl(adapter);
1590         igb_configure_rx_ring(adapter, rx_ring);
1591
1592         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1593
1594         return 0;
1595
1596 err_nomem:
1597         igb_free_desc_rings(adapter);
1598         return ret_val;
1599 }
1600
1601 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1602 {
1603         struct e1000_hw *hw = &adapter->hw;
1604
1605         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1606         igb_write_phy_reg(hw, 29, 0x001F);
1607         igb_write_phy_reg(hw, 30, 0x8FFC);
1608         igb_write_phy_reg(hw, 29, 0x001A);
1609         igb_write_phy_reg(hw, 30, 0x8FF0);
1610 }
1611
1612 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1613 {
1614         struct e1000_hw *hw = &adapter->hw;
1615         u32 ctrl_reg = 0;
1616
1617         hw->mac.autoneg = false;
1618
1619         if (hw->phy.type == e1000_phy_m88) {
1620                 if (hw->phy.id != I210_I_PHY_ID) {
1621                         /* Auto-MDI/MDIX Off */
1622                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1623                         /* reset to update Auto-MDI/MDIX */
1624                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1625                         /* autoneg off */
1626                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1627                 } else {
1628                         /* force 1000, set loopback  */
1629                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1630                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1631                 }
1632         } else if (hw->phy.type == e1000_phy_82580) {
1633                 /* enable MII loopback */
1634                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1635         }
1636
1637         /* add small delay to avoid loopback test failure */
1638         msleep(50);
1639
1640         /* force 1000, set loopback */
1641         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1642
1643         /* Now set up the MAC to the same speed/duplex as the PHY. */
1644         ctrl_reg = rd32(E1000_CTRL);
1645         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1646         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1647                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1648                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1649                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1650                      E1000_CTRL_SLU);    /* Set link up enable bit */
1651
1652         if (hw->phy.type == e1000_phy_m88)
1653                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1654
1655         wr32(E1000_CTRL, ctrl_reg);
1656
1657         /* Disable the receiver on the PHY so when a cable is plugged in, the
1658          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1659          */
1660         if (hw->phy.type == e1000_phy_m88)
1661                 igb_phy_disable_receiver(adapter);
1662
1663         msleep(500);
1664         return 0;
1665 }
1666
1667 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1668 {
1669         return igb_integrated_phy_loopback(adapter);
1670 }
1671
1672 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1673 {
1674         struct e1000_hw *hw = &adapter->hw;
1675         u32 reg;
1676
1677         reg = rd32(E1000_CTRL_EXT);
1678
1679         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1680         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1681                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1682                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1683                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1684                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1685                 (hw->device_id == E1000_DEV_ID_I354_SGMII) ||
1686                 (hw->device_id == E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)) {
1687                         /* Enable DH89xxCC MPHY for near end loopback */
1688                         reg = rd32(E1000_MPHY_ADDR_CTL);
1689                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1690                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1691                         wr32(E1000_MPHY_ADDR_CTL, reg);
1692
1693                         reg = rd32(E1000_MPHY_DATA);
1694                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1695                         wr32(E1000_MPHY_DATA, reg);
1696                 }
1697
1698                 reg = rd32(E1000_RCTL);
1699                 reg |= E1000_RCTL_LBM_TCVR;
1700                 wr32(E1000_RCTL, reg);
1701
1702                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1703
1704                 reg = rd32(E1000_CTRL);
1705                 reg &= ~(E1000_CTRL_RFCE |
1706                          E1000_CTRL_TFCE |
1707                          E1000_CTRL_LRST);
1708                 reg |= E1000_CTRL_SLU |
1709                        E1000_CTRL_FD;
1710                 wr32(E1000_CTRL, reg);
1711
1712                 /* Unset switch control to serdes energy detect */
1713                 reg = rd32(E1000_CONNSW);
1714                 reg &= ~E1000_CONNSW_ENRGSRC;
1715                 wr32(E1000_CONNSW, reg);
1716
1717                 /* Unset sigdetect for SERDES loopback on
1718                  * 82580 and newer devices.
1719                  */
1720                 if (hw->mac.type >= e1000_82580) {
1721                         reg = rd32(E1000_PCS_CFG0);
1722                         reg |= E1000_PCS_CFG_IGN_SD;
1723                         wr32(E1000_PCS_CFG0, reg);
1724                 }
1725
1726                 /* Set PCS register for forced speed */
1727                 reg = rd32(E1000_PCS_LCTL);
1728                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1729                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1730                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1731                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1732                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1733                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1734                 wr32(E1000_PCS_LCTL, reg);
1735
1736                 return 0;
1737         }
1738
1739         return igb_set_phy_loopback(adapter);
1740 }
1741
1742 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1743 {
1744         struct e1000_hw *hw = &adapter->hw;
1745         u32 rctl;
1746         u16 phy_reg;
1747
1748         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1749         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1750         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1751         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1752         (hw->device_id == E1000_DEV_ID_I354_SGMII)) {
1753                 u32 reg;
1754
1755                 /* Disable near end loopback on DH89xxCC */
1756                 reg = rd32(E1000_MPHY_ADDR_CTL);
1757                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1758                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1759                 wr32(E1000_MPHY_ADDR_CTL, reg);
1760
1761                 reg = rd32(E1000_MPHY_DATA);
1762                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1763                 wr32(E1000_MPHY_DATA, reg);
1764         }
1765
1766         rctl = rd32(E1000_RCTL);
1767         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1768         wr32(E1000_RCTL, rctl);
1769
1770         hw->mac.autoneg = true;
1771         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1772         if (phy_reg & MII_CR_LOOPBACK) {
1773                 phy_reg &= ~MII_CR_LOOPBACK;
1774                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1775                 igb_phy_sw_reset(hw);
1776         }
1777 }
1778
1779 static void igb_create_lbtest_frame(struct sk_buff *skb,
1780                                     unsigned int frame_size)
1781 {
1782         memset(skb->data, 0xFF, frame_size);
1783         frame_size /= 2;
1784         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1785         memset(&skb->data[frame_size + 10], 0xBE, 1);
1786         memset(&skb->data[frame_size + 12], 0xAF, 1);
1787 }
1788
1789 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1790                                   unsigned int frame_size)
1791 {
1792         unsigned char *data;
1793         bool match = true;
1794
1795         frame_size >>= 1;
1796
1797         data = kmap(rx_buffer->page);
1798
1799         if (data[3] != 0xFF ||
1800             data[frame_size + 10] != 0xBE ||
1801             data[frame_size + 12] != 0xAF)
1802                 match = false;
1803
1804         kunmap(rx_buffer->page);
1805
1806         return match;
1807 }
1808
1809 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1810                                 struct igb_ring *tx_ring,
1811                                 unsigned int size)
1812 {
1813         union e1000_adv_rx_desc *rx_desc;
1814         struct igb_rx_buffer *rx_buffer_info;
1815         struct igb_tx_buffer *tx_buffer_info;
1816         u16 rx_ntc, tx_ntc, count = 0;
1817
1818         /* initialize next to clean and descriptor values */
1819         rx_ntc = rx_ring->next_to_clean;
1820         tx_ntc = tx_ring->next_to_clean;
1821         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1822
1823         while (rx_desc->wb.upper.length) {
1824                 /* check Rx buffer */
1825                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1826
1827                 /* sync Rx buffer for CPU read */
1828                 dma_sync_single_for_cpu(rx_ring->dev,
1829                                         rx_buffer_info->dma,
1830                                         size,
1831                                         DMA_FROM_DEVICE);
1832
1833                 /* verify contents of skb */
1834                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1835                         count++;
1836
1837                 /* sync Rx buffer for device write */
1838                 dma_sync_single_for_device(rx_ring->dev,
1839                                            rx_buffer_info->dma,
1840                                            size,
1841                                            DMA_FROM_DEVICE);
1842
1843                 /* unmap buffer on Tx side */
1844                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1845
1846                 /* Free all the Tx ring sk_buffs */
1847                 dev_kfree_skb_any(tx_buffer_info->skb);
1848
1849                 /* unmap skb header data */
1850                 dma_unmap_single(tx_ring->dev,
1851                                  dma_unmap_addr(tx_buffer_info, dma),
1852                                  dma_unmap_len(tx_buffer_info, len),
1853                                  DMA_TO_DEVICE);
1854                 dma_unmap_len_set(tx_buffer_info, len, 0);
1855
1856                 /* increment Rx/Tx next to clean counters */
1857                 rx_ntc++;
1858                 if (rx_ntc == rx_ring->count)
1859                         rx_ntc = 0;
1860                 tx_ntc++;
1861                 if (tx_ntc == tx_ring->count)
1862                         tx_ntc = 0;
1863
1864                 /* fetch next descriptor */
1865                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1866         }
1867
1868         netdev_tx_reset_queue(txring_txq(tx_ring));
1869
1870         /* re-map buffers to ring, store next to clean values */
1871         igb_alloc_rx_buffers(rx_ring, count);
1872         rx_ring->next_to_clean = rx_ntc;
1873         tx_ring->next_to_clean = tx_ntc;
1874
1875         return count;
1876 }
1877
1878 static int igb_run_loopback_test(struct igb_adapter *adapter)
1879 {
1880         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1881         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1882         u16 i, j, lc, good_cnt;
1883         int ret_val = 0;
1884         unsigned int size = IGB_RX_HDR_LEN;
1885         netdev_tx_t tx_ret_val;
1886         struct sk_buff *skb;
1887
1888         /* allocate test skb */
1889         skb = alloc_skb(size, GFP_KERNEL);
1890         if (!skb)
1891                 return 11;
1892
1893         /* place data into test skb */
1894         igb_create_lbtest_frame(skb, size);
1895         skb_put(skb, size);
1896
1897         /* Calculate the loop count based on the largest descriptor ring
1898          * The idea is to wrap the largest ring a number of times using 64
1899          * send/receive pairs during each loop
1900          */
1901
1902         if (rx_ring->count <= tx_ring->count)
1903                 lc = ((tx_ring->count / 64) * 2) + 1;
1904         else
1905                 lc = ((rx_ring->count / 64) * 2) + 1;
1906
1907         for (j = 0; j <= lc; j++) { /* loop count loop */
1908                 /* reset count of good packets */
1909                 good_cnt = 0;
1910
1911                 /* place 64 packets on the transmit queue*/
1912                 for (i = 0; i < 64; i++) {
1913                         skb_get(skb);
1914                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1915                         if (tx_ret_val == NETDEV_TX_OK)
1916                                 good_cnt++;
1917                 }
1918
1919                 if (good_cnt != 64) {
1920                         ret_val = 12;
1921                         break;
1922                 }
1923
1924                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1925                 msleep(200);
1926
1927                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1928                 if (good_cnt != 64) {
1929                         ret_val = 13;
1930                         break;
1931                 }
1932         } /* end loop count loop */
1933
1934         /* free the original skb */
1935         kfree_skb(skb);
1936
1937         return ret_val;
1938 }
1939
1940 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1941 {
1942         /* PHY loopback cannot be performed if SoL/IDER
1943          * sessions are active
1944          */
1945         if (igb_check_reset_block(&adapter->hw)) {
1946                 dev_err(&adapter->pdev->dev,
1947                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1948                 *data = 0;
1949                 goto out;
1950         }
1951
1952         if (adapter->hw.mac.type == e1000_i354) {
1953                 dev_info(&adapter->pdev->dev,
1954                         "Loopback test not supported on i354.\n");
1955                 *data = 0;
1956                 goto out;
1957         }
1958         *data = igb_setup_desc_rings(adapter);
1959         if (*data)
1960                 goto out;
1961         *data = igb_setup_loopback_test(adapter);
1962         if (*data)
1963                 goto err_loopback;
1964         *data = igb_run_loopback_test(adapter);
1965         igb_loopback_cleanup(adapter);
1966
1967 err_loopback:
1968         igb_free_desc_rings(adapter);
1969 out:
1970         return *data;
1971 }
1972
1973 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1974 {
1975         struct e1000_hw *hw = &adapter->hw;
1976         *data = 0;
1977         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1978                 int i = 0;
1979
1980                 hw->mac.serdes_has_link = false;
1981
1982                 /* On some blade server designs, link establishment
1983                  * could take as long as 2-3 minutes
1984                  */
1985                 do {
1986                         hw->mac.ops.check_for_link(&adapter->hw);
1987                         if (hw->mac.serdes_has_link)
1988                                 return *data;
1989                         msleep(20);
1990                 } while (i++ < 3750);
1991
1992                 *data = 1;
1993         } else {
1994                 hw->mac.ops.check_for_link(&adapter->hw);
1995                 if (hw->mac.autoneg)
1996                         msleep(5000);
1997
1998                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1999                         *data = 1;
2000         }
2001         return *data;
2002 }
2003
2004 static void igb_diag_test(struct net_device *netdev,
2005                           struct ethtool_test *eth_test, u64 *data)
2006 {
2007         struct igb_adapter *adapter = netdev_priv(netdev);
2008         u16 autoneg_advertised;
2009         u8 forced_speed_duplex, autoneg;
2010         bool if_running = netif_running(netdev);
2011
2012         set_bit(__IGB_TESTING, &adapter->state);
2013
2014         /* can't do offline tests on media switching devices */
2015         if (adapter->hw.dev_spec._82575.mas_capable)
2016                 eth_test->flags &= ~ETH_TEST_FL_OFFLINE;
2017         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2018                 /* Offline tests */
2019
2020                 /* save speed, duplex, autoneg settings */
2021                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
2022                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
2023                 autoneg = adapter->hw.mac.autoneg;
2024
2025                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
2026
2027                 /* power up link for link test */
2028                 igb_power_up_link(adapter);
2029
2030                 /* Link test performed before hardware reset so autoneg doesn't
2031                  * interfere with test result
2032                  */
2033                 if (igb_link_test(adapter, &data[TEST_LINK]))
2034                         eth_test->flags |= ETH_TEST_FL_FAILED;
2035
2036                 if (if_running)
2037                         /* indicate we're in test mode */
2038                         igb_close(netdev);
2039                 else
2040                         igb_reset(adapter);
2041
2042                 if (igb_reg_test(adapter, &data[TEST_REG]))
2043                         eth_test->flags |= ETH_TEST_FL_FAILED;
2044
2045                 igb_reset(adapter);
2046                 if (igb_eeprom_test(adapter, &data[TEST_EEP]))
2047                         eth_test->flags |= ETH_TEST_FL_FAILED;
2048
2049                 igb_reset(adapter);
2050                 if (igb_intr_test(adapter, &data[TEST_IRQ]))
2051                         eth_test->flags |= ETH_TEST_FL_FAILED;
2052
2053                 igb_reset(adapter);
2054                 /* power up link for loopback test */
2055                 igb_power_up_link(adapter);
2056                 if (igb_loopback_test(adapter, &data[TEST_LOOP]))
2057                         eth_test->flags |= ETH_TEST_FL_FAILED;
2058
2059                 /* restore speed, duplex, autoneg settings */
2060                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2061                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2062                 adapter->hw.mac.autoneg = autoneg;
2063
2064                 /* force this routine to wait until autoneg complete/timeout */
2065                 adapter->hw.phy.autoneg_wait_to_complete = true;
2066                 igb_reset(adapter);
2067                 adapter->hw.phy.autoneg_wait_to_complete = false;
2068
2069                 clear_bit(__IGB_TESTING, &adapter->state);
2070                 if (if_running)
2071                         igb_open(netdev);
2072         } else {
2073                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2074
2075                 /* PHY is powered down when interface is down */
2076                 if (if_running && igb_link_test(adapter, &data[TEST_LINK]))
2077                         eth_test->flags |= ETH_TEST_FL_FAILED;
2078                 else
2079                         data[TEST_LINK] = 0;
2080
2081                 /* Online tests aren't run; pass by default */
2082                 data[TEST_REG] = 0;
2083                 data[TEST_EEP] = 0;
2084                 data[TEST_IRQ] = 0;
2085                 data[TEST_LOOP] = 0;
2086
2087                 clear_bit(__IGB_TESTING, &adapter->state);
2088         }
2089         msleep_interruptible(4 * 1000);
2090 }
2091
2092 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2093 {
2094         struct igb_adapter *adapter = netdev_priv(netdev);
2095
2096         wol->wolopts = 0;
2097
2098         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2099                 return;
2100
2101         wol->supported = WAKE_UCAST | WAKE_MCAST |
2102                          WAKE_BCAST | WAKE_MAGIC |
2103                          WAKE_PHY;
2104
2105         /* apply any specific unsupported masks here */
2106         switch (adapter->hw.device_id) {
2107         default:
2108                 break;
2109         }
2110
2111         if (adapter->wol & E1000_WUFC_EX)
2112                 wol->wolopts |= WAKE_UCAST;
2113         if (adapter->wol & E1000_WUFC_MC)
2114                 wol->wolopts |= WAKE_MCAST;
2115         if (adapter->wol & E1000_WUFC_BC)
2116                 wol->wolopts |= WAKE_BCAST;
2117         if (adapter->wol & E1000_WUFC_MAG)
2118                 wol->wolopts |= WAKE_MAGIC;
2119         if (adapter->wol & E1000_WUFC_LNKC)
2120                 wol->wolopts |= WAKE_PHY;
2121 }
2122
2123 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2124 {
2125         struct igb_adapter *adapter = netdev_priv(netdev);
2126
2127         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE | WAKE_FILTER))
2128                 return -EOPNOTSUPP;
2129
2130         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2131                 return wol->wolopts ? -EOPNOTSUPP : 0;
2132
2133         /* these settings will always override what we currently have */
2134         adapter->wol = 0;
2135
2136         if (wol->wolopts & WAKE_UCAST)
2137                 adapter->wol |= E1000_WUFC_EX;
2138         if (wol->wolopts & WAKE_MCAST)
2139                 adapter->wol |= E1000_WUFC_MC;
2140         if (wol->wolopts & WAKE_BCAST)
2141                 adapter->wol |= E1000_WUFC_BC;
2142         if (wol->wolopts & WAKE_MAGIC)
2143                 adapter->wol |= E1000_WUFC_MAG;
2144         if (wol->wolopts & WAKE_PHY)
2145                 adapter->wol |= E1000_WUFC_LNKC;
2146         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2147
2148         return 0;
2149 }
2150
2151 /* bit defines for adapter->led_status */
2152 #define IGB_LED_ON              0
2153
2154 static int igb_set_phys_id(struct net_device *netdev,
2155                            enum ethtool_phys_id_state state)
2156 {
2157         struct igb_adapter *adapter = netdev_priv(netdev);
2158         struct e1000_hw *hw = &adapter->hw;
2159
2160         switch (state) {
2161         case ETHTOOL_ID_ACTIVE:
2162                 igb_blink_led(hw);
2163                 return 2;
2164         case ETHTOOL_ID_ON:
2165                 igb_blink_led(hw);
2166                 break;
2167         case ETHTOOL_ID_OFF:
2168                 igb_led_off(hw);
2169                 break;
2170         case ETHTOOL_ID_INACTIVE:
2171                 igb_led_off(hw);
2172                 clear_bit(IGB_LED_ON, &adapter->led_status);
2173                 igb_cleanup_led(hw);
2174                 break;
2175         }
2176
2177         return 0;
2178 }
2179
2180 static int igb_set_coalesce(struct net_device *netdev,
2181                             struct ethtool_coalesce *ec)
2182 {
2183         struct igb_adapter *adapter = netdev_priv(netdev);
2184         int i;
2185
2186         if (ec->rx_max_coalesced_frames ||
2187             ec->rx_coalesce_usecs_irq ||
2188             ec->rx_max_coalesced_frames_irq ||
2189             ec->tx_max_coalesced_frames ||
2190             ec->tx_coalesce_usecs_irq ||
2191             ec->stats_block_coalesce_usecs ||
2192             ec->use_adaptive_rx_coalesce ||
2193             ec->use_adaptive_tx_coalesce ||
2194             ec->pkt_rate_low ||
2195             ec->rx_coalesce_usecs_low ||
2196             ec->rx_max_coalesced_frames_low ||
2197             ec->tx_coalesce_usecs_low ||
2198             ec->tx_max_coalesced_frames_low ||
2199             ec->pkt_rate_high ||
2200             ec->rx_coalesce_usecs_high ||
2201             ec->rx_max_coalesced_frames_high ||
2202             ec->tx_coalesce_usecs_high ||
2203             ec->tx_max_coalesced_frames_high ||
2204             ec->rate_sample_interval)
2205                 return -ENOTSUPP;
2206
2207         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2208             ((ec->rx_coalesce_usecs > 3) &&
2209              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2210             (ec->rx_coalesce_usecs == 2))
2211                 return -EINVAL;
2212
2213         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2214             ((ec->tx_coalesce_usecs > 3) &&
2215              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2216             (ec->tx_coalesce_usecs == 2))
2217                 return -EINVAL;
2218
2219         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2220                 return -EINVAL;
2221
2222         /* If ITR is disabled, disable DMAC */
2223         if (ec->rx_coalesce_usecs == 0) {
2224                 if (adapter->flags & IGB_FLAG_DMAC)
2225                         adapter->flags &= ~IGB_FLAG_DMAC;
2226         }
2227
2228         /* convert to rate of irq's per second */
2229         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2230                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2231         else
2232                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2233
2234         /* convert to rate of irq's per second */
2235         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2236                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2237         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2238                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2239         else
2240                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2241
2242         for (i = 0; i < adapter->num_q_vectors; i++) {
2243                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2244                 q_vector->tx.work_limit = adapter->tx_work_limit;
2245                 if (q_vector->rx.ring)
2246                         q_vector->itr_val = adapter->rx_itr_setting;
2247                 else
2248                         q_vector->itr_val = adapter->tx_itr_setting;
2249                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2250                         q_vector->itr_val = IGB_START_ITR;
2251                 q_vector->set_itr = 1;
2252         }
2253
2254         return 0;
2255 }
2256
2257 static int igb_get_coalesce(struct net_device *netdev,
2258                             struct ethtool_coalesce *ec)
2259 {
2260         struct igb_adapter *adapter = netdev_priv(netdev);
2261
2262         if (adapter->rx_itr_setting <= 3)
2263                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2264         else
2265                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2266
2267         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2268                 if (adapter->tx_itr_setting <= 3)
2269                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2270                 else
2271                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2272         }
2273
2274         return 0;
2275 }
2276
2277 static int igb_nway_reset(struct net_device *netdev)
2278 {
2279         struct igb_adapter *adapter = netdev_priv(netdev);
2280         if (netif_running(netdev))
2281                 igb_reinit_locked(adapter);
2282         return 0;
2283 }
2284
2285 static int igb_get_sset_count(struct net_device *netdev, int sset)
2286 {
2287         switch (sset) {
2288         case ETH_SS_STATS:
2289                 return IGB_STATS_LEN;
2290         case ETH_SS_TEST:
2291                 return IGB_TEST_LEN;
2292         case ETH_SS_PRIV_FLAGS:
2293                 return IGB_PRIV_FLAGS_STR_LEN;
2294         default:
2295                 return -ENOTSUPP;
2296         }
2297 }
2298
2299 static void igb_get_ethtool_stats(struct net_device *netdev,
2300                                   struct ethtool_stats *stats, u64 *data)
2301 {
2302         struct igb_adapter *adapter = netdev_priv(netdev);
2303         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2304         unsigned int start;
2305         struct igb_ring *ring;
2306         int i, j;
2307         char *p;
2308
2309         spin_lock(&adapter->stats64_lock);
2310         igb_update_stats(adapter);
2311
2312         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2313                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2314                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2315                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2316         }
2317         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2318                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2319                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2320                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2321         }
2322         for (j = 0; j < adapter->num_tx_queues; j++) {
2323                 u64     restart2;
2324
2325                 ring = adapter->tx_ring[j];
2326                 do {
2327                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
2328                         data[i]   = ring->tx_stats.packets;
2329                         data[i+1] = ring->tx_stats.bytes;
2330                         data[i+2] = ring->tx_stats.restart_queue;
2331                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
2332                 do {
2333                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp2);
2334                         restart2  = ring->tx_stats.restart_queue2;
2335                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp2, start));
2336                 data[i+2] += restart2;
2337
2338                 i += IGB_TX_QUEUE_STATS_LEN;
2339         }
2340         for (j = 0; j < adapter->num_rx_queues; j++) {
2341                 ring = adapter->rx_ring[j];
2342                 do {
2343                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
2344                         data[i]   = ring->rx_stats.packets;
2345                         data[i+1] = ring->rx_stats.bytes;
2346                         data[i+2] = ring->rx_stats.drops;
2347                         data[i+3] = ring->rx_stats.csum_err;
2348                         data[i+4] = ring->rx_stats.alloc_failed;
2349                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
2350                 i += IGB_RX_QUEUE_STATS_LEN;
2351         }
2352         spin_unlock(&adapter->stats64_lock);
2353 }
2354
2355 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2356 {
2357         struct igb_adapter *adapter = netdev_priv(netdev);
2358         u8 *p = data;
2359         int i;
2360
2361         switch (stringset) {
2362         case ETH_SS_TEST:
2363                 memcpy(data, *igb_gstrings_test,
2364                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2365                 break;
2366         case ETH_SS_STATS:
2367                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2368                         memcpy(p, igb_gstrings_stats[i].stat_string,
2369                                ETH_GSTRING_LEN);
2370                         p += ETH_GSTRING_LEN;
2371                 }
2372                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2373                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2374                                ETH_GSTRING_LEN);
2375                         p += ETH_GSTRING_LEN;
2376                 }
2377                 for (i = 0; i < adapter->num_tx_queues; i++) {
2378                         sprintf(p, "tx_queue_%u_packets", i);
2379                         p += ETH_GSTRING_LEN;
2380                         sprintf(p, "tx_queue_%u_bytes", i);
2381                         p += ETH_GSTRING_LEN;
2382                         sprintf(p, "tx_queue_%u_restart", i);
2383                         p += ETH_GSTRING_LEN;
2384                 }
2385                 for (i = 0; i < adapter->num_rx_queues; i++) {
2386                         sprintf(p, "rx_queue_%u_packets", i);
2387                         p += ETH_GSTRING_LEN;
2388                         sprintf(p, "rx_queue_%u_bytes", i);
2389                         p += ETH_GSTRING_LEN;
2390                         sprintf(p, "rx_queue_%u_drops", i);
2391                         p += ETH_GSTRING_LEN;
2392                         sprintf(p, "rx_queue_%u_csum_err", i);
2393                         p += ETH_GSTRING_LEN;
2394                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2395                         p += ETH_GSTRING_LEN;
2396                 }
2397                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2398                 break;
2399         case ETH_SS_PRIV_FLAGS:
2400                 memcpy(data, igb_priv_flags_strings,
2401                        IGB_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
2402                 break;
2403         }
2404 }
2405
2406 static int igb_get_ts_info(struct net_device *dev,
2407                            struct ethtool_ts_info *info)
2408 {
2409         struct igb_adapter *adapter = netdev_priv(dev);
2410
2411         if (adapter->ptp_clock)
2412                 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2413         else
2414                 info->phc_index = -1;
2415
2416         switch (adapter->hw.mac.type) {
2417         case e1000_82575:
2418                 info->so_timestamping =
2419                         SOF_TIMESTAMPING_TX_SOFTWARE |
2420                         SOF_TIMESTAMPING_RX_SOFTWARE |
2421                         SOF_TIMESTAMPING_SOFTWARE;
2422                 return 0;
2423         case e1000_82576:
2424         case e1000_82580:
2425         case e1000_i350:
2426         case e1000_i354:
2427         case e1000_i210:
2428         case e1000_i211:
2429                 info->so_timestamping =
2430                         SOF_TIMESTAMPING_TX_SOFTWARE |
2431                         SOF_TIMESTAMPING_RX_SOFTWARE |
2432                         SOF_TIMESTAMPING_SOFTWARE |
2433                         SOF_TIMESTAMPING_TX_HARDWARE |
2434                         SOF_TIMESTAMPING_RX_HARDWARE |
2435                         SOF_TIMESTAMPING_RAW_HARDWARE;
2436
2437                 info->tx_types =
2438                         BIT(HWTSTAMP_TX_OFF) |
2439                         BIT(HWTSTAMP_TX_ON);
2440
2441                 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
2442
2443                 /* 82576 does not support timestamping all packets. */
2444                 if (adapter->hw.mac.type >= e1000_82580)
2445                         info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
2446                 else
2447                         info->rx_filters |=
2448                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2449                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2450                                 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
2451
2452                 return 0;
2453         default:
2454                 return -EOPNOTSUPP;
2455         }
2456 }
2457
2458 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2459 static int igb_get_ethtool_nfc_entry(struct igb_adapter *adapter,
2460                                      struct ethtool_rxnfc *cmd)
2461 {
2462         struct ethtool_rx_flow_spec *fsp = &cmd->fs;
2463         struct igb_nfc_filter *rule = NULL;
2464
2465         /* report total rule count */
2466         cmd->data = IGB_MAX_RXNFC_FILTERS;
2467
2468         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2469                 if (fsp->location <= rule->sw_idx)
2470                         break;
2471         }
2472
2473         if (!rule || fsp->location != rule->sw_idx)
2474                 return -EINVAL;
2475
2476         if (rule->filter.match_flags) {
2477                 fsp->flow_type = ETHER_FLOW;
2478                 fsp->ring_cookie = rule->action;
2479                 if (rule->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2480                         fsp->h_u.ether_spec.h_proto = rule->filter.etype;
2481                         fsp->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK;
2482                 }
2483                 if (rule->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI) {
2484                         fsp->flow_type |= FLOW_EXT;
2485                         fsp->h_ext.vlan_tci = rule->filter.vlan_tci;
2486                         fsp->m_ext.vlan_tci = htons(VLAN_PRIO_MASK);
2487                 }
2488                 if (rule->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR) {
2489                         ether_addr_copy(fsp->h_u.ether_spec.h_dest,
2490                                         rule->filter.dst_addr);
2491                         /* As we only support matching by the full
2492                          * mask, return the mask to userspace
2493                          */
2494                         eth_broadcast_addr(fsp->m_u.ether_spec.h_dest);
2495                 }
2496                 if (rule->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR) {
2497                         ether_addr_copy(fsp->h_u.ether_spec.h_source,
2498                                         rule->filter.src_addr);
2499                         /* As we only support matching by the full
2500                          * mask, return the mask to userspace
2501                          */
2502                         eth_broadcast_addr(fsp->m_u.ether_spec.h_source);
2503                 }
2504
2505                 return 0;
2506         }
2507         return -EINVAL;
2508 }
2509
2510 static int igb_get_ethtool_nfc_all(struct igb_adapter *adapter,
2511                                    struct ethtool_rxnfc *cmd,
2512                                    u32 *rule_locs)
2513 {
2514         struct igb_nfc_filter *rule;
2515         int cnt = 0;
2516
2517         /* report total rule count */
2518         cmd->data = IGB_MAX_RXNFC_FILTERS;
2519
2520         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2521                 if (cnt == cmd->rule_cnt)
2522                         return -EMSGSIZE;
2523                 rule_locs[cnt] = rule->sw_idx;
2524                 cnt++;
2525         }
2526
2527         cmd->rule_cnt = cnt;
2528
2529         return 0;
2530 }
2531
2532 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2533                                  struct ethtool_rxnfc *cmd)
2534 {
2535         cmd->data = 0;
2536
2537         /* Report default options for RSS on igb */
2538         switch (cmd->flow_type) {
2539         case TCP_V4_FLOW:
2540                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2541                 /* Fall through */
2542         case UDP_V4_FLOW:
2543                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2544                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2545                 /* Fall through */
2546         case SCTP_V4_FLOW:
2547         case AH_ESP_V4_FLOW:
2548         case AH_V4_FLOW:
2549         case ESP_V4_FLOW:
2550         case IPV4_FLOW:
2551                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2552                 break;
2553         case TCP_V6_FLOW:
2554                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2555                 /* Fall through */
2556         case UDP_V6_FLOW:
2557                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2558                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2559                 /* Fall through */
2560         case SCTP_V6_FLOW:
2561         case AH_ESP_V6_FLOW:
2562         case AH_V6_FLOW:
2563         case ESP_V6_FLOW:
2564         case IPV6_FLOW:
2565                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2566                 break;
2567         default:
2568                 return -EINVAL;
2569         }
2570
2571         return 0;
2572 }
2573
2574 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2575                          u32 *rule_locs)
2576 {
2577         struct igb_adapter *adapter = netdev_priv(dev);
2578         int ret = -EOPNOTSUPP;
2579
2580         switch (cmd->cmd) {
2581         case ETHTOOL_GRXRINGS:
2582                 cmd->data = adapter->num_rx_queues;
2583                 ret = 0;
2584                 break;
2585         case ETHTOOL_GRXCLSRLCNT:
2586                 cmd->rule_cnt = adapter->nfc_filter_count;
2587                 ret = 0;
2588                 break;
2589         case ETHTOOL_GRXCLSRULE:
2590                 ret = igb_get_ethtool_nfc_entry(adapter, cmd);
2591                 break;
2592         case ETHTOOL_GRXCLSRLALL:
2593                 ret = igb_get_ethtool_nfc_all(adapter, cmd, rule_locs);
2594                 break;
2595         case ETHTOOL_GRXFH:
2596                 ret = igb_get_rss_hash_opts(adapter, cmd);
2597                 break;
2598         default:
2599                 break;
2600         }
2601
2602         return ret;
2603 }
2604
2605 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2606                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2607 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2608                                 struct ethtool_rxnfc *nfc)
2609 {
2610         u32 flags = adapter->flags;
2611
2612         /* RSS does not support anything other than hashing
2613          * to queues on src and dst IPs and ports
2614          */
2615         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2616                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2617                 return -EINVAL;
2618
2619         switch (nfc->flow_type) {
2620         case TCP_V4_FLOW:
2621         case TCP_V6_FLOW:
2622                 if (!(nfc->data & RXH_IP_SRC) ||
2623                     !(nfc->data & RXH_IP_DST) ||
2624                     !(nfc->data & RXH_L4_B_0_1) ||
2625                     !(nfc->data & RXH_L4_B_2_3))
2626                         return -EINVAL;
2627                 break;
2628         case UDP_V4_FLOW:
2629                 if (!(nfc->data & RXH_IP_SRC) ||
2630                     !(nfc->data & RXH_IP_DST))
2631                         return -EINVAL;
2632                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2633                 case 0:
2634                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2635                         break;
2636                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2637                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2638                         break;
2639                 default:
2640                         return -EINVAL;
2641                 }
2642                 break;
2643         case UDP_V6_FLOW:
2644                 if (!(nfc->data & RXH_IP_SRC) ||
2645                     !(nfc->data & RXH_IP_DST))
2646                         return -EINVAL;
2647                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2648                 case 0:
2649                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2650                         break;
2651                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2652                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2653                         break;
2654                 default:
2655                         return -EINVAL;
2656                 }
2657                 break;
2658         case AH_ESP_V4_FLOW:
2659         case AH_V4_FLOW:
2660         case ESP_V4_FLOW:
2661         case SCTP_V4_FLOW:
2662         case AH_ESP_V6_FLOW:
2663         case AH_V6_FLOW:
2664         case ESP_V6_FLOW:
2665         case SCTP_V6_FLOW:
2666                 if (!(nfc->data & RXH_IP_SRC) ||
2667                     !(nfc->data & RXH_IP_DST) ||
2668                     (nfc->data & RXH_L4_B_0_1) ||
2669                     (nfc->data & RXH_L4_B_2_3))
2670                         return -EINVAL;
2671                 break;
2672         default:
2673                 return -EINVAL;
2674         }
2675
2676         /* if we changed something we need to update flags */
2677         if (flags != adapter->flags) {
2678                 struct e1000_hw *hw = &adapter->hw;
2679                 u32 mrqc = rd32(E1000_MRQC);
2680
2681                 if ((flags & UDP_RSS_FLAGS) &&
2682                     !(adapter->flags & UDP_RSS_FLAGS))
2683                         dev_err(&adapter->pdev->dev,
2684                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2685
2686                 adapter->flags = flags;
2687
2688                 /* Perform hash on these packet types */
2689                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2690                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2691                         E1000_MRQC_RSS_FIELD_IPV6 |
2692                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2693
2694                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2695                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2696
2697                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2698                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2699
2700                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2701                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2702
2703                 wr32(E1000_MRQC, mrqc);
2704         }
2705
2706         return 0;
2707 }
2708
2709 static int igb_rxnfc_write_etype_filter(struct igb_adapter *adapter,
2710                                         struct igb_nfc_filter *input)
2711 {
2712         struct e1000_hw *hw = &adapter->hw;
2713         u8 i;
2714         u32 etqf;
2715         u16 etype;
2716
2717         /* find an empty etype filter register */
2718         for (i = 0; i < MAX_ETYPE_FILTER; ++i) {
2719                 if (!adapter->etype_bitmap[i])
2720                         break;
2721         }
2722         if (i == MAX_ETYPE_FILTER) {
2723                 dev_err(&adapter->pdev->dev, "ethtool -N: etype filters are all used.\n");
2724                 return -EINVAL;
2725         }
2726
2727         adapter->etype_bitmap[i] = true;
2728
2729         etqf = rd32(E1000_ETQF(i));
2730         etype = ntohs(input->filter.etype & ETHER_TYPE_FULL_MASK);
2731
2732         etqf |= E1000_ETQF_FILTER_ENABLE;
2733         etqf &= ~E1000_ETQF_ETYPE_MASK;
2734         etqf |= (etype & E1000_ETQF_ETYPE_MASK);
2735
2736         etqf &= ~E1000_ETQF_QUEUE_MASK;
2737         etqf |= ((input->action << E1000_ETQF_QUEUE_SHIFT)
2738                 & E1000_ETQF_QUEUE_MASK);
2739         etqf |= E1000_ETQF_QUEUE_ENABLE;
2740
2741         wr32(E1000_ETQF(i), etqf);
2742
2743         input->etype_reg_index = i;
2744
2745         return 0;
2746 }
2747
2748 static int igb_rxnfc_write_vlan_prio_filter(struct igb_adapter *adapter,
2749                                             struct igb_nfc_filter *input)
2750 {
2751         struct e1000_hw *hw = &adapter->hw;
2752         u8 vlan_priority;
2753         u16 queue_index;
2754         u32 vlapqf;
2755
2756         vlapqf = rd32(E1000_VLAPQF);
2757         vlan_priority = (ntohs(input->filter.vlan_tci) & VLAN_PRIO_MASK)
2758                                 >> VLAN_PRIO_SHIFT;
2759         queue_index = (vlapqf >> (vlan_priority * 4)) & E1000_VLAPQF_QUEUE_MASK;
2760
2761         /* check whether this vlan prio is already set */
2762         if ((vlapqf & E1000_VLAPQF_P_VALID(vlan_priority)) &&
2763             (queue_index != input->action)) {
2764                 dev_err(&adapter->pdev->dev, "ethtool rxnfc set vlan prio filter failed.\n");
2765                 return -EEXIST;
2766         }
2767
2768         vlapqf |= E1000_VLAPQF_P_VALID(vlan_priority);
2769         vlapqf |= E1000_VLAPQF_QUEUE_SEL(vlan_priority, input->action);
2770
2771         wr32(E1000_VLAPQF, vlapqf);
2772
2773         return 0;
2774 }
2775
2776 int igb_add_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2777 {
2778         struct e1000_hw *hw = &adapter->hw;
2779         int err = -EINVAL;
2780
2781         if (hw->mac.type == e1000_i210 &&
2782             !(input->filter.match_flags & ~IGB_FILTER_FLAG_SRC_MAC_ADDR)) {
2783                 dev_err(&adapter->pdev->dev,
2784                         "i210 doesn't support flow classification rules specifying only source addresses.\n");
2785                 return -EOPNOTSUPP;
2786         }
2787
2788         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2789                 err = igb_rxnfc_write_etype_filter(adapter, input);
2790                 if (err)
2791                         return err;
2792         }
2793
2794         if (input->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR) {
2795                 err = igb_add_mac_steering_filter(adapter,
2796                                                   input->filter.dst_addr,
2797                                                   input->action, 0);
2798                 err = min_t(int, err, 0);
2799                 if (err)
2800                         return err;
2801         }
2802
2803         if (input->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR) {
2804                 err = igb_add_mac_steering_filter(adapter,
2805                                                   input->filter.src_addr,
2806                                                   input->action,
2807                                                   IGB_MAC_STATE_SRC_ADDR);
2808                 err = min_t(int, err, 0);
2809                 if (err)
2810                         return err;
2811         }
2812
2813         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2814                 err = igb_rxnfc_write_vlan_prio_filter(adapter, input);
2815
2816         return err;
2817 }
2818
2819 static void igb_clear_etype_filter_regs(struct igb_adapter *adapter,
2820                                         u16 reg_index)
2821 {
2822         struct e1000_hw *hw = &adapter->hw;
2823         u32 etqf = rd32(E1000_ETQF(reg_index));
2824
2825         etqf &= ~E1000_ETQF_QUEUE_ENABLE;
2826         etqf &= ~E1000_ETQF_QUEUE_MASK;
2827         etqf &= ~E1000_ETQF_FILTER_ENABLE;
2828
2829         wr32(E1000_ETQF(reg_index), etqf);
2830
2831         adapter->etype_bitmap[reg_index] = false;
2832 }
2833
2834 static void igb_clear_vlan_prio_filter(struct igb_adapter *adapter,
2835                                        u16 vlan_tci)
2836 {
2837         struct e1000_hw *hw = &adapter->hw;
2838         u8 vlan_priority;
2839         u32 vlapqf;
2840
2841         vlan_priority = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
2842
2843         vlapqf = rd32(E1000_VLAPQF);
2844         vlapqf &= ~E1000_VLAPQF_P_VALID(vlan_priority);
2845         vlapqf &= ~E1000_VLAPQF_QUEUE_SEL(vlan_priority,
2846                                                 E1000_VLAPQF_QUEUE_MASK);
2847
2848         wr32(E1000_VLAPQF, vlapqf);
2849 }
2850
2851 int igb_erase_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2852 {
2853         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE)
2854                 igb_clear_etype_filter_regs(adapter,
2855                                             input->etype_reg_index);
2856
2857         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2858                 igb_clear_vlan_prio_filter(adapter,
2859                                            ntohs(input->filter.vlan_tci));
2860
2861         if (input->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR)
2862                 igb_del_mac_steering_filter(adapter, input->filter.src_addr,
2863                                             input->action,
2864                                             IGB_MAC_STATE_SRC_ADDR);
2865
2866         if (input->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR)
2867                 igb_del_mac_steering_filter(adapter, input->filter.dst_addr,
2868                                             input->action, 0);
2869
2870         return 0;
2871 }
2872
2873 static int igb_update_ethtool_nfc_entry(struct igb_adapter *adapter,
2874                                         struct igb_nfc_filter *input,
2875                                         u16 sw_idx)
2876 {
2877         struct igb_nfc_filter *rule, *parent;
2878         int err = -EINVAL;
2879
2880         parent = NULL;
2881         rule = NULL;
2882
2883         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2884                 /* hash found, or no matching entry */
2885                 if (rule->sw_idx >= sw_idx)
2886                         break;
2887                 parent = rule;
2888         }
2889
2890         /* if there is an old rule occupying our place remove it */
2891         if (rule && (rule->sw_idx == sw_idx)) {
2892                 if (!input)
2893                         err = igb_erase_filter(adapter, rule);
2894
2895                 hlist_del(&rule->nfc_node);
2896                 kfree(rule);
2897                 adapter->nfc_filter_count--;
2898         }
2899
2900         /* If no input this was a delete, err should be 0 if a rule was
2901          * successfully found and removed from the list else -EINVAL
2902          */
2903         if (!input)
2904                 return err;
2905
2906         /* initialize node */
2907         INIT_HLIST_NODE(&input->nfc_node);
2908
2909         /* add filter to the list */
2910         if (parent)
2911                 hlist_add_behind(&input->nfc_node, &parent->nfc_node);
2912         else
2913                 hlist_add_head(&input->nfc_node, &adapter->nfc_filter_list);
2914
2915         /* update counts */
2916         adapter->nfc_filter_count++;
2917
2918         return 0;
2919 }
2920
2921 static int igb_add_ethtool_nfc_entry(struct igb_adapter *adapter,
2922                                      struct ethtool_rxnfc *cmd)
2923 {
2924         struct net_device *netdev = adapter->netdev;
2925         struct ethtool_rx_flow_spec *fsp =
2926                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2927         struct igb_nfc_filter *input, *rule;
2928         int err = 0;
2929
2930         if (!(netdev->hw_features & NETIF_F_NTUPLE))
2931                 return -EOPNOTSUPP;
2932
2933         /* Don't allow programming if the action is a queue greater than
2934          * the number of online Rx queues.
2935          */
2936         if ((fsp->ring_cookie == RX_CLS_FLOW_DISC) ||
2937             (fsp->ring_cookie >= adapter->num_rx_queues)) {
2938                 dev_err(&adapter->pdev->dev, "ethtool -N: The specified action is invalid\n");
2939                 return -EINVAL;
2940         }
2941
2942         /* Don't allow indexes to exist outside of available space */
2943         if (fsp->location >= IGB_MAX_RXNFC_FILTERS) {
2944                 dev_err(&adapter->pdev->dev, "Location out of range\n");
2945                 return -EINVAL;
2946         }
2947
2948         if ((fsp->flow_type & ~FLOW_EXT) != ETHER_FLOW)
2949                 return -EINVAL;
2950
2951         input = kzalloc(sizeof(*input), GFP_KERNEL);
2952         if (!input)
2953                 return -ENOMEM;
2954
2955         if (fsp->m_u.ether_spec.h_proto == ETHER_TYPE_FULL_MASK) {
2956                 input->filter.etype = fsp->h_u.ether_spec.h_proto;
2957                 input->filter.match_flags = IGB_FILTER_FLAG_ETHER_TYPE;
2958         }
2959
2960         /* Only support matching addresses by the full mask */
2961         if (is_broadcast_ether_addr(fsp->m_u.ether_spec.h_source)) {
2962                 input->filter.match_flags |= IGB_FILTER_FLAG_SRC_MAC_ADDR;
2963                 ether_addr_copy(input->filter.src_addr,
2964                                 fsp->h_u.ether_spec.h_source);
2965         }
2966
2967         /* Only support matching addresses by the full mask */
2968         if (is_broadcast_ether_addr(fsp->m_u.ether_spec.h_dest)) {
2969                 input->filter.match_flags |= IGB_FILTER_FLAG_DST_MAC_ADDR;
2970                 ether_addr_copy(input->filter.dst_addr,
2971                                 fsp->h_u.ether_spec.h_dest);
2972         }
2973
2974         if ((fsp->flow_type & FLOW_EXT) && fsp->m_ext.vlan_tci) {
2975                 if (fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
2976                         err = -EINVAL;
2977                         goto err_out;
2978                 }
2979                 input->filter.vlan_tci = fsp->h_ext.vlan_tci;
2980                 input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2981         }
2982
2983         input->action = fsp->ring_cookie;
2984         input->sw_idx = fsp->location;
2985
2986         spin_lock(&adapter->nfc_lock);
2987
2988         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2989                 if (!memcmp(&input->filter, &rule->filter,
2990                             sizeof(input->filter))) {
2991                         err = -EEXIST;
2992                         dev_err(&adapter->pdev->dev,
2993                                 "ethtool: this filter is already set\n");
2994                         goto err_out_w_lock;
2995                 }
2996         }
2997
2998         err = igb_add_filter(adapter, input);
2999         if (err)
3000                 goto err_out_w_lock;
3001
3002         igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
3003
3004         spin_unlock(&adapter->nfc_lock);
3005         return 0;
3006
3007 err_out_w_lock:
3008         spin_unlock(&adapter->nfc_lock);
3009 err_out:
3010         kfree(input);
3011         return err;
3012 }
3013
3014 static int igb_del_ethtool_nfc_entry(struct igb_adapter *adapter,
3015                                      struct ethtool_rxnfc *cmd)
3016 {
3017         struct ethtool_rx_flow_spec *fsp =
3018                 (struct ethtool_rx_flow_spec *)&cmd->fs;
3019         int err;
3020
3021         spin_lock(&adapter->nfc_lock);
3022         err = igb_update_ethtool_nfc_entry(adapter, NULL, fsp->location);
3023         spin_unlock(&adapter->nfc_lock);
3024
3025         return err;
3026 }
3027
3028 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
3029 {
3030         struct igb_adapter *adapter = netdev_priv(dev);
3031         int ret = -EOPNOTSUPP;
3032
3033         switch (cmd->cmd) {
3034         case ETHTOOL_SRXFH:
3035                 ret = igb_set_rss_hash_opt(adapter, cmd);
3036                 break;
3037         case ETHTOOL_SRXCLSRLINS:
3038                 ret = igb_add_ethtool_nfc_entry(adapter, cmd);
3039                 break;
3040         case ETHTOOL_SRXCLSRLDEL:
3041                 ret = igb_del_ethtool_nfc_entry(adapter, cmd);
3042         default:
3043                 break;
3044         }
3045
3046         return ret;
3047 }
3048
3049 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
3050 {
3051         struct igb_adapter *adapter = netdev_priv(netdev);
3052         struct e1000_hw *hw = &adapter->hw;
3053         u32 ret_val;
3054         u16 phy_data;
3055
3056         if ((hw->mac.type < e1000_i350) ||
3057             (hw->phy.media_type != e1000_media_type_copper))
3058                 return -EOPNOTSUPP;
3059
3060         edata->supported = (SUPPORTED_1000baseT_Full |
3061                             SUPPORTED_100baseT_Full);
3062         if (!hw->dev_spec._82575.eee_disable)
3063                 edata->advertised =
3064                         mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
3065
3066         /* The IPCNFG and EEER registers are not supported on I354. */
3067         if (hw->mac.type == e1000_i354) {
3068                 igb_get_eee_status_i354(hw, (bool *)&edata->eee_active);
3069         } else {
3070                 u32 eeer;
3071
3072                 eeer = rd32(E1000_EEER);
3073
3074                 /* EEE status on negotiated link */
3075                 if (eeer & E1000_EEER_EEE_NEG)
3076                         edata->eee_active = true;
3077
3078                 if (eeer & E1000_EEER_TX_LPI_EN)
3079                         edata->tx_lpi_enabled = true;
3080         }
3081
3082         /* EEE Link Partner Advertised */
3083         switch (hw->mac.type) {
3084         case e1000_i350:
3085                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
3086                                            &phy_data);
3087                 if (ret_val)
3088                         return -ENODATA;
3089
3090                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3091                 break;
3092         case e1000_i354:
3093         case e1000_i210:
3094         case e1000_i211:
3095                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
3096                                              E1000_EEE_LP_ADV_DEV_I210,
3097                                              &phy_data);
3098                 if (ret_val)
3099                         return -ENODATA;
3100
3101                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3102
3103                 break;
3104         default:
3105                 break;
3106         }
3107
3108         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
3109
3110         if ((hw->mac.type == e1000_i354) &&
3111             (edata->eee_enabled))
3112                 edata->tx_lpi_enabled = true;
3113
3114         /* Report correct negotiated EEE status for devices that
3115          * wrongly report EEE at half-duplex
3116          */
3117         if (adapter->link_duplex == HALF_DUPLEX) {
3118                 edata->eee_enabled = false;
3119                 edata->eee_active = false;
3120                 edata->tx_lpi_enabled = false;
3121                 edata->advertised &= ~edata->advertised;
3122         }
3123
3124         return 0;
3125 }
3126
3127 static int igb_set_eee(struct net_device *netdev,
3128                        struct ethtool_eee *edata)
3129 {
3130         struct igb_adapter *adapter = netdev_priv(netdev);
3131         struct e1000_hw *hw = &adapter->hw;
3132         struct ethtool_eee eee_curr;
3133         bool adv1g_eee = true, adv100m_eee = true;
3134         s32 ret_val;
3135
3136         if ((hw->mac.type < e1000_i350) ||
3137             (hw->phy.media_type != e1000_media_type_copper))
3138                 return -EOPNOTSUPP;
3139
3140         memset(&eee_curr, 0, sizeof(struct ethtool_eee));
3141
3142         ret_val = igb_get_eee(netdev, &eee_curr);
3143         if (ret_val)
3144                 return ret_val;
3145
3146         if (eee_curr.eee_enabled) {
3147                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
3148                         dev_err(&adapter->pdev->dev,
3149                                 "Setting EEE tx-lpi is not supported\n");
3150                         return -EINVAL;
3151                 }
3152
3153                 /* Tx LPI timer is not implemented currently */
3154                 if (edata->tx_lpi_timer) {
3155                         dev_err(&adapter->pdev->dev,
3156                                 "Setting EEE Tx LPI timer is not supported\n");
3157                         return -EINVAL;
3158                 }
3159
3160                 if (!edata->advertised || (edata->advertised &
3161                     ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL))) {
3162                         dev_err(&adapter->pdev->dev,
3163                                 "EEE Advertisement supports only 100Tx and/or 100T full duplex\n");
3164                         return -EINVAL;
3165                 }
3166                 adv100m_eee = !!(edata->advertised & ADVERTISE_100_FULL);
3167                 adv1g_eee = !!(edata->advertised & ADVERTISE_1000_FULL);
3168
3169         } else if (!edata->eee_enabled) {
3170                 dev_err(&adapter->pdev->dev,
3171                         "Setting EEE options are not supported with EEE disabled\n");
3172                 return -EINVAL;
3173         }
3174
3175         adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
3176         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
3177                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
3178                 adapter->flags |= IGB_FLAG_EEE;
3179
3180                 /* reset link */
3181                 if (netif_running(netdev))
3182                         igb_reinit_locked(adapter);
3183                 else
3184                         igb_reset(adapter);
3185         }
3186
3187         if (hw->mac.type == e1000_i354)
3188                 ret_val = igb_set_eee_i354(hw, adv1g_eee, adv100m_eee);
3189         else
3190                 ret_val = igb_set_eee_i350(hw, adv1g_eee, adv100m_eee);
3191
3192         if (ret_val) {
3193                 dev_err(&adapter->pdev->dev,
3194                         "Problem setting EEE advertisement options\n");
3195                 return -EINVAL;
3196         }
3197
3198         return 0;
3199 }
3200
3201 static int igb_get_module_info(struct net_device *netdev,
3202                                struct ethtool_modinfo *modinfo)
3203 {
3204         struct igb_adapter *adapter = netdev_priv(netdev);
3205         struct e1000_hw *hw = &adapter->hw;
3206         u32 status = 0;
3207         u16 sff8472_rev, addr_mode;
3208         bool page_swap = false;
3209
3210         if ((hw->phy.media_type == e1000_media_type_copper) ||
3211             (hw->phy.media_type == e1000_media_type_unknown))
3212                 return -EOPNOTSUPP;
3213
3214         /* Check whether we support SFF-8472 or not */
3215         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
3216         if (status)
3217                 return -EIO;
3218
3219         /* addressing mode is not supported */
3220         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
3221         if (status)
3222                 return -EIO;
3223
3224         /* addressing mode is not supported */
3225         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
3226                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3227                 page_swap = true;
3228         }
3229
3230         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
3231                 /* We have an SFP, but it does not support SFF-8472 */
3232                 modinfo->type = ETH_MODULE_SFF_8079;
3233                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3234         } else {
3235                 /* We have an SFP which supports a revision of SFF-8472 */
3236                 modinfo->type = ETH_MODULE_SFF_8472;
3237                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3238         }
3239
3240         return 0;
3241 }
3242
3243 static int igb_get_module_eeprom(struct net_device *netdev,
3244                                  struct ethtool_eeprom *ee, u8 *data)
3245 {
3246         struct igb_adapter *adapter = netdev_priv(netdev);
3247         struct e1000_hw *hw = &adapter->hw;
3248         u32 status = 0;
3249         u16 *dataword;
3250         u16 first_word, last_word;
3251         int i = 0;
3252
3253         if (ee->len == 0)
3254                 return -EINVAL;
3255
3256         first_word = ee->offset >> 1;
3257         last_word = (ee->offset + ee->len - 1) >> 1;
3258
3259         dataword = kmalloc_array(last_word - first_word + 1, sizeof(u16),
3260                                  GFP_KERNEL);
3261         if (!dataword)
3262                 return -ENOMEM;
3263
3264         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
3265         for (i = 0; i < last_word - first_word + 1; i++) {
3266                 status = igb_read_phy_reg_i2c(hw, (first_word + i) * 2,
3267                                               &dataword[i]);
3268                 if (status) {
3269                         /* Error occurred while reading module */
3270                         kfree(dataword);
3271                         return -EIO;
3272                 }
3273
3274                 be16_to_cpus(&dataword[i]);
3275         }
3276
3277         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
3278         kfree(dataword);
3279
3280         return 0;
3281 }
3282
3283 static int igb_ethtool_begin(struct net_device *netdev)
3284 {
3285         struct igb_adapter *adapter = netdev_priv(netdev);
3286         pm_runtime_get_sync(&adapter->pdev->dev);
3287         return 0;
3288 }
3289
3290 static void igb_ethtool_complete(struct net_device *netdev)
3291 {
3292         struct igb_adapter *adapter = netdev_priv(netdev);
3293         pm_runtime_put(&adapter->pdev->dev);
3294 }
3295
3296 static u32 igb_get_rxfh_indir_size(struct net_device *netdev)
3297 {
3298         return IGB_RETA_SIZE;
3299 }
3300
3301 static int igb_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3302                         u8 *hfunc)
3303 {
3304         struct igb_adapter *adapter = netdev_priv(netdev);
3305         int i;
3306
3307         if (hfunc)
3308                 *hfunc = ETH_RSS_HASH_TOP;
3309         if (!indir)
3310                 return 0;
3311         for (i = 0; i < IGB_RETA_SIZE; i++)
3312                 indir[i] = adapter->rss_indir_tbl[i];
3313
3314         return 0;
3315 }
3316
3317 void igb_write_rss_indir_tbl(struct igb_adapter *adapter)
3318 {
3319         struct e1000_hw *hw = &adapter->hw;
3320         u32 reg = E1000_RETA(0);
3321         u32 shift = 0;
3322         int i = 0;
3323
3324         switch (hw->mac.type) {
3325         case e1000_82575:
3326                 shift = 6;
3327                 break;
3328         case e1000_82576:
3329                 /* 82576 supports 2 RSS queues for SR-IOV */
3330                 if (adapter->vfs_allocated_count)
3331                         shift = 3;
3332                 break;
3333         default:
3334                 break;
3335         }
3336
3337         while (i < IGB_RETA_SIZE) {
3338                 u32 val = 0;
3339                 int j;
3340
3341                 for (j = 3; j >= 0; j--) {
3342                         val <<= 8;
3343                         val |= adapter->rss_indir_tbl[i + j];
3344                 }
3345
3346                 wr32(reg, val << shift);
3347                 reg += 4;
3348                 i += 4;
3349         }
3350 }
3351
3352 static int igb_set_rxfh(struct net_device *netdev, const u32 *indir,
3353                         const u8 *key, const u8 hfunc)
3354 {
3355         struct igb_adapter *adapter = netdev_priv(netdev);
3356         struct e1000_hw *hw = &adapter->hw;
3357         int i;
3358         u32 num_queues;
3359
3360         /* We do not allow change in unsupported parameters */
3361         if (key ||
3362             (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
3363                 return -EOPNOTSUPP;
3364         if (!indir)
3365                 return 0;
3366
3367         num_queues = adapter->rss_queues;
3368
3369         switch (hw->mac.type) {
3370         case e1000_82576:
3371                 /* 82576 supports 2 RSS queues for SR-IOV */
3372                 if (adapter->vfs_allocated_count)
3373                         num_queues = 2;
3374                 break;
3375         default:
3376                 break;
3377         }
3378
3379         /* Verify user input. */
3380         for (i = 0; i < IGB_RETA_SIZE; i++)
3381                 if (indir[i] >= num_queues)
3382                         return -EINVAL;
3383
3384
3385         for (i = 0; i < IGB_RETA_SIZE; i++)
3386                 adapter->rss_indir_tbl[i] = indir[i];
3387
3388         igb_write_rss_indir_tbl(adapter);
3389
3390         return 0;
3391 }
3392
3393 static unsigned int igb_max_channels(struct igb_adapter *adapter)
3394 {
3395         return igb_get_max_rss_queues(adapter);
3396 }
3397
3398 static void igb_get_channels(struct net_device *netdev,
3399                              struct ethtool_channels *ch)
3400 {
3401         struct igb_adapter *adapter = netdev_priv(netdev);
3402
3403         /* Report maximum channels */
3404         ch->max_combined = igb_max_channels(adapter);
3405
3406         /* Report info for other vector */
3407         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
3408                 ch->max_other = NON_Q_VECTORS;
3409                 ch->other_count = NON_Q_VECTORS;
3410         }
3411
3412         ch->combined_count = adapter->rss_queues;
3413 }
3414
3415 static int igb_set_channels(struct net_device *netdev,
3416                             struct ethtool_channels *ch)
3417 {
3418         struct igb_adapter *adapter = netdev_priv(netdev);
3419         unsigned int count = ch->combined_count;
3420         unsigned int max_combined = 0;
3421
3422         /* Verify they are not requesting separate vectors */
3423         if (!count || ch->rx_count || ch->tx_count)
3424                 return -EINVAL;
3425
3426         /* Verify other_count is valid and has not been changed */
3427         if (ch->other_count != NON_Q_VECTORS)
3428                 return -EINVAL;
3429
3430         /* Verify the number of channels doesn't exceed hw limits */
3431         max_combined = igb_max_channels(adapter);
3432         if (count > max_combined)
3433                 return -EINVAL;
3434
3435         if (count != adapter->rss_queues) {
3436                 adapter->rss_queues = count;
3437                 igb_set_flag_queue_pairs(adapter, max_combined);
3438
3439                 /* Hardware has to reinitialize queues and interrupts to
3440                  * match the new configuration.
3441                  */
3442                 return igb_reinit_queues(adapter);
3443         }
3444
3445         return 0;
3446 }
3447
3448 static u32 igb_get_priv_flags(struct net_device *netdev)
3449 {
3450         struct igb_adapter *adapter = netdev_priv(netdev);
3451         u32 priv_flags = 0;
3452
3453         if (adapter->flags & IGB_FLAG_RX_LEGACY)
3454                 priv_flags |= IGB_PRIV_FLAGS_LEGACY_RX;
3455
3456         return priv_flags;
3457 }
3458
3459 static int igb_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3460 {
3461         struct igb_adapter *adapter = netdev_priv(netdev);
3462         unsigned int flags = adapter->flags;
3463
3464         flags &= ~IGB_FLAG_RX_LEGACY;
3465         if (priv_flags & IGB_PRIV_FLAGS_LEGACY_RX)
3466                 flags |= IGB_FLAG_RX_LEGACY;
3467
3468         if (flags != adapter->flags) {
3469                 adapter->flags = flags;
3470
3471                 /* reset interface to repopulate queues */
3472                 if (netif_running(netdev))
3473                         igb_reinit_locked(adapter);
3474         }
3475
3476         return 0;
3477 }
3478
3479 static const struct ethtool_ops igb_ethtool_ops = {
3480         .get_drvinfo            = igb_get_drvinfo,
3481         .get_regs_len           = igb_get_regs_len,
3482         .get_regs               = igb_get_regs,
3483         .get_wol                = igb_get_wol,
3484         .set_wol                = igb_set_wol,
3485         .get_msglevel           = igb_get_msglevel,
3486         .set_msglevel           = igb_set_msglevel,
3487         .nway_reset             = igb_nway_reset,
3488         .get_link               = igb_get_link,
3489         .get_eeprom_len         = igb_get_eeprom_len,
3490         .get_eeprom             = igb_get_eeprom,
3491         .set_eeprom             = igb_set_eeprom,
3492         .get_ringparam          = igb_get_ringparam,
3493         .set_ringparam          = igb_set_ringparam,
3494         .get_pauseparam         = igb_get_pauseparam,
3495         .set_pauseparam         = igb_set_pauseparam,
3496         .self_test              = igb_diag_test,
3497         .get_strings            = igb_get_strings,
3498         .set_phys_id            = igb_set_phys_id,
3499         .get_sset_count         = igb_get_sset_count,
3500         .get_ethtool_stats      = igb_get_ethtool_stats,
3501         .get_coalesce           = igb_get_coalesce,
3502         .set_coalesce           = igb_set_coalesce,
3503         .get_ts_info            = igb_get_ts_info,
3504         .get_rxnfc              = igb_get_rxnfc,
3505         .set_rxnfc              = igb_set_rxnfc,
3506         .get_eee                = igb_get_eee,
3507         .set_eee                = igb_set_eee,
3508         .get_module_info        = igb_get_module_info,
3509         .get_module_eeprom      = igb_get_module_eeprom,
3510         .get_rxfh_indir_size    = igb_get_rxfh_indir_size,
3511         .get_rxfh               = igb_get_rxfh,
3512         .set_rxfh               = igb_set_rxfh,
3513         .get_channels           = igb_get_channels,
3514         .set_channels           = igb_set_channels,
3515         .get_priv_flags         = igb_get_priv_flags,
3516         .set_priv_flags         = igb_set_priv_flags,
3517         .begin                  = igb_ethtool_begin,
3518         .complete               = igb_ethtool_complete,
3519         .get_link_ksettings     = igb_get_link_ksettings,
3520         .set_link_ksettings     = igb_set_link_ksettings,
3521 };
3522
3523 void igb_set_ethtool_ops(struct net_device *netdev)
3524 {
3525         netdev->ethtool_ops = &igb_ethtool_ops;
3526 }