1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt control channel messages
6 * Copyright (C) 2017, Intel Corporation
12 #include <linux/types.h>
13 #include <linux/uuid.h>
23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 TB_CFG_ERROR_LINK_ERROR = 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP = 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
31 TB_CFG_ERROR_LOCK = 15,
32 TB_CFG_ERROR_DP_BW = 32,
33 TB_CFG_ERROR_ROP_CMPLT = 33,
34 TB_CFG_ERROR_POP_CMPLT = 34,
35 TB_CFG_ERROR_PCIE_WAKE = 35,
36 TB_CFG_ERROR_DP_CON_CHANGE = 36,
37 TB_CFG_ERROR_DPTX_DISCOVERY = 37,
38 TB_CFG_ERROR_LINK_RECOVERY = 38,
39 TB_CFG_ERROR_ASYM_LINK = 39,
43 struct tb_cfg_header {
45 u32 unknown:10; /* highest order bit is set on replies */
49 /* additional header for read/write packets */
50 struct tb_cfg_address {
51 u32 offset:13; /* in dwords */
52 u32 length:6; /* in dwords */
54 enum tb_cfg_space space:2;
55 u32 seq:2; /* sequence number */
59 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
61 struct tb_cfg_header header;
62 struct tb_cfg_address addr;
65 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
66 struct cfg_write_pkg {
67 struct tb_cfg_header header;
68 struct tb_cfg_address addr;
69 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
72 /* TB_CFG_PKG_ERROR */
73 struct cfg_error_pkg {
74 struct tb_cfg_header header;
75 enum tb_cfg_error error:8;
82 struct tb_cfg_header header;
85 #define TB_CFG_ERROR_PG_HOT_PLUG 0x2
86 #define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3
88 /* TB_CFG_PKG_EVENT */
89 struct cfg_event_pkg {
90 struct tb_cfg_header header;
96 /* TB_CFG_PKG_RESET */
97 struct cfg_reset_pkg {
98 struct tb_cfg_header header;
104 ICM_GET_TOPOLOGY = 0x1,
105 ICM_DRIVER_READY = 0x3,
106 ICM_APPROVE_DEVICE = 0x4,
107 ICM_CHALLENGE_DEVICE = 0x5,
108 ICM_ADD_DEVICE_KEY = 0x6,
110 ICM_APPROVE_XDOMAIN = 0x10,
111 ICM_DISCONNECT_XDOMAIN = 0x11,
112 ICM_PREBOOT_ACL = 0x18,
113 ICM_USB4_SWITCH_OP = 0x20,
116 enum icm_event_code {
117 ICM_EVENT_DEVICE_CONNECTED = 0x3,
118 ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
119 ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
120 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
121 ICM_EVENT_RTD3_VETO = 0xa,
124 struct icm_pkg_header {
131 #define ICM_FLAGS_ERROR BIT(0)
132 #define ICM_FLAGS_NO_KEY BIT(1)
133 #define ICM_FLAGS_SLEVEL_SHIFT 3
134 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
135 #define ICM_FLAGS_DUAL_LANE BIT(5)
136 #define ICM_FLAGS_SPEED_GEN3 BIT(7)
137 #define ICM_FLAGS_WRITE BIT(7)
139 struct icm_pkg_driver_ready {
140 struct icm_pkg_header hdr;
143 /* Falcon Ridge only messages */
145 struct icm_fr_pkg_driver_ready_response {
146 struct icm_pkg_header hdr;
152 #define ICM_FR_SLEVEL_MASK 0xf
154 /* Falcon Ridge & Alpine Ridge common messages */
156 struct icm_fr_pkg_get_topology {
157 struct icm_pkg_header hdr;
160 #define ICM_GET_TOPOLOGY_PACKETS 14
162 struct icm_fr_pkg_get_topology_response {
163 struct icm_pkg_header hdr;
168 u8 drom_i2c_address_index;
172 u32 port_hop_info[16];
175 #define ICM_SWITCH_USED BIT(0)
176 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
177 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
179 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
180 #define ICM_PORT_INDEX_SHIFT 24
181 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
183 struct icm_fr_event_device_connected {
184 struct icm_pkg_header hdr;
192 #define ICM_LINK_INFO_LINK_MASK 0x7
193 #define ICM_LINK_INFO_DEPTH_SHIFT 4
194 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
195 #define ICM_LINK_INFO_APPROVED BIT(8)
196 #define ICM_LINK_INFO_REJECTED BIT(9)
197 #define ICM_LINK_INFO_BOOT BIT(10)
199 struct icm_fr_pkg_approve_device {
200 struct icm_pkg_header hdr;
207 struct icm_fr_event_device_disconnected {
208 struct icm_pkg_header hdr;
213 struct icm_fr_event_xdomain_connected {
214 struct icm_pkg_header hdr;
225 struct icm_fr_event_xdomain_disconnected {
226 struct icm_pkg_header hdr;
232 struct icm_fr_pkg_add_device_key {
233 struct icm_pkg_header hdr;
241 struct icm_fr_pkg_add_device_key_response {
242 struct icm_pkg_header hdr;
249 struct icm_fr_pkg_challenge_device {
250 struct icm_pkg_header hdr;
258 struct icm_fr_pkg_challenge_device_response {
259 struct icm_pkg_header hdr;
268 struct icm_fr_pkg_approve_xdomain {
269 struct icm_pkg_header hdr;
279 struct icm_fr_pkg_approve_xdomain_response {
280 struct icm_pkg_header hdr;
290 /* Alpine Ridge only messages */
292 struct icm_ar_pkg_driver_ready_response {
293 struct icm_pkg_header hdr;
299 #define ICM_AR_FLAGS_RTD3 BIT(6)
301 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
302 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
303 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
304 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
306 struct icm_ar_pkg_get_route {
307 struct icm_pkg_header hdr;
312 struct icm_ar_pkg_get_route_response {
313 struct icm_pkg_header hdr;
320 struct icm_ar_boot_acl_entry {
325 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
327 struct icm_ar_pkg_preboot_acl {
328 struct icm_pkg_header hdr;
329 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
332 struct icm_ar_pkg_preboot_acl_response {
333 struct icm_pkg_header hdr;
334 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
337 /* Titan Ridge messages */
339 struct icm_tr_pkg_driver_ready_response {
340 struct icm_pkg_header hdr;
348 #define ICM_TR_FLAGS_RTD3 BIT(6)
350 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
351 #define ICM_TR_INFO_PROTO_VERSION_MASK GENMASK(6, 4)
352 #define ICM_TR_INFO_PROTO_VERSION_SHIFT 4
353 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
354 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
356 struct icm_tr_event_device_connected {
357 struct icm_pkg_header hdr;
367 struct icm_tr_event_device_disconnected {
368 struct icm_pkg_header hdr;
373 struct icm_tr_event_xdomain_connected {
374 struct icm_pkg_header hdr;
385 struct icm_tr_event_xdomain_disconnected {
386 struct icm_pkg_header hdr;
392 struct icm_tr_pkg_approve_device {
393 struct icm_pkg_header hdr;
401 struct icm_tr_pkg_add_device_key {
402 struct icm_pkg_header hdr;
411 struct icm_tr_pkg_challenge_device {
412 struct icm_pkg_header hdr;
421 struct icm_tr_pkg_approve_xdomain {
422 struct icm_pkg_header hdr;
432 struct icm_tr_pkg_disconnect_xdomain {
433 struct icm_pkg_header hdr;
441 struct icm_tr_pkg_challenge_device_response {
442 struct icm_pkg_header hdr;
452 struct icm_tr_pkg_add_device_key_response {
453 struct icm_pkg_header hdr;
461 struct icm_tr_pkg_approve_xdomain_response {
462 struct icm_pkg_header hdr;
472 struct icm_tr_pkg_disconnect_xdomain_response {
473 struct icm_pkg_header hdr;
481 /* Ice Lake messages */
483 struct icm_icl_event_rtd3_veto {
484 struct icm_pkg_header hdr;
488 /* USB4 ICM messages */
490 struct icm_usb4_switch_op {
491 struct icm_pkg_header hdr;
500 #define ICM_USB4_SWITCH_DATA_LEN_MASK GENMASK(3, 0)
501 #define ICM_USB4_SWITCH_DATA_VALID BIT(4)
503 struct icm_usb4_switch_op_response {
504 struct icm_pkg_header hdr;
513 /* XDomain messages */
515 struct tb_xdomain_header {
521 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
522 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
523 #define TB_XDOMAIN_SN_SHIFT 27
526 UUID_REQUEST_OLD = 1,
530 PROPERTIES_CHANGED_REQUEST,
531 PROPERTIES_CHANGED_RESPONSE,
534 LINK_STATE_STATUS_REQUEST = 15,
535 LINK_STATE_STATUS_RESPONSE,
536 LINK_STATE_CHANGE_REQUEST,
537 LINK_STATE_CHANGE_RESPONSE,
540 struct tb_xdp_header {
541 struct tb_xdomain_header xd_hdr;
546 struct tb_xdp_error_response {
547 struct tb_xdp_header hdr;
551 struct tb_xdp_link_state_status {
552 struct tb_xdp_header hdr;
555 struct tb_xdp_link_state_status_response {
557 struct tb_xdp_error_response err;
559 struct tb_xdp_header hdr;
569 struct tb_xdp_link_state_change {
570 struct tb_xdp_header hdr;
576 struct tb_xdp_link_state_change_response {
578 struct tb_xdp_error_response err;
580 struct tb_xdp_header hdr;
587 struct tb_xdp_header hdr;
590 struct tb_xdp_uuid_response {
592 struct tb_xdp_error_response err;
594 struct tb_xdp_header hdr;
602 struct tb_xdp_properties {
603 struct tb_xdp_header hdr;
610 struct tb_xdp_properties_response {
612 struct tb_xdp_error_response err;
614 struct tb_xdp_header hdr;
626 * Max length of data array single XDomain property response is allowed
629 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
630 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
632 /* Maximum size of the total property block in dwords we allow */
633 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
635 struct tb_xdp_properties_changed {
636 struct tb_xdp_header hdr;
640 struct tb_xdp_properties_changed_response {
642 struct tb_xdp_error_response err;
643 struct tb_xdp_header hdr;
649 ERROR_UNKNOWN_PACKET,
650 ERROR_UNKNOWN_DOMAIN,