1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the TI TPS23881 PoE PSE Controller driver (I2C bus)
8 #include <linux/delay.h>
9 #include <linux/firmware.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
13 #include <linux/platform_device.h>
14 #include <linux/pse-pd/pse.h>
16 #define TPS23881_MAX_CHANS 8
18 #define TPS23881_REG_PW_STATUS 0x10
19 #define TPS23881_REG_OP_MODE 0x12
20 #define TPS23881_OP_MODE_SEMIAUTO 0xaaaa
21 #define TPS23881_REG_DIS_EN 0x13
22 #define TPS23881_REG_DET_CLA_EN 0x14
23 #define TPS23881_REG_GEN_MASK 0x17
24 #define TPS23881_REG_NBITACC BIT(5)
25 #define TPS23881_REG_PW_EN 0x19
26 #define TPS23881_REG_PORT_MAP 0x26
27 #define TPS23881_REG_PORT_POWER 0x29
28 #define TPS23881_REG_POEPLUS 0x40
29 #define TPS23881_REG_TPON BIT(0)
30 #define TPS23881_REG_FWREV 0x41
31 #define TPS23881_REG_DEVID 0x43
32 #define TPS23881_REG_SRAM_CTRL 0x60
33 #define TPS23881_REG_SRAM_DATA 0x61
35 struct tps23881_port_desc {
40 struct tps23881_priv {
41 struct i2c_client *client;
42 struct pse_controller_dev pcdev;
43 struct device_node *np;
44 struct tps23881_port_desc port[TPS23881_MAX_CHANS];
47 static struct tps23881_priv *to_tps23881_priv(struct pse_controller_dev *pcdev)
49 return container_of(pcdev, struct tps23881_priv, pcdev);
52 static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id)
54 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
55 struct i2c_client *client = priv->client;
60 if (id >= TPS23881_MAX_CHANS)
63 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
67 chan = priv->port[id].chan[0];
69 val = (u16)(ret | BIT(chan));
71 val = (u16)(ret | BIT(chan + 4));
73 if (priv->port[id].is_4p) {
74 chan = priv->port[id].chan[1];
81 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);
88 static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id)
90 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
91 struct i2c_client *client = priv->client;
96 if (id >= TPS23881_MAX_CHANS)
99 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
103 chan = priv->port[id].chan[0];
105 val = (u16)(ret | BIT(chan + 4));
107 val = (u16)(ret | BIT(chan + 8));
109 if (priv->port[id].is_4p) {
110 chan = priv->port[id].chan[1];
112 val |= BIT(chan + 4);
114 val |= BIT(chan + 8);
117 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);
124 static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id)
126 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
127 struct i2c_client *client = priv->client;
132 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
136 chan = priv->port[id].chan[0];
138 enabled = ret & BIT(chan);
140 enabled = ret & BIT(chan + 4);
142 if (priv->port[id].is_4p) {
143 chan = priv->port[id].chan[1];
145 enabled &= !!(ret & BIT(chan));
147 enabled &= !!(ret & BIT(chan + 4));
150 /* Return enabled status only if both channel are on this state */
154 static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev,
156 struct netlink_ext_ack *extack,
157 struct pse_control_status *status)
159 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
160 struct i2c_client *client = priv->client;
161 bool enabled, delivering;
165 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
169 chan = priv->port[id].chan[0];
171 enabled = ret & BIT(chan);
172 delivering = ret & BIT(chan + 4);
174 enabled = ret & BIT(chan + 4);
175 delivering = ret & BIT(chan + 8);
178 if (priv->port[id].is_4p) {
179 chan = priv->port[id].chan[1];
181 enabled &= !!(ret & BIT(chan));
182 delivering &= !!(ret & BIT(chan + 4));
184 enabled &= !!(ret & BIT(chan + 4));
185 delivering &= !!(ret & BIT(chan + 8));
189 /* Return delivering status only if both channel are on this state */
191 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING;
193 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED;
195 /* Return enabled status only if both channel are on this state */
197 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;
199 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;
204 /* Parse managers subnode into a array of device node */
206 tps23881_get_of_channels(struct tps23881_priv *priv,
207 struct device_node *chan_node[TPS23881_MAX_CHANS])
209 struct device_node *channels_node, *node;
215 channels_node = of_find_node_by_name(priv->np, "channels");
219 for_each_child_of_node(channels_node, node) {
222 if (!of_node_name_eq(node, "channel"))
225 ret = of_property_read_u32(node, "reg", &chan_id);
231 if (chan_id >= TPS23881_MAX_CHANS || chan_node[chan_id]) {
232 dev_err(&priv->client->dev,
233 "wrong number of port (%d)\n", chan_id);
239 chan_node[chan_id] = node;
242 of_node_put(channels_node);
246 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
247 of_node_put(chan_node[i]);
252 of_node_put(channels_node);
256 struct tps23881_port_matrix {
265 tps23881_match_channel(const struct pse_pi_pairset *pairset,
266 struct device_node *chan_node[TPS23881_MAX_CHANS])
270 /* Look on every channels */
271 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
272 if (pairset->np == chan_node[i])
280 tps23881_is_chan_free(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS],
285 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
286 if (port_matrix[i].exist &&
287 (port_matrix[i].hw_chan[0] == chan ||
288 port_matrix[i].hw_chan[1] == chan))
295 /* Fill port matrix with the matching channels */
297 tps23881_match_port_matrix(struct pse_pi *pi, int pi_id,
298 struct device_node *chan_node[TPS23881_MAX_CHANS],
299 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS])
303 if (!pi->pairset[0].np)
306 ret = tps23881_match_channel(&pi->pairset[0], chan_node);
310 if (!tps23881_is_chan_free(port_matrix, ret)) {
311 pr_err("tps23881: channel %d already used\n", ret);
315 port_matrix[pi_id].hw_chan[0] = ret;
316 port_matrix[pi_id].exist = true;
318 if (!pi->pairset[1].np)
321 ret = tps23881_match_channel(&pi->pairset[1], chan_node);
325 if (!tps23881_is_chan_free(port_matrix, ret)) {
326 pr_err("tps23881: channel %d already used\n", ret);
330 if (port_matrix[pi_id].hw_chan[0] / 4 != ret / 4) {
331 pr_err("tps23881: 4-pair PSE can only be set within the same 4 ports group");
335 port_matrix[pi_id].hw_chan[1] = ret;
336 port_matrix[pi_id].is_4p = true;
342 tps23881_get_unused_chan(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS],
348 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
351 for (j = 0; j < port_cnt; j++) {
352 if (port_matrix[j].hw_chan[0] == i) {
357 if (port_matrix[j].is_4p &&
358 port_matrix[j].hw_chan[1] == i) {
371 /* Sort the port matrix to following particular hardware ports matrix
372 * specification of the tps23881. The device has two 4-ports groups and
373 * each 4-pair powered device has to be configured to use two consecutive
374 * logical channel in each 4 ports group (1 and 2 or 3 and 4). Also the
375 * hardware matrix has to be fully configured even with unused chan to be
379 tps23881_sort_port_matrix(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS])
381 struct tps23881_port_matrix tmp_port_matrix[TPS23881_MAX_CHANS] = {0};
382 int i, ret, port_cnt = 0, cnt_4ch_grp1 = 0, cnt_4ch_grp2 = 4;
384 /* Configure 4p port matrix */
385 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
388 if (!port_matrix[i].exist || !port_matrix[i].is_4p)
391 if (port_matrix[i].hw_chan[0] < 4)
396 tmp_port_matrix[port_cnt].exist = true;
397 tmp_port_matrix[port_cnt].is_4p = true;
398 tmp_port_matrix[port_cnt].pi_id = i;
399 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0];
400 tmp_port_matrix[port_cnt].hw_chan[1] = port_matrix[i].hw_chan[1];
402 /* 4-pair ports have to be configured with consecutive
403 * logical channels 0 and 1, 2 and 3.
405 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++;
406 tmp_port_matrix[port_cnt].lgcl_chan[1] = (*cnt)++;
411 /* Configure 2p port matrix */
412 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
415 if (!port_matrix[i].exist || port_matrix[i].is_4p)
418 if (port_matrix[i].hw_chan[0] < 4)
423 tmp_port_matrix[port_cnt].exist = true;
424 tmp_port_matrix[port_cnt].pi_id = i;
425 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++;
426 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0];
431 /* Complete the rest of the first 4 port group matrix even if
432 * channels are unused
434 while (cnt_4ch_grp1 < 4) {
435 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt);
437 pr_err("tps23881: port matrix issue, no chan available\n");
441 if (port_cnt >= TPS23881_MAX_CHANS) {
442 pr_err("tps23881: wrong number of channels\n");
445 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp1;
446 tmp_port_matrix[port_cnt].hw_chan[0] = ret;
451 /* Complete the rest of the second 4 port group matrix even if
452 * channels are unused
454 while (cnt_4ch_grp2 < 8) {
455 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt);
457 pr_err("tps23881: port matrix issue, no chan available\n");
461 if (port_cnt >= TPS23881_MAX_CHANS) {
462 pr_err("tps23881: wrong number of channels\n");
465 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp2;
466 tmp_port_matrix[port_cnt].hw_chan[0] = ret;
471 memcpy(port_matrix, tmp_port_matrix, sizeof(tmp_port_matrix));
476 /* Write port matrix to the hardware port matrix and the software port
480 tps23881_write_port_matrix(struct tps23881_priv *priv,
481 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS],
484 struct i2c_client *client = priv->client;
485 u8 pi_id, lgcl_chan, hw_chan;
489 for (i = 0; i < port_cnt; i++) {
490 pi_id = port_matrix[i].pi_id;
491 lgcl_chan = port_matrix[i].lgcl_chan[0];
492 hw_chan = port_matrix[i].hw_chan[0] % 4;
494 /* Set software port matrix for existing ports */
495 if (port_matrix[i].exist)
496 priv->port[pi_id].chan[0] = lgcl_chan;
498 /* Set hardware port matrix for all ports */
499 val |= hw_chan << (lgcl_chan * 2);
501 if (!port_matrix[i].is_4p)
504 lgcl_chan = port_matrix[i].lgcl_chan[1];
505 hw_chan = port_matrix[i].hw_chan[1] % 4;
507 /* Set software port matrix for existing ports */
508 if (port_matrix[i].exist) {
509 priv->port[pi_id].is_4p = true;
510 priv->port[pi_id].chan[1] = lgcl_chan;
513 /* Set hardware port matrix for all ports */
514 val |= hw_chan << (lgcl_chan * 2);
517 /* Write hardware ports matrix */
518 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val);
526 tps23881_set_ports_conf(struct tps23881_priv *priv,
527 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS])
529 struct i2c_client *client = priv->client;
533 /* Set operating mode */
534 ret = i2c_smbus_write_word_data(client, TPS23881_REG_OP_MODE,
535 TPS23881_OP_MODE_SEMIAUTO);
539 /* Disable DC disconnect */
540 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DIS_EN, 0x0);
544 /* Set port power allocation */
546 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
547 if (!port_matrix[i].exist)
550 if (port_matrix[i].is_4p)
551 val |= 0xf << ((port_matrix[i].lgcl_chan[0] / 2) * 4);
553 val |= 0x3 << ((port_matrix[i].lgcl_chan[0] / 2) * 4);
555 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_POWER, val);
559 /* Enable detection and classification */
561 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
562 if (!port_matrix[i].exist)
565 val |= BIT(port_matrix[i].lgcl_chan[0]) |
566 BIT(port_matrix[i].lgcl_chan[0] + 4);
567 if (port_matrix[i].is_4p)
568 val |= BIT(port_matrix[i].lgcl_chan[1]) |
569 BIT(port_matrix[i].lgcl_chan[1] + 4);
571 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val);
579 tps23881_set_ports_matrix(struct tps23881_priv *priv,
580 struct device_node *chan_node[TPS23881_MAX_CHANS])
582 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS] = {0};
585 /* Update with values for every PSE PIs */
586 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
587 ret = tps23881_match_port_matrix(&priv->pcdev.pi[i], i,
588 chan_node, port_matrix);
593 ret = tps23881_sort_port_matrix(port_matrix);
597 ret = tps23881_write_port_matrix(priv, port_matrix, ret);
601 ret = tps23881_set_ports_conf(priv, port_matrix);
608 static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev)
610 struct device_node *chan_node[TPS23881_MAX_CHANS] = {NULL};
611 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
614 ret = tps23881_get_of_channels(priv, chan_node);
616 dev_warn(&priv->client->dev,
617 "Unable to parse port-matrix, default matrix will be used\n");
621 ret = tps23881_set_ports_matrix(priv, chan_node);
623 for (i = 0; i < TPS23881_MAX_CHANS; i++)
624 of_node_put(chan_node[i]);
629 static const struct pse_controller_ops tps23881_ops = {
630 .setup_pi_matrix = tps23881_setup_pi_matrix,
631 .pi_enable = tps23881_pi_enable,
632 .pi_disable = tps23881_pi_disable,
633 .pi_is_enabled = tps23881_pi_is_enabled,
634 .ethtool_get_status = tps23881_ethtool_get_status,
637 static const char fw_parity_name[] = "ti/tps23881/tps23881-parity-14.bin";
638 static const char fw_sram_name[] = "ti/tps23881/tps23881-sram-14.bin";
640 struct tps23881_fw_conf {
645 static const struct tps23881_fw_conf tps23881_fw_parity_conf[] = {
646 {.reg = 0x60, .val = 0x01},
647 {.reg = 0x62, .val = 0x00},
648 {.reg = 0x63, .val = 0x80},
649 {.reg = 0x60, .val = 0xC4},
650 {.reg = 0x1D, .val = 0xBC},
651 {.reg = 0xD7, .val = 0x02},
652 {.reg = 0x91, .val = 0x00},
653 {.reg = 0x90, .val = 0x00},
654 {.reg = 0xD7, .val = 0x00},
655 {.reg = 0x1D, .val = 0x00},
659 static const struct tps23881_fw_conf tps23881_fw_sram_conf[] = {
660 {.reg = 0x60, .val = 0xC5},
661 {.reg = 0x62, .val = 0x00},
662 {.reg = 0x63, .val = 0x80},
663 {.reg = 0x60, .val = 0xC0},
664 {.reg = 0x1D, .val = 0xBC},
665 {.reg = 0xD7, .val = 0x02},
666 {.reg = 0x91, .val = 0x00},
667 {.reg = 0x90, .val = 0x00},
668 {.reg = 0xD7, .val = 0x00},
669 {.reg = 0x1D, .val = 0x00},
673 static int tps23881_flash_sram_fw_part(struct i2c_client *client,
675 const struct tps23881_fw_conf *fw_conf)
677 const struct firmware *fw = NULL;
680 ret = request_firmware(&fw, fw_name, &client->dev);
684 dev_dbg(&client->dev, "Flashing %s\n", fw_name);
686 /* Prepare device for RAM download */
687 while (fw_conf->reg) {
688 ret = i2c_smbus_write_byte_data(client, fw_conf->reg,
696 /* Flash the firmware file */
697 for (i = 0; i < fw->size; i++) {
698 ret = i2c_smbus_write_byte_data(client,
699 TPS23881_REG_SRAM_DATA,
706 release_firmware(fw);
710 static int tps23881_flash_sram_fw(struct i2c_client *client)
714 ret = tps23881_flash_sram_fw_part(client, fw_parity_name,
715 tps23881_fw_parity_conf);
719 ret = tps23881_flash_sram_fw_part(client, fw_sram_name,
720 tps23881_fw_sram_conf);
724 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_SRAM_CTRL, 0x18);
733 static int tps23881_i2c_probe(struct i2c_client *client)
735 struct device *dev = &client->dev;
736 struct tps23881_priv *priv;
740 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
741 dev_err(dev, "i2c check functionality failed\n");
745 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
749 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_DEVID);
754 dev_err(dev, "Wrong device ID\n");
758 ret = tps23881_flash_sram_fw(client);
762 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_FWREV);
766 dev_info(&client->dev, "Firmware revision 0x%x\n", ret);
768 /* Set configuration B, 16 bit access on a single device address */
769 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_GEN_MASK);
773 val = ret | TPS23881_REG_NBITACC;
774 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_GEN_MASK, val);
778 priv->client = client;
779 i2c_set_clientdata(client, priv);
780 priv->np = dev->of_node;
782 priv->pcdev.owner = THIS_MODULE;
783 priv->pcdev.ops = &tps23881_ops;
784 priv->pcdev.dev = dev;
785 priv->pcdev.types = ETHTOOL_PSE_C33;
786 priv->pcdev.nr_lines = TPS23881_MAX_CHANS;
787 ret = devm_pse_controller_register(dev, &priv->pcdev);
789 return dev_err_probe(dev, ret,
790 "failed to register PSE controller\n");
796 static const struct i2c_device_id tps23881_id[] = {
800 MODULE_DEVICE_TABLE(i2c, tps23881_id);
802 static const struct of_device_id tps23881_of_match[] = {
803 { .compatible = "ti,tps23881", },
806 MODULE_DEVICE_TABLE(of, tps23881_of_match);
808 static struct i2c_driver tps23881_driver = {
809 .probe = tps23881_i2c_probe,
810 .id_table = tps23881_id,
813 .of_match_table = tps23881_of_match,
816 module_i2c_driver(tps23881_driver);
819 MODULE_DESCRIPTION("TI TPS23881 PoE PSE Controller driver");
820 MODULE_LICENSE("GPL");