1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx Zynq MPSoC Firmware layer
5 * Copyright (C) 2014-2022 Xilinx, Inc.
6 * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
14 #include <linux/arm-smccc.h>
15 #include <linux/compiler.h>
16 #include <linux/device.h>
17 #include <linux/init.h>
18 #include <linux/mfd/core.h>
19 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/uaccess.h>
25 #include <linux/hashtable.h>
27 #include <linux/firmware/xlnx-zynqmp.h>
28 #include <linux/firmware/xlnx-event-manager.h>
29 #include "zynqmp-debug.h"
31 /* Max HashMap Order for PM API feature check (1<<7 = 128) */
32 #define PM_API_FEATURE_CHECK_MAX_ORDER 7
34 /* CRL registers and bitfields */
35 #define CRL_APB_BASE 0xFF5E0000U
36 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
37 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U))
38 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
39 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU
41 /* IOCTL/QUERY feature payload size */
42 #define FEATURE_PAYLOAD_SIZE 2
44 static bool feature_check_enabled;
45 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
46 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
47 static u32 query_features[FEATURE_PAYLOAD_SIZE];
49 static struct platform_device *em_dev;
52 * struct zynqmp_devinfo - Structure for Zynqmp device instance
53 * @dev: Device Pointer
54 * @feature_conf_id: Feature conf id
56 struct zynqmp_devinfo {
62 * struct pm_api_feature_data - PM API Feature data
63 * @pm_api_id: PM API Id, used as key to index into hashmap
64 * @feature_status: status of PM API feature: valid, invalid
65 * @hentry: hlist_node that hooks this entry into hashtable
67 struct pm_api_feature_data {
70 struct hlist_node hentry;
73 static const struct mfd_cell firmware_devs[] = {
75 .name = "zynqmp_power_controller",
80 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
81 * @ret_status: PMUFW return code
83 * Return: corresponding Linux error code
85 static int zynqmp_pm_ret_code(u32 ret_status)
89 case XST_PM_DOUBLE_REQ:
91 case XST_PM_NO_FEATURE:
93 case XST_PM_INVALID_VERSION:
95 case XST_PM_NO_ACCESS:
97 case XST_PM_ABORT_SUSPEND:
99 case XST_PM_MULT_USER:
101 case XST_PM_INTERNAL:
102 case XST_PM_CONFLICT:
103 case XST_PM_INVALID_NODE:
104 case XST_PM_INVALID_CRC:
110 static noinline int do_fw_call_fail(u32 *ret_payload, u32 num_args, ...)
116 * PM function call wrapper
117 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
119 static int (*do_fw_call)(u32 *ret_payload, u32, ...) = do_fw_call_fail;
122 * do_fw_call_smc() - Call system-level platform management layer (SMC)
123 * @num_args: Number of variable arguments should be <= 8
124 * @ret_payload: Returned value array
126 * Invoke platform management function via SMC call (no hypervisor present).
128 * Return: Returns status, either success or error+reason
130 static noinline int do_fw_call_smc(u32 *ret_payload, u32 num_args, ...)
132 struct arm_smccc_res res;
140 va_start(arg_list, num_args);
142 for (i = 0; i < num_args; i++)
143 args[i] = va_arg(arg_list, u64);
147 arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
150 ret_payload[0] = lower_32_bits(res.a0);
151 ret_payload[1] = upper_32_bits(res.a0);
152 ret_payload[2] = lower_32_bits(res.a1);
153 ret_payload[3] = upper_32_bits(res.a1);
156 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
160 * do_fw_call_hvc() - Call system-level platform management layer (HVC)
161 * @num_args: Number of variable arguments should be <= 8
162 * @ret_payload: Returned value array
164 * Invoke platform management function via HVC
165 * HVC-based for communication through hypervisor
166 * (no direct communication with ATF).
168 * Return: Returns status, either success or error+reason
170 static noinline int do_fw_call_hvc(u32 *ret_payload, u32 num_args, ...)
172 struct arm_smccc_res res;
180 va_start(arg_list, num_args);
182 for (i = 0; i < num_args; i++)
183 args[i] = va_arg(arg_list, u64);
187 arm_smccc_hvc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
190 ret_payload[0] = lower_32_bits(res.a0);
191 ret_payload[1] = upper_32_bits(res.a0);
192 ret_payload[2] = lower_32_bits(res.a1);
193 ret_payload[3] = upper_32_bits(res.a1);
196 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
199 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
204 u32 feature_check_api_id;
206 module_id = FIELD_GET(MODULE_ID_MASK, api_id);
209 * Feature check of APIs belonging to PM, XSEM, and TF-A are handled by calling
210 * PM_FEATURE_CHECK API. For other modules, call PM_API_FEATURES API.
212 if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID || module_id == TF_A_MODULE_ID)
213 feature_check_api_id = PM_FEATURE_CHECK;
215 feature_check_api_id = PM_API_FEATURES;
218 * Feature check of TF-A APIs is done in the TF-A layer and it expects for
219 * MODULE_ID_MASK bits of SMC's arg[0] to be the same as PM_MODULE_ID.
221 if (module_id == TF_A_MODULE_ID)
222 module_id = PM_MODULE_ID;
224 smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id;
225 smc_arg[1] = (api_id & API_ID_MASK);
227 ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]);
231 ret = ret_payload[1];
236 static int do_feature_check_call(const u32 api_id)
239 u32 ret_payload[PAYLOAD_ARG_CNT];
240 struct pm_api_feature_data *feature_data;
242 /* Check for existing entry in hash table for given api */
243 hash_for_each_possible(pm_api_features_map, feature_data, hentry,
245 if (feature_data->pm_api_id == api_id)
246 return feature_data->feature_status;
249 /* Add new entry if not present */
250 feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC);
254 feature_data->pm_api_id = api_id;
255 ret = __do_feature_check_call(api_id, ret_payload);
257 feature_data->feature_status = ret;
258 hash_add(pm_api_features_map, &feature_data->hentry, api_id);
260 if (api_id == PM_IOCTL)
261 /* Store supported IOCTL IDs mask */
262 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
263 else if (api_id == PM_QUERY_DATA)
264 /* Store supported QUERY IDs mask */
265 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
271 * zynqmp_pm_feature() - Check whether given feature is supported or not and
272 * store supported IOCTL/QUERY ID mask
273 * @api_id: API ID to check
275 * Return: Returns status, either success or error+reason
277 int zynqmp_pm_feature(const u32 api_id)
281 if (!feature_check_enabled)
284 ret = do_feature_check_call(api_id);
288 EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
291 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
292 * is supported or not
293 * @api_id: PM_IOCTL or PM_QUERY_DATA
294 * @id: IOCTL or QUERY function IDs
296 * Return: Returns status, either success or error+reason
298 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
303 /* Input arguments validation */
304 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
307 /* Check feature check API version */
308 ret = do_feature_check_call(PM_FEATURE_CHECK);
312 /* Check if feature check version 2 is supported or not */
313 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
315 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
316 * QUERY ID feature status.
318 ret = do_feature_check_call(api_id);
322 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
324 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
332 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
335 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
336 * caller function depending on the configuration
337 * @pm_api_id: Requested PM-API call
338 * @ret_payload: Returned value array
339 * @num_args: Number of arguments to requested PM-API call
341 * Invoke platform management function for SMC or HVC call, depending on
343 * Following SMC Calling Convention (SMCCC) for SMC64:
344 * Pm Function Identifier,
345 * PM_SIP_SVC + PM_API_ID =
346 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
347 * ((SMC_64) << FUNCID_CC_SHIFT)
348 * ((SIP_START) << FUNCID_OEN_SHIFT)
349 * ((PM_API_ID) & FUNCID_NUM_MASK))
351 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
352 * PM_API_ID - Platform Management API ID.
354 * Return: Returns status, either success or error+reason
356 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...)
359 * Added SIP service call Function Identifier
360 * Make sure to stay in x0 register
370 va_start(arg_list, num_args);
372 /* Check if feature is supported or not */
373 ret = zynqmp_pm_feature(pm_api_id);
377 for (i = 0; i < num_args; i++)
378 args[i] = va_arg(arg_list, u32);
382 smc_arg[0] = PM_SIP_SVC | pm_api_id;
383 for (i = 0; i < 7; i++)
384 smc_arg[i + 1] = ((u64)args[(i * 2) + 1] << 32) | args[i * 2];
386 return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3],
387 smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]);
390 static u32 pm_api_version;
391 static u32 pm_tz_version;
392 static u32 pm_family_code;
393 static u32 pm_sub_family_code;
395 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
399 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, NULL, 2, sgi_num, reset);
400 if (ret != -EOPNOTSUPP && !ret)
403 /* try old implementation as fallback strategy if above fails */
404 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, IOCTL_REGISTER_SGI, sgi_num, reset);
408 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
409 * @version: Returned version value
411 * Return: Returns status, either success or error+reason
413 int zynqmp_pm_get_api_version(u32 *version)
415 u32 ret_payload[PAYLOAD_ARG_CNT];
421 /* Check is PM API version already verified */
422 if (pm_api_version > 0) {
423 *version = pm_api_version;
426 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, ret_payload, 0);
427 *version = ret_payload[1];
431 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
434 * zynqmp_pm_get_chipid - Get silicon ID registers
435 * @idcode: IDCODE register
436 * @version: version register
438 * Return: Returns the status of the operation and the idcode and version
439 * registers in @idcode and @version.
441 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
443 u32 ret_payload[PAYLOAD_ARG_CNT];
446 if (!idcode || !version)
449 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0);
450 *idcode = ret_payload[1];
451 *version = ret_payload[2];
455 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
458 * zynqmp_pm_get_family_info() - Get family info of platform
459 * @family: Returned family code value
460 * @subfamily: Returned sub-family code value
462 * Return: Returns status, either success or error+reason
464 int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily)
466 u32 ret_payload[PAYLOAD_ARG_CNT];
470 /* Check is family or sub-family code already received */
471 if (pm_family_code && pm_sub_family_code) {
472 *family = pm_family_code;
473 *subfamily = pm_sub_family_code;
477 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0);
481 idcode = ret_payload[1];
482 pm_family_code = FIELD_GET(FAMILY_CODE_MASK, idcode);
483 pm_sub_family_code = FIELD_GET(SUB_FAMILY_CODE_MASK, idcode);
484 *family = pm_family_code;
485 *subfamily = pm_sub_family_code;
489 EXPORT_SYMBOL_GPL(zynqmp_pm_get_family_info);
492 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
493 * @version: Returned version value
495 * Return: Returns status, either success or error+reason
497 static int zynqmp_pm_get_trustzone_version(u32 *version)
499 u32 ret_payload[PAYLOAD_ARG_CNT];
505 /* Check is PM trustzone version already verified */
506 if (pm_tz_version > 0) {
507 *version = pm_tz_version;
510 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, ret_payload, 0);
511 *version = ret_payload[1];
517 * get_set_conduit_method() - Choose SMC or HVC based communication
518 * @np: Pointer to the device_node structure
520 * Use SMC or HVC-based functions to communicate with EL2/EL3.
522 * Return: Returns 0 on success or error code
524 static int get_set_conduit_method(struct device_node *np)
528 if (of_property_read_string(np, "method", &method)) {
529 pr_warn("%s missing \"method\" property\n", __func__);
533 if (!strcmp("hvc", method)) {
534 do_fw_call = do_fw_call_hvc;
535 } else if (!strcmp("smc", method)) {
536 do_fw_call = do_fw_call_smc;
538 pr_warn("%s Invalid \"method\" property: %s\n",
547 * zynqmp_pm_query_data() - Get query data from firmware
548 * @qdata: Variable to the zynqmp_pm_query_data structure
549 * @out: Returned output value
551 * Return: Returns status, either success or error+reason
553 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
557 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid, qdata.arg1, qdata.arg2,
561 * For clock name query, all bytes in SMC response are clock name
562 * characters and return code is always success. For invalid clocks,
563 * clock name bytes would be zeros.
565 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
567 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
570 * zynqmp_pm_clock_enable() - Enable the clock for given id
571 * @clock_id: ID of the clock to be enabled
573 * This function is used by master to enable the clock
574 * including peripherals and PLL clocks.
576 * Return: Returns status, either success or error+reason
578 int zynqmp_pm_clock_enable(u32 clock_id)
580 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, NULL, 1, clock_id);
582 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
585 * zynqmp_pm_clock_disable() - Disable the clock for given id
586 * @clock_id: ID of the clock to be disable
588 * This function is used by master to disable the clock
589 * including peripherals and PLL clocks.
591 * Return: Returns status, either success or error+reason
593 int zynqmp_pm_clock_disable(u32 clock_id)
595 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, NULL, 1, clock_id);
597 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
600 * zynqmp_pm_clock_getstate() - Get the clock state for given id
601 * @clock_id: ID of the clock to be queried
602 * @state: 1/0 (Enabled/Disabled)
604 * This function is used by master to get the state of clock
605 * including peripherals and PLL clocks.
607 * Return: Returns status, either success or error+reason
609 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
611 u32 ret_payload[PAYLOAD_ARG_CNT];
614 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, ret_payload, 1, clock_id);
615 *state = ret_payload[1];
619 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
622 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
623 * @clock_id: ID of the clock
624 * @divider: divider value
626 * This function is used by master to set divider for any clock
627 * to achieve desired rate.
629 * Return: Returns status, either success or error+reason
631 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
633 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, NULL, 2, clock_id, divider);
635 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
638 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
639 * @clock_id: ID of the clock
640 * @divider: divider value
642 * This function is used by master to get divider values
645 * Return: Returns status, either success or error+reason
647 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
649 u32 ret_payload[PAYLOAD_ARG_CNT];
652 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, ret_payload, 1, clock_id);
653 *divider = ret_payload[1];
657 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
660 * zynqmp_pm_clock_setparent() - Set the clock parent for given id
661 * @clock_id: ID of the clock
662 * @parent_id: parent id
664 * This function is used by master to set parent for any clock.
666 * Return: Returns status, either success or error+reason
668 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
670 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, NULL, 2, clock_id, parent_id);
672 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
675 * zynqmp_pm_clock_getparent() - Get the clock parent for given id
676 * @clock_id: ID of the clock
677 * @parent_id: parent id
679 * This function is used by master to get parent index
682 * Return: Returns status, either success or error+reason
684 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
686 u32 ret_payload[PAYLOAD_ARG_CNT];
689 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, ret_payload, 1, clock_id);
690 *parent_id = ret_payload[1];
694 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
697 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
699 * @clk_id: PLL clock ID
700 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
702 * This function sets PLL mode
704 * Return: Returns status, either success or error+reason
706 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
708 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_MODE, clk_id, mode);
710 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
713 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
715 * @clk_id: PLL clock ID
718 * This function return current PLL mode
720 * Return: Returns status, either success or error+reason
722 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
724 return zynqmp_pm_invoke_fn(PM_IOCTL, mode, 3, 0, IOCTL_GET_PLL_FRAC_MODE, clk_id);
726 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
729 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
731 * @clk_id: PLL clock ID
732 * @data: fraction data
734 * This function sets fraction data.
735 * It is valid for fraction mode only.
737 * Return: Returns status, either success or error+reason
739 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
741 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_DATA, clk_id, data);
743 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
746 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
748 * @clk_id: PLL clock ID
749 * @data: fraction data
751 * This function returns fraction data value.
753 * Return: Returns status, either success or error+reason
755 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
757 return zynqmp_pm_invoke_fn(PM_IOCTL, data, 3, 0, IOCTL_GET_PLL_FRAC_DATA, clk_id);
759 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
762 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
764 * @node_id: Node ID of the device
765 * @type: Type of tap delay to set (input/output)
766 * @value: Value to set fot the tap delay
768 * This function sets input/output tap delay for the SD device.
770 * Return: Returns status, either success or error+reason
772 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
774 u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL;
775 u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16);
778 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_SET_SD_TAPDELAY, type,
783 * Work around completely misdesigned firmware API on Xilinx ZynqMP.
784 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only
785 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA
786 * bits, but there is no matching call to clear those bits. If those
787 * bits are not cleared, SDMMC tuning may fail.
789 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to
790 * allow complete unrestricted access to all address space, including
791 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access
792 * to which was supposed to be protected by the current firmware API.
794 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter
795 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits.
797 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 2, reg, mask);
799 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
802 * zynqmp_pm_sd_dll_reset() - Reset DLL logic
804 * @node_id: Node ID of the device
807 * This function resets DLL logic for the SD device.
809 * Return: Returns status, either success or error+reason
811 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
813 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SD_DLL_RESET, type);
815 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
818 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection
820 * @dev_id: Device Id of the OSPI device.
821 * @select: OSPI Mux select value.
823 * This function select the OSPI Mux.
825 * Return: Returns status, either success or error+reason
827 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
829 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, dev_id, IOCTL_OSPI_MUX_SELECT, select);
831 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
834 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
835 * @index: GGS register index
836 * @value: Register value to be written
838 * This function writes value to GGS register.
840 * Return: Returns status, either success or error+reason
842 int zynqmp_pm_write_ggs(u32 index, u32 value)
844 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_GGS, index, value);
846 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
849 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
850 * @index: GGS register index
851 * @value: Register value to be written
853 * This function returns GGS register value.
855 * Return: Returns status, either success or error+reason
857 int zynqmp_pm_read_ggs(u32 index, u32 *value)
859 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_GGS, index);
861 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
864 * zynqmp_pm_write_pggs() - PM API for writing persistent global general
866 * @index: PGGS register index
867 * @value: Register value to be written
869 * This function writes value to PGGS register.
871 * Return: Returns status, either success or error+reason
873 int zynqmp_pm_write_pggs(u32 index, u32 value)
875 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_PGGS, index, value);
877 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
880 * zynqmp_pm_read_pggs() - PM API for reading persistent global general
882 * @index: PGGS register index
883 * @value: Register value to be written
885 * This function returns PGGS register value.
887 * Return: Returns status, either success or error+reason
889 int zynqmp_pm_read_pggs(u32 index, u32 *value)
891 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_PGGS, index);
893 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
895 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
897 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_TAPDELAY_BYPASS, index, value);
899 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
902 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
903 * @value: Status value to be written
905 * This function sets healthy bit value to indicate boot health status
908 * Return: Returns status, either success or error+reason
910 int zynqmp_pm_set_boot_health_status(u32 value)
912 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, 0, IOCTL_SET_BOOT_HEALTH_STATUS, value);
916 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
917 * @reset: Reset to be configured
918 * @assert_flag: Flag stating should reset be asserted (1) or
921 * Return: Returns status, either success or error+reason
923 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
924 const enum zynqmp_pm_reset_action assert_flag)
926 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, NULL, 2, reset, assert_flag);
928 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
931 * zynqmp_pm_reset_get_status - Get status of the reset
932 * @reset: Reset whose status should be returned
933 * @status: Returned status
935 * Return: Returns status, either success or error+reason
937 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
939 u32 ret_payload[PAYLOAD_ARG_CNT];
945 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, ret_payload, 1, reset);
946 *status = ret_payload[1];
950 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
953 * zynqmp_pm_fpga_load - Perform the fpga load
954 * @address: Address to write to
955 * @size: pl bitstream size
956 * @flags: Bitstream type
957 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
958 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
960 * This function provides access to pmufw. To transfer
961 * the required bitstream into PL.
963 * Return: Returns status, either success or error+reason
965 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
967 u32 ret_payload[PAYLOAD_ARG_CNT];
970 ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, ret_payload, 4, lower_32_bits(address),
971 upper_32_bits(address), size, flags);
973 return -ret_payload[0];
977 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
980 * zynqmp_pm_fpga_get_status - Read value from PCAP status register
981 * @value: Value to read
983 * This function provides access to the pmufw to get the PCAP
986 * Return: Returns status, either success or error+reason
988 int zynqmp_pm_fpga_get_status(u32 *value)
990 u32 ret_payload[PAYLOAD_ARG_CNT];
996 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, ret_payload, 0);
997 *value = ret_payload[1];
1001 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
1004 * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status.
1005 * @value: Buffer to store FPGA configuration status.
1007 * This function provides access to the pmufw to get the FPGA configuration
1010 * Return: 0 on success, a negative value on error
1012 int zynqmp_pm_fpga_get_config_status(u32 *value)
1014 u32 ret_payload[PAYLOAD_ARG_CNT];
1015 u32 buf, lower_addr, upper_addr;
1021 lower_addr = lower_32_bits((u64)&buf);
1022 upper_addr = upper_32_bits((u64)&buf);
1024 ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4,
1025 XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, lower_addr, upper_addr,
1026 XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG);
1028 *value = ret_payload[1];
1032 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
1035 * zynqmp_pm_pinctrl_request - Request Pin from firmware
1036 * @pin: Pin number to request
1038 * This function requests pin from firmware.
1040 * Return: Returns status, either success or error+reason.
1042 int zynqmp_pm_pinctrl_request(const u32 pin)
1044 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, NULL, 1, pin);
1046 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
1049 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
1050 * @pin: Pin number to release
1052 * This function release pin from firmware.
1054 * Return: Returns status, either success or error+reason.
1056 int zynqmp_pm_pinctrl_release(const u32 pin)
1058 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, NULL, 1, pin);
1060 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
1063 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1065 * @id: Function ID to set
1067 * This function sets requested function for the given pin.
1069 * Return: Returns status, either success or error+reason.
1071 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1073 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, NULL, 2, pin, id);
1075 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1078 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1080 * @param: Parameter to get
1081 * @value: Buffer to store parameter value
1083 * This function gets requested configuration parameter for the given pin.
1085 * Return: Returns status, either success or error+reason.
1087 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1090 u32 ret_payload[PAYLOAD_ARG_CNT];
1096 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, ret_payload, 2, pin, param);
1097 *value = ret_payload[1];
1101 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1104 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1106 * @param: Parameter to set
1107 * @value: Parameter value to set
1109 * This function sets requested configuration parameter for the given pin.
1111 * Return: Returns status, either success or error+reason.
1113 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1118 if (pm_family_code == ZYNQMP_FAMILY_CODE &&
1119 param == PM_PINCTRL_CONFIG_TRI_STATE) {
1120 ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET);
1121 if (ret < PM_PINCTRL_PARAM_SET_VERSION)
1125 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, NULL, 3, pin, param, value);
1127 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1130 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1131 * @ps_mode: Returned output value of ps_mode
1133 * This API function is to be used for notify the power management controller
1134 * to read bootpin status.
1136 * Return: status, either success or error+reason
1138 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1141 u32 ret_payload[PAYLOAD_ARG_CNT];
1143 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, ret_payload, 1, CRL_APB_BOOT_PIN_CTRL);
1145 *ps_mode = ret_payload[1];
1149 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1152 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1153 * @ps_mode: Value to be written to the bootpin ctrl register
1155 * This API function is to be used for notify the power management controller
1156 * to configure bootpin.
1158 * Return: Returns status, either success or error+reason
1160 int zynqmp_pm_bootmode_write(u32 ps_mode)
1162 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 3, CRL_APB_BOOT_PIN_CTRL,
1163 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode);
1165 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1168 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1169 * master has initialized its own power management
1171 * Return: Returns status, either success or error+reason
1173 * This API function is to be used for notify the power management controller
1174 * about the completed power management initialization.
1176 int zynqmp_pm_init_finalize(void)
1178 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, NULL, 0);
1180 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
1183 * zynqmp_pm_set_suspend_mode() - Set system suspend mode
1184 * @mode: Mode to set for system suspend
1186 * This API function is used to set mode of system suspend.
1188 * Return: Returns status, either success or error+reason
1190 int zynqmp_pm_set_suspend_mode(u32 mode)
1192 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, NULL, 1, mode);
1194 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1197 * zynqmp_pm_request_node() - Request a node with specific capabilities
1198 * @node: Node ID of the slave
1199 * @capabilities: Requested capabilities of the slave
1200 * @qos: Quality of service (not supported)
1201 * @ack: Flag to specify whether acknowledge is requested
1203 * This function is used by master to request particular node from firmware.
1204 * Every master must request node before using it.
1206 * Return: Returns status, either success or error+reason
1208 int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1209 const u32 qos, const enum zynqmp_pm_request_ack ack)
1211 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, NULL, 4, node, capabilities, qos, ack);
1213 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1216 * zynqmp_pm_release_node() - Release a node
1217 * @node: Node ID of the slave
1219 * This function is used by master to inform firmware that master
1220 * has released node. Once released, master must not use that node
1221 * without re-request.
1223 * Return: Returns status, either success or error+reason
1225 int zynqmp_pm_release_node(const u32 node)
1227 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, NULL, 1, node);
1229 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1232 * zynqmp_pm_get_rpu_mode() - Get RPU mode
1233 * @node_id: Node ID of the device
1234 * @rpu_mode: return by reference value
1235 * either split or lockstep
1237 * Return: return 0 on success or error+reason.
1238 * if success, then rpu_mode will be set
1239 * to current rpu mode.
1241 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
1243 u32 ret_payload[PAYLOAD_ARG_CNT];
1246 ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_GET_RPU_OPER_MODE);
1248 /* only set rpu_mode if no error */
1249 if (ret == XST_PM_SUCCESS)
1250 *rpu_mode = ret_payload[0];
1254 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode);
1257 * zynqmp_pm_set_rpu_mode() - Set RPU mode
1258 * @node_id: Node ID of the device
1259 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep
1261 * This function is used to set RPU mode to split or
1264 * Return: Returns status, either success or error+reason
1266 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
1268 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SET_RPU_OPER_MODE,
1271 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
1274 * zynqmp_pm_set_tcm_config - configure TCM
1275 * @node_id: Firmware specific TCM subsystem ID
1276 * @tcm_mode: Argument 1 to requested IOCTL call
1277 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT
1279 * This function is used to set RPU mode to split or combined
1281 * Return: status: 0 for success, else failure
1283 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
1285 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_TCM_COMB_CONFIG,
1288 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
1291 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to
1292 * be powered down forcefully
1293 * @node: Node ID of the targeted PU or subsystem
1294 * @ack: Flag to specify whether acknowledge is requested
1296 * Return: status, either success or error+reason
1298 int zynqmp_pm_force_pwrdwn(const u32 node,
1299 const enum zynqmp_pm_request_ack ack)
1301 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, NULL, 2, node, ack);
1303 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
1306 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem
1307 * @node: Node ID of the master or subsystem
1308 * @set_addr: Specifies whether the address argument is relevant
1309 * @address: Address from which to resume when woken up
1310 * @ack: Flag to specify whether acknowledge requested
1312 * Return: status, either success or error+reason
1314 int zynqmp_pm_request_wake(const u32 node,
1315 const bool set_addr,
1317 const enum zynqmp_pm_request_ack ack)
1319 /* set_addr flag is encoded into 1st bit of address */
1320 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, NULL, 4, node, address | set_addr,
1321 address >> 32, ack);
1323 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
1326 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1327 * @node: Node ID of the slave
1328 * @capabilities: Requested capabilities of the slave
1329 * @qos: Quality of service (not supported)
1330 * @ack: Flag to specify whether acknowledge is requested
1332 * This API function is to be used for slaves a PU already has requested
1333 * to change its capabilities.
1335 * Return: Returns status, either success or error+reason
1337 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1339 const enum zynqmp_pm_request_ack ack)
1341 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, NULL, 4, node, capabilities, qos, ack);
1343 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1346 * zynqmp_pm_load_pdi - Load and process PDI
1347 * @src: Source device where PDI is located
1348 * @address: PDI src address
1350 * This function provides support to load PDI from linux
1352 * Return: Returns status, either success or error+reason
1354 int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1356 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, NULL, 3, src, lower_32_bits(address),
1357 upper_32_bits(address));
1359 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1362 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1364 * @address: Address of the AesParams structure.
1365 * @out: Returned output value
1367 * Return: Returns status, either success or error code.
1369 int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1371 u32 ret_payload[PAYLOAD_ARG_CNT];
1377 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, ret_payload, 2, upper_32_bits(address),
1378 lower_32_bits(address));
1379 *out = ret_payload[1];
1383 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1386 * zynqmp_pm_efuse_access - Provides access to efuse memory.
1387 * @address: Address of the efuse params structure
1388 * @out: Returned output value
1390 * Return: Returns status, either success or error code.
1392 int zynqmp_pm_efuse_access(const u64 address, u32 *out)
1394 u32 ret_payload[PAYLOAD_ARG_CNT];
1400 ret = zynqmp_pm_invoke_fn(PM_EFUSE_ACCESS, ret_payload, 2,
1401 upper_32_bits(address),
1402 lower_32_bits(address));
1403 *out = ret_payload[1];
1407 EXPORT_SYMBOL_GPL(zynqmp_pm_efuse_access);
1410 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
1411 * @address: Address of the data/ Address of output buffer where
1412 * hash should be stored.
1413 * @size: Size of the data.
1415 * BIT(0) - for initializing csudma driver and SHA3(Here address
1416 * and size inputs can be NULL).
1417 * BIT(1) - to call Sha3_Update API which can be called multiple
1418 * times when data is not contiguous.
1419 * BIT(2) - to get final hash of the whole updated data.
1420 * Hash will be overwritten at provided address with
1423 * Return: Returns status, either success or error code.
1425 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
1427 u32 lower_addr = lower_32_bits(address);
1428 u32 upper_addr = upper_32_bits(address);
1430 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, NULL, 4, upper_addr, lower_addr, size, flags);
1432 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
1435 * zynqmp_pm_register_notifier() - PM API for register a subsystem
1436 * to be notified about specific
1438 * @node: Node ID to which the event is related.
1439 * @event: Event Mask of Error events for which wants to get notified.
1440 * @wake: Wake subsystem upon capturing the event if value 1
1441 * @enable: Enable the registration for value 1, disable for value 0
1443 * This function is used to register/un-register for particular node-event
1444 * combination in firmware.
1446 * Return: Returns status, either success or error+reason
1449 int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1450 const u32 wake, const u32 enable)
1452 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, NULL, 4, node, event, wake, enable);
1454 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1457 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1458 * @type: Shutdown or restart? 0 for shutdown, 1 for restart
1459 * @subtype: Specifies which system should be restarted or shut down
1461 * Return: Returns status, either success or error+reason
1463 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1465 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, NULL, 2, type, subtype);
1469 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1470 * @id: The config ID of the feature to be configured
1471 * @value: The config value of the feature to be configured
1473 * Return: Returns 0 on success or error value on failure.
1475 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1477 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_FEATURE_CONFIG, id, value);
1481 * zynqmp_pm_get_feature_config - PM call to get value of configured feature
1482 * @id: The config id of the feature to be queried
1483 * @payload: Returned value array
1485 * Return: Returns 0 on success or error value on failure.
1487 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1490 return zynqmp_pm_invoke_fn(PM_IOCTL, payload, 3, 0, IOCTL_GET_FEATURE_CONFIG, id);
1494 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1496 * @config: The config type of SD registers
1497 * @value: Value to be set
1499 * Return: Returns 0 on success or error value on failure.
1501 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1503 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_SD_CONFIG, config, value);
1505 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1508 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1509 * @node: GEM node ID
1510 * @config: The config type of GEM registers
1511 * @value: Value to be set
1513 * Return: Returns 0 on success or error value on failure.
1515 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1518 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_GEM_CONFIG, config, value);
1520 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1523 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1524 * @subtype: Shutdown subtype
1525 * @name: Matching string for scope argument
1527 * This struct encapsulates mapping between shutdown scope ID and string.
1529 struct zynqmp_pm_shutdown_scope {
1530 const enum zynqmp_pm_shutdown_subtype subtype;
1534 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1535 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1536 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1537 .name = "subsystem",
1539 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1540 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1543 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1544 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1549 static struct zynqmp_pm_shutdown_scope *selected_scope =
1550 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1553 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1554 * @scope_string: Shutdown scope string
1556 * Return: Return pointer to matching shutdown scope struct from
1557 * array of available options in system if string is valid,
1558 * otherwise returns NULL.
1560 static struct zynqmp_pm_shutdown_scope*
1561 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1565 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1566 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1567 return &shutdown_scopes[count];
1572 static ssize_t shutdown_scope_show(struct device *device,
1573 struct device_attribute *attr,
1578 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1579 if (&shutdown_scopes[i] == selected_scope) {
1581 strcat(buf, shutdown_scopes[i].name);
1584 strcat(buf, shutdown_scopes[i].name);
1593 static ssize_t shutdown_scope_store(struct device *device,
1594 struct device_attribute *attr,
1595 const char *buf, size_t count)
1598 struct zynqmp_pm_shutdown_scope *scope;
1600 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1604 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1607 pr_err("unable to set shutdown scope %s\n", buf);
1611 selected_scope = scope;
1616 static DEVICE_ATTR_RW(shutdown_scope);
1618 static ssize_t health_status_store(struct device *device,
1619 struct device_attribute *attr,
1620 const char *buf, size_t count)
1625 ret = kstrtouint(buf, 10, &value);
1629 ret = zynqmp_pm_set_boot_health_status(value);
1631 dev_err(device, "unable to set healthy bit value to %u\n",
1639 static DEVICE_ATTR_WO(health_status);
1641 static ssize_t ggs_show(struct device *device,
1642 struct device_attribute *attr,
1647 u32 ret_payload[PAYLOAD_ARG_CNT];
1649 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1653 return sprintf(buf, "0x%x\n", ret_payload[1]);
1656 static ssize_t ggs_store(struct device *device,
1657 struct device_attribute *attr,
1658 const char *buf, size_t count,
1664 if (reg >= GSS_NUM_REGS)
1667 ret = kstrtol(buf, 16, &value);
1673 ret = zynqmp_pm_write_ggs(reg, value);
1680 /* GGS register show functions */
1681 #define GGS0_SHOW(N) \
1682 ssize_t ggs##N##_show(struct device *device, \
1683 struct device_attribute *attr, \
1686 return ggs_show(device, attr, buf, N); \
1689 static GGS0_SHOW(0);
1690 static GGS0_SHOW(1);
1691 static GGS0_SHOW(2);
1692 static GGS0_SHOW(3);
1694 /* GGS register store function */
1695 #define GGS0_STORE(N) \
1696 ssize_t ggs##N##_store(struct device *device, \
1697 struct device_attribute *attr, \
1701 return ggs_store(device, attr, buf, count, N); \
1704 static GGS0_STORE(0);
1705 static GGS0_STORE(1);
1706 static GGS0_STORE(2);
1707 static GGS0_STORE(3);
1709 static ssize_t pggs_show(struct device *device,
1710 struct device_attribute *attr,
1715 u32 ret_payload[PAYLOAD_ARG_CNT];
1717 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1721 return sprintf(buf, "0x%x\n", ret_payload[1]);
1724 static ssize_t pggs_store(struct device *device,
1725 struct device_attribute *attr,
1726 const char *buf, size_t count,
1732 if (reg >= GSS_NUM_REGS)
1735 ret = kstrtol(buf, 16, &value);
1741 ret = zynqmp_pm_write_pggs(reg, value);
1749 #define PGGS0_SHOW(N) \
1750 ssize_t pggs##N##_show(struct device *device, \
1751 struct device_attribute *attr, \
1754 return pggs_show(device, attr, buf, N); \
1757 #define PGGS0_STORE(N) \
1758 ssize_t pggs##N##_store(struct device *device, \
1759 struct device_attribute *attr, \
1763 return pggs_store(device, attr, buf, count, N); \
1766 /* PGGS register show functions */
1767 static PGGS0_SHOW(0);
1768 static PGGS0_SHOW(1);
1769 static PGGS0_SHOW(2);
1770 static PGGS0_SHOW(3);
1772 /* PGGS register store functions */
1773 static PGGS0_STORE(0);
1774 static PGGS0_STORE(1);
1775 static PGGS0_STORE(2);
1776 static PGGS0_STORE(3);
1778 /* GGS register attributes */
1779 static DEVICE_ATTR_RW(ggs0);
1780 static DEVICE_ATTR_RW(ggs1);
1781 static DEVICE_ATTR_RW(ggs2);
1782 static DEVICE_ATTR_RW(ggs3);
1784 /* PGGS register attributes */
1785 static DEVICE_ATTR_RW(pggs0);
1786 static DEVICE_ATTR_RW(pggs1);
1787 static DEVICE_ATTR_RW(pggs2);
1788 static DEVICE_ATTR_RW(pggs3);
1790 static ssize_t feature_config_id_show(struct device *device,
1791 struct device_attribute *attr,
1794 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1796 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1799 static ssize_t feature_config_id_store(struct device *device,
1800 struct device_attribute *attr,
1801 const char *buf, size_t count)
1805 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1810 ret = kstrtou32(buf, 10, &config_id);
1814 devinfo->feature_conf_id = config_id;
1819 static DEVICE_ATTR_RW(feature_config_id);
1821 static ssize_t feature_config_value_show(struct device *device,
1822 struct device_attribute *attr,
1826 u32 ret_payload[PAYLOAD_ARG_CNT];
1827 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1829 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1834 return sysfs_emit(buf, "%d\n", ret_payload[1]);
1837 static ssize_t feature_config_value_store(struct device *device,
1838 struct device_attribute *attr,
1839 const char *buf, size_t count)
1843 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1848 ret = kstrtou32(buf, 10, &value);
1852 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
1860 static DEVICE_ATTR_RW(feature_config_value);
1862 static struct attribute *zynqmp_firmware_attrs[] = {
1863 &dev_attr_ggs0.attr,
1864 &dev_attr_ggs1.attr,
1865 &dev_attr_ggs2.attr,
1866 &dev_attr_ggs3.attr,
1867 &dev_attr_pggs0.attr,
1868 &dev_attr_pggs1.attr,
1869 &dev_attr_pggs2.attr,
1870 &dev_attr_pggs3.attr,
1871 &dev_attr_shutdown_scope.attr,
1872 &dev_attr_health_status.attr,
1873 &dev_attr_feature_config_id.attr,
1874 &dev_attr_feature_config_value.attr,
1878 ATTRIBUTE_GROUPS(zynqmp_firmware);
1880 static int zynqmp_firmware_probe(struct platform_device *pdev)
1882 struct device *dev = &pdev->dev;
1883 struct zynqmp_devinfo *devinfo;
1886 ret = get_set_conduit_method(dev->of_node);
1890 ret = do_feature_check_call(PM_FEATURE_CHECK);
1891 if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1))
1892 feature_check_enabled = true;
1894 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
1900 platform_set_drvdata(pdev, devinfo);
1902 /* Check PM API version number */
1903 ret = zynqmp_pm_get_api_version(&pm_api_version);
1907 if (pm_api_version < ZYNQMP_PM_VERSION) {
1908 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1910 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1911 pm_api_version >> 16, pm_api_version & 0xFFFF);
1914 pr_info("%s Platform Management API v%d.%d\n", __func__,
1915 pm_api_version >> 16, pm_api_version & 0xFFFF);
1917 /* Get the Family code and sub family code of platform */
1918 ret = zynqmp_pm_get_family_info(&pm_family_code, &pm_sub_family_code);
1922 /* Check trustzone version number */
1923 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1925 panic("Legacy trustzone found without version support\n");
1927 if (pm_tz_version < ZYNQMP_TZ_VERSION)
1928 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1930 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1931 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1933 pr_info("%s Trustzone version v%d.%d\n", __func__,
1934 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1936 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1937 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1939 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1943 zynqmp_pm_api_debugfs_init();
1945 if (pm_family_code == VERSAL_FAMILY_CODE) {
1946 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
1949 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
1952 return of_platform_populate(dev->of_node, NULL, NULL, dev);
1955 static void zynqmp_firmware_remove(struct platform_device *pdev)
1957 struct pm_api_feature_data *feature_data;
1958 struct hlist_node *tmp;
1961 mfd_remove_devices(&pdev->dev);
1962 zynqmp_pm_api_debugfs_exit();
1964 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
1965 hash_del(&feature_data->hentry);
1966 kfree(feature_data);
1969 platform_device_unregister(em_dev);
1972 static const struct of_device_id zynqmp_firmware_of_match[] = {
1973 {.compatible = "xlnx,zynqmp-firmware"},
1974 {.compatible = "xlnx,versal-firmware"},
1977 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
1979 static struct platform_driver zynqmp_firmware_driver = {
1981 .name = "zynqmp_firmware",
1982 .of_match_table = zynqmp_firmware_of_match,
1983 .dev_groups = zynqmp_firmware_groups,
1985 .probe = zynqmp_firmware_probe,
1986 .remove_new = zynqmp_firmware_remove,
1988 module_platform_driver(zynqmp_firmware_driver);