arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <[email protected]>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/user.h>
  20
  21 #ifdef CONFIG_X86_64
  22 # include <asm/sigcontext32.h>
  23 # include <asm/user32.h>
  24 #else
  25 # define save_i387_xstate_ia32          save_i387_xstate
  26 # define restore_i387_xstate_ia32       restore_i387_xstate
  27 # define _fpstate_ia32          _fpstate
  28 # define _xstate_ia32           _xstate
  29 # define sig_xstate_ia32_size   sig_xstate_size
  30 # define fx_sw_reserved_ia32    fx_sw_reserved
  31 # define user_i387_ia32_struct  user_i387_struct
  32 # define user32_fxsr_struct     user_fxsr_struct
  33 #endif
  34
  35 #ifdef CONFIG_MATH_EMULATION
  36 # define HAVE_HWFP              (boot_cpu_data.hard_math)
  37 #else
  38 # define HAVE_HWFP              1
  39 #endif
  40
  41 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
  42 unsigned int xstate_size;
  43 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
  44 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  45
  46 void __cpuinit mxcsr_feature_mask_init(void)
  47 {
  48         unsigned long mask = 0;
  49
  50         clts();
  51         if (cpu_has_fxsr) {
  52                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  53                 asm volatile("fxsave %0" : : "m" (fx_scratch));
  54                 mask = fx_scratch.mxcsr_mask;
  55                 if (mask == 0)
  56                         mask = 0x0000ffbf;
  57         }
  58         mxcsr_feature_mask &= mask;
  59         stts();
  60 }
  61
  62 static void __cpuinit init_thread_xstate(void)
  63 {
  64         /*
  65          * Note that xstate_size might be overwriten later during
  66          * xsave_init().
  67          */
  68
  69         if (!HAVE_HWFP) {
  70                 /*
  71                  * Disable xsave as we do not support it if i387
  72                  * emulation is enabled.
  73                  */
  74                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
  75                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
  76                 xstate_size = sizeof(struct i387_soft_struct);
  77                 return;
  78         }
  79
  80         if (cpu_has_fxsr)
  81                 xstate_size = sizeof(struct i387_fxsave_struct);
  82 #ifdef CONFIG_X86_32
  83         else
  84                 xstate_size = sizeof(struct i387_fsave_struct);
  85 #endif
  86 }
  87
  88 #ifdef CONFIG_X86_64
  89 /*
  90  * Called at bootup to set up the initial FPU state that is later cloned
  91  * into all processes.
  92  */
  93
  94 void __cpuinit fpu_init(void)
  95 {
  96         unsigned long oldcr0 = read_cr0();
  97
  98         set_in_cr4(X86_CR4_OSFXSR);
  99         set_in_cr4(X86_CR4_OSXMMEXCPT);
 100
 101         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
 102
 103         if (!smp_processor_id())
 104                 init_thread_xstate();
 105
 106         mxcsr_feature_mask_init();
 107         /* clean state in init */
 108         current_thread_info()->status = 0;
 109         clear_used_math();
 110 }
 111
 112 #else   /* CONFIG_X86_64 */
 113
 114 void __cpuinit fpu_init(void)
 115 {
 116         if (!smp_processor_id())
 117                 init_thread_xstate();
 118 }
 119
 120 #endif  /* CONFIG_X86_32 */
 121
 122 void fpu_finit(struct fpu *fpu)
 123 {
 124 #ifdef CONFIG_X86_32
 125         if (!HAVE_HWFP) {
 126                 finit_soft_fpu(&fpu->state->soft);
 127                 return;
 128         }
 129 #endif
 130
 131         if (cpu_has_fxsr) {
 132                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
 133
 134                 memset(fx, 0, xstate_size);
 135                 fx->cwd = 0x37f;
 136                 if (cpu_has_xmm)
 137                         fx->mxcsr = MXCSR_DEFAULT;
 138         } else {
 139                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 140                 memset(fp, 0, xstate_size);
 141                 fp->cwd = 0xffff037fu;
 142                 fp->swd = 0xffff0000u;
 143                 fp->twd = 0xffffffffu;
 144                 fp->fos = 0xffff0000u;
 145         }
 146 }
 147 EXPORT_SYMBOL_GPL(fpu_finit);
 148
 149 /*
 150  * The _current_ task is using the FPU for the first time
 151  * so initialize it and set the mxcsr to its default
 152  * value at reset if we support XMM instructions and then
 153  * remeber the current task has used the FPU.
 154  */
 155 int init_fpu(struct task_struct *tsk)
 156 {
 157         int ret;
 158
 159         if (tsk_used_math(tsk)) {
 160                 if (HAVE_HWFP && tsk == current)
 161                         unlazy_fpu(tsk);
 162                 return 0;
 163         }
 164
 165         /*
 166          * Memory allocation at the first usage of the FPU and other state.
 167          */
 168         ret = fpu_alloc(&tsk->thread.fpu);
 169         if (ret)
 170                 return ret;
 171
 172         fpu_finit(&tsk->thread.fpu);
 173
 174         set_stopped_child_used_math(tsk);
 175         return 0;
 176 }
 177
 178 /*
 179  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 180  * as the "regset->n" for the xstate regset will be updated based on the feature
 181  * capabilites supported by the xsave.
 182  */
 183 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 184 {
 185         return tsk_used_math(target) ? regset->n : 0;
 186 }
 187
 188 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 189 {
 190         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 191 }
 192
 193 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 194                 unsigned int pos, unsigned int count,
 195                 void *kbuf, void __user *ubuf)
 196 {
 197         int ret;
 198
 199         if (!cpu_has_fxsr)
 200                 return -ENODEV;
 201
 202         ret = init_fpu(target);
 203         if (ret)
 204                 return ret;
 205
 206         sanitize_i387_state(target);
 207
 208         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 209                                    &target->thread.fpu.state->fxsave, 0, -1);
 210 }
 211
 212 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 213                 unsigned int pos, unsigned int count,
 214                 const void *kbuf, const void __user *ubuf)
 215 {
 216         int ret;
 217
 218         if (!cpu_has_fxsr)
 219                 return -ENODEV;
 220
 221         ret = init_fpu(target);
 222         if (ret)
 223                 return ret;
 224
 225         sanitize_i387_state(target);
 226
 227         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 228                                  &target->thread.fpu.state->fxsave, 0, -1);
 229
 230         /*
 231          * mxcsr reserved bits must be masked to zero for security reasons.
 232          */
 233         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 234
 235         /*
 236          * update the header bits in the xsave header, indicating the
 237          * presence of FP and SSE state.
 238          */
 239         if (cpu_has_xsave)
 240                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 241
 242         return ret;
 243 }
 244
 245 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 246                 unsigned int pos, unsigned int count,
 247                 void *kbuf, void __user *ubuf)
 248 {
 249         int ret;
 250
 251         if (!cpu_has_xsave)
 252                 return -ENODEV;
 253
 254         ret = init_fpu(target);
 255         if (ret)
 256                 return ret;
 257
 258         /*
 259          * Copy the 48bytes defined by the software first into the xstate
 260          * memory layout in the thread struct, so that we can copy the entire
 261          * xstateregs to the user using one user_regset_copyout().
 262          */
 263         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 264                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 265
 266         /*
 267          * Copy the xstate memory layout.
 268          */
 269         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 270                                   &target->thread.fpu.state->xsave, 0, -1);
 271         return ret;
 272 }
 273
 274 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 275                   unsigned int pos, unsigned int count,
 276                   const void *kbuf, const void __user *ubuf)
 277 {
 278         int ret;
 279         struct xsave_hdr_struct *xsave_hdr;
 280
 281         if (!cpu_has_xsave)
 282                 return -ENODEV;
 283
 284         ret = init_fpu(target);
 285         if (ret)
 286                 return ret;
 287
 288         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 289                                  &target->thread.fpu.state->xsave, 0, -1);
 290
 291         /*
 292          * mxcsr reserved bits must be masked to zero for security reasons.
 293          */
 294         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 295
 296         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 297
 298         xsave_hdr->xstate_bv &= pcntxt_mask;
 299         /*
 300          * These bits must be zero.
 301          */
 302         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 303
 304         return ret;
 305 }
 306
 307 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 308
 309 /*
 310  * FPU tag word conversions.
 311  */
 312
 313 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 314 {
 315         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 316
 317         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 318         tmp = ~twd;
 319         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 320         /* and move the valid bits to the lower byte. */
 321         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 322         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 323         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 324
 325         return tmp;
 326 }
 327
 328 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
 329 #define FP_EXP_TAG_VALID        0
 330 #define FP_EXP_TAG_ZERO         1
 331 #define FP_EXP_TAG_SPECIAL      2
 332 #define FP_EXP_TAG_EMPTY        3
 333
 334 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 335 {
 336         struct _fpxreg *st;
 337         u32 tos = (fxsave->swd >> 11) & 7;
 338         u32 twd = (unsigned long) fxsave->twd;
 339         u32 tag;
 340         u32 ret = 0xffff0000u;
 341         int i;
 342
 343         for (i = 0; i < 8; i++, twd >>= 1) {
 344                 if (twd & 0x1) {
 345                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 346
 347                         switch (st->exponent & 0x7fff) {
 348                         case 0x7fff:
 349                                 tag = FP_EXP_TAG_SPECIAL;
 350                                 break;
 351                         case 0x0000:
 352                                 if (!st->significand[0] &&
 353                                     !st->significand[1] &&
 354                                     !st->significand[2] &&
 355                                     !st->significand[3])
 356                                         tag = FP_EXP_TAG_ZERO;
 357                                 else
 358                                         tag = FP_EXP_TAG_SPECIAL;
 359                                 break;
 360                         default:
 361                                 if (st->significand[3] & 0x8000)
 362                                         tag = FP_EXP_TAG_VALID;
 363                                 else
 364                                         tag = FP_EXP_TAG_SPECIAL;
 365                                 break;
 366                         }
 367                 } else {
 368                         tag = FP_EXP_TAG_EMPTY;
 369                 }
 370                 ret |= tag << (2 * i);
 371         }
 372         return ret;
 373 }
 374
 375 /*
 376  * FXSR floating point environment conversions.
 377  */
 378
 379 static void
 380 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 381 {
 382         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 383         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 384         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 385         int i;
 386
 387         env->cwd = fxsave->cwd | 0xffff0000u;
 388         env->swd = fxsave->swd | 0xffff0000u;
 389         env->twd = twd_fxsr_to_i387(fxsave);
 390
 391 #ifdef CONFIG_X86_64
 392         env->fip = fxsave->rip;
 393         env->foo = fxsave->rdp;
 394         if (tsk == current) {
 395                 /*
 396                  * should be actually ds/cs at fpu exception time, but
 397                  * that information is not available in 64bit mode.
 398                  */
 399                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
 400                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
 401         } else {
 402                 struct pt_regs *regs = task_pt_regs(tsk);
 403
 404                 env->fos = 0xffff0000 | tsk->thread.ds;
 405                 env->fcs = regs->cs;
 406         }
 407 #else
 408         env->fip = fxsave->fip;
 409         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 410         env->foo = fxsave->foo;
 411         env->fos = fxsave->fos;
 412 #endif
 413
 414         for (i = 0; i < 8; ++i)
 415                 memcpy(&to[i], &from[i], sizeof(to[0]));
 416 }
 417
 418 static void convert_to_fxsr(struct task_struct *tsk,
 419                             const struct user_i387_ia32_struct *env)
 420
 421 {
 422         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 423         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 424         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 425         int i;
 426
 427         fxsave->cwd = env->cwd;
 428         fxsave->swd = env->swd;
 429         fxsave->twd = twd_i387_to_fxsr(env->twd);
 430         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 431 #ifdef CONFIG_X86_64
 432         fxsave->rip = env->fip;
 433         fxsave->rdp = env->foo;
 434         /* cs and ds ignored */
 435 #else
 436         fxsave->fip = env->fip;
 437         fxsave->fcs = (env->fcs & 0xffff);
 438         fxsave->foo = env->foo;
 439         fxsave->fos = env->fos;
 440 #endif
 441
 442         for (i = 0; i < 8; ++i)
 443                 memcpy(&to[i], &from[i], sizeof(from[0]));
 444 }
 445
 446 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 447                unsigned int pos, unsigned int count,
 448                void *kbuf, void __user *ubuf)
 449 {
 450         struct user_i387_ia32_struct env;
 451         int ret;
 452
 453         ret = init_fpu(target);
 454         if (ret)
 455                 return ret;
 456
 457         if (!HAVE_HWFP)
 458                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 459
 460         if (!cpu_has_fxsr) {
 461                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 462                                            &target->thread.fpu.state->fsave, 0,
 463                                            -1);
 464         }
 465
 466         sanitize_i387_state(target);
 467
 468         if (kbuf && pos == 0 && count == sizeof(env)) {
 469                 convert_from_fxsr(kbuf, target);
 470                 return 0;
 471         }
 472
 473         convert_from_fxsr(&env, target);
 474
 475         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 476 }
 477
 478 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 479                unsigned int pos, unsigned int count,
 480                const void *kbuf, const void __user *ubuf)
 481 {
 482         struct user_i387_ia32_struct env;
 483         int ret;
 484
 485         ret = init_fpu(target);
 486         if (ret)
 487                 return ret;
 488
 489         sanitize_i387_state(target);
 490
 491         if (!HAVE_HWFP)
 492                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 493
 494         if (!cpu_has_fxsr) {
 495                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 496                                           &target->thread.fpu.state->fsave, 0, -1);
 497         }
 498
 499         if (pos > 0 || count < sizeof(env))
 500                 convert_from_fxsr(&env, target);
 501
 502         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 503         if (!ret)
 504                 convert_to_fxsr(target, &env);
 505
 506         /*
 507          * update the header bit in the xsave header, indicating the
 508          * presence of FP.
 509          */
 510         if (cpu_has_xsave)
 511                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 512         return ret;
 513 }
 514
 515 /*
 516  * Signal frame handlers.
 517  */
 518
 519 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
 520 {
 521         struct task_struct *tsk = current;
 522         struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
 523
 524         fp->status = fp->swd;
 525         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
 526                 return -1;
 527         return 1;
 528 }
 529
 530 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
 531 {
 532         struct task_struct *tsk = current;
 533         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
 534         struct user_i387_ia32_struct env;
 535         int err = 0;
 536
 537         convert_from_fxsr(&env, tsk);
 538         if (__copy_to_user(buf, &env, sizeof(env)))
 539                 return -1;
 540
 541         err |= __put_user(fx->swd, &buf->status);
 542         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
 543         if (err)
 544                 return -1;
 545
 546         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
 547                 return -1;
 548         return 1;
 549 }
 550
 551 static int save_i387_xsave(void __user *buf)
 552 {
 553         struct task_struct *tsk = current;
 554         struct _fpstate_ia32 __user *fx = buf;
 555         int err = 0;
 556
 557
 558         sanitize_i387_state(tsk);
 559
 560         /*
 561          * For legacy compatible, we always set FP/SSE bits in the bit
 562          * vector while saving the state to the user context.
 563          * This will enable us capturing any changes(during sigreturn) to
 564          * the FP/SSE bits by the legacy applications which don't touch
 565          * xstate_bv in the xsave header.
 566          *
 567          * xsave aware applications can change the xstate_bv in the xsave
 568          * header as well as change any contents in the memory layout.
 569          * xrestore as part of sigreturn will capture all the changes.
 570          */
 571         tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 572
 573         if (save_i387_fxsave(fx) < 0)
 574                 return -1;
 575
 576         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
 577                              sizeof(struct _fpx_sw_bytes));
 578         err |= __put_user(FP_XSTATE_MAGIC2,
 579                           (__u32 __user *) (buf + sig_xstate_ia32_size
 580                                             - FP_XSTATE_MAGIC2_SIZE));
 581         if (err)
 582                 return -1;
 583
 584         return 1;
 585 }
 586
 587 int save_i387_xstate_ia32(void __user *buf)
 588 {
 589         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 590         struct task_struct *tsk = current;
 591
 592         if (!used_math())
 593                 return 0;
 594
 595         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
 596                 return -EACCES;
 597         /*
 598          * This will cause a "finit" to be triggered by the next
 599          * attempted FPU operation by the 'current' process.
 600          */
 601         clear_used_math();
 602
 603         if (!HAVE_HWFP) {
 604                 return fpregs_soft_get(current, NULL,
 605                                        0, sizeof(struct user_i387_ia32_struct),
 606                                        NULL, fp) ? -1 : 1;
 607         }
 608
 609         unlazy_fpu(tsk);
 610
 611         if (cpu_has_xsave)
 612                 return save_i387_xsave(fp);
 613         if (cpu_has_fxsr)
 614                 return save_i387_fxsave(fp);
 615         else
 616                 return save_i387_fsave(fp);
 617 }
 618
 619 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
 620 {
 621         struct task_struct *tsk = current;
 622
 623         return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
 624                                 sizeof(struct i387_fsave_struct));
 625 }
 626
 627 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
 628                                unsigned int size)
 629 {
 630         struct task_struct *tsk = current;
 631         struct user_i387_ia32_struct env;
 632         int err;
 633
 634         err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
 635                                size);
 636         /* mxcsr reserved bits must be masked to zero for security reasons */
 637         tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 638         if (err || __copy_from_user(&env, buf, sizeof(env)))
 639                 return 1;
 640         convert_to_fxsr(tsk, &env);
 641
 642         return 0;
 643 }
 644
 645 static int restore_i387_xsave(void __user *buf)
 646 {
 647         struct _fpx_sw_bytes fx_sw_user;
 648         struct _fpstate_ia32 __user *fx_user =
 649                         ((struct _fpstate_ia32 __user *) buf);
 650         struct i387_fxsave_struct __user *fx =
 651                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
 652         struct xsave_hdr_struct *xsave_hdr =
 653                                 &current->thread.fpu.state->xsave.xsave_hdr;
 654         u64 mask;
 655         int err;
 656
 657         if (check_for_xstate(fx, buf, &fx_sw_user))
 658                 goto fx_only;
 659
 660         mask = fx_sw_user.xstate_bv;
 661
 662         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
 663
 664         xsave_hdr->xstate_bv &= pcntxt_mask;
 665         /*
 666          * These bits must be zero.
 667          */
 668         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 669
 670         /*
 671          * Init the state that is not present in the memory layout
 672          * and enabled by the OS.
 673          */
 674         mask = ~(pcntxt_mask & ~mask);
 675         xsave_hdr->xstate_bv &= mask;
 676
 677         return err;
 678 fx_only:
 679         /*
 680          * Couldn't find the extended state information in the memory
 681          * layout. Restore the FP/SSE and init the other extended state
 682          * enabled by the OS.
 683          */
 684         xsave_hdr->xstate_bv = XSTATE_FPSSE;
 685         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
 686 }
 687
 688 int restore_i387_xstate_ia32(void __user *buf)
 689 {
 690         int err;
 691         struct task_struct *tsk = current;
 692         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 693
 694         if (HAVE_HWFP)
 695                 clear_fpu(tsk);
 696
 697         if (!buf) {
 698                 if (used_math()) {
 699                         clear_fpu(tsk);
 700                         clear_used_math();
 701                 }
 702
 703                 return 0;
 704         } else
 705                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
 706                         return -EACCES;
 707
 708         if (!used_math()) {
 709                 err = init_fpu(tsk);
 710                 if (err)
 711                         return err;
 712         }
 713
 714         if (HAVE_HWFP) {
 715                 if (cpu_has_xsave)
 716                         err = restore_i387_xsave(buf);
 717                 else if (cpu_has_fxsr)
 718                         err = restore_i387_fxsave(fp, sizeof(struct
 719                                                            i387_fxsave_struct));
 720                 else
 721                         err = restore_i387_fsave(fp);
 722         } else {
 723                 err = fpregs_soft_set(current, NULL,
 724                                       0, sizeof(struct user_i387_ia32_struct),
 725                                       NULL, fp) != 0;
 726         }
 727         set_used_math();
 728
 729         return err;
 730 }
 731
 732 /*
 733  * FPU state for core dumps.
 734  * This is only used for a.out dumps now.
 735  * It is declared generically using elf_fpregset_t (which is
 736  * struct user_i387_struct) but is in fact only used for 32-bit
 737  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 738  */
 739 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 740 {
 741         struct task_struct *tsk = current;
 742         int fpvalid;
 743
 744         fpvalid = !!used_math();
 745         if (fpvalid)
 746                 fpvalid = !fpregs_get(tsk, NULL,
 747                                       0, sizeof(struct user_i387_ia32_struct),
 748                                       fpu, NULL);
 749
 750         return fpvalid;
 751 }
 752 EXPORT_SYMBOL(dump_fpu);
 753
 754 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */