drivers/gpu/drm/tegra/vic.c

   1 /*
   2  * Copyright (c) 2015, NVIDIA Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/clk.h>
  10 #include <linux/host1x.h>
  11 #include <linux/iommu.h>
  12 #include <linux/module.h>
  13 #include <linux/of.h>
  14 #include <linux/of_device.h>
  15 #include <linux/of_platform.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pm_runtime.h>
  18 #include <linux/reset.h>
  19
  20 #include <soc/tegra/pmc.h>
  21
  22 #include "drm.h"
  23 #include "falcon.h"
  24 #include "vic.h"
  25
  26 struct vic_config {
  27         const char *firmware;
  28 };
  29
  30 struct vic {
  31         struct falcon falcon;
  32         bool booted;
  33
  34         void __iomem *regs;
  35         struct tegra_drm_client client;
  36         struct host1x_channel *channel;
  37         struct iommu_domain *domain;
  38         struct device *dev;
  39         struct clk *clk;
  40
  41         /* Platform configuration */
  42         const struct vic_config *config;
  43 };
  44
  45 static inline struct vic *to_vic(struct tegra_drm_client *client)
  46 {
  47         return container_of(client, struct vic, client);
  48 }
  49
  50 static void vic_writel(struct vic *vic, u32 value, unsigned int offset)
  51 {
  52         writel(value, vic->regs + offset);
  53 }
  54
  55 static int vic_runtime_resume(struct device *dev)
  56 {
  57         struct vic *vic = dev_get_drvdata(dev);
  58
  59         return clk_prepare_enable(vic->clk);
  60 }
  61
  62 static int vic_runtime_suspend(struct device *dev)
  63 {
  64         struct vic *vic = dev_get_drvdata(dev);
  65
  66         clk_disable_unprepare(vic->clk);
  67
  68         vic->booted = false;
  69
  70         return 0;
  71 }
  72
  73 static int vic_boot(struct vic *vic)
  74 {
  75         u32 fce_ucode_size, fce_bin_data_offset;
  76         void *hdr;
  77         int err = 0;
  78
  79         if (vic->booted)
  80                 return 0;
  81
  82         /* setup clockgating registers */
  83         vic_writel(vic, CG_IDLE_CG_DLY_CNT(4) |
  84                         CG_IDLE_CG_EN |
  85                         CG_WAKEUP_DLY_CNT(4),
  86                    NV_PVIC_MISC_PRI_VIC_CG);
  87
  88         err = falcon_boot(&vic->falcon);
  89         if (err < 0)
  90                 return err;
  91
  92         hdr = vic->falcon.firmware.vaddr;
  93         fce_bin_data_offset = *(u32 *)(hdr + VIC_UCODE_FCE_DATA_OFFSET);
  94         hdr = vic->falcon.firmware.vaddr +
  95                 *(u32 *)(hdr + VIC_UCODE_FCE_HEADER_OFFSET);
  96         fce_ucode_size = *(u32 *)(hdr + FCE_UCODE_SIZE_OFFSET);
  97
  98         falcon_execute_method(&vic->falcon, VIC_SET_APPLICATION_ID, 1);
  99         falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE,
 100                               fce_ucode_size);
 101         falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_OFFSET,
 102                               (vic->falcon.firmware.paddr + fce_bin_data_offset)
 103                                 >> 8);
 104
 105         err = falcon_wait_idle(&vic->falcon);
 106         if (err < 0) {
 107                 dev_err(vic->dev,
 108                         "failed to set application ID and FCE base\n");
 109                 return err;
 110         }
 111
 112         vic->booted = true;
 113
 114         return 0;
 115 }
 116
 117 static void *vic_falcon_alloc(struct falcon *falcon, size_t size,
 118                                dma_addr_t *iova)
 119 {
 120         struct tegra_drm *tegra = falcon->data;
 121
 122         return tegra_drm_alloc(tegra, size, iova);
 123 }
 124
 125 static void vic_falcon_free(struct falcon *falcon, size_t size,
 126                             dma_addr_t iova, void *va)
 127 {
 128         struct tegra_drm *tegra = falcon->data;
 129
 130         return tegra_drm_free(tegra, size, va, iova);
 131 }
 132
 133 static const struct falcon_ops vic_falcon_ops = {
 134         .alloc = vic_falcon_alloc,
 135         .free = vic_falcon_free
 136 };
 137
 138 static int vic_init(struct host1x_client *client)
 139 {
 140         struct tegra_drm_client *drm = host1x_to_drm_client(client);
 141         struct drm_device *dev = dev_get_drvdata(client->parent);
 142         struct tegra_drm *tegra = dev->dev_private;
 143         struct vic *vic = to_vic(drm);
 144         int err;
 145
 146         if (tegra->domain) {
 147                 err = iommu_attach_device(tegra->domain, vic->dev);
 148                 if (err < 0) {
 149                         dev_err(vic->dev, "failed to attach to domain: %d\n",
 150                                 err);
 151                         return err;
 152                 }
 153
 154                 vic->domain = tegra->domain;
 155         }
 156
 157         if (!vic->falcon.data) {
 158                 vic->falcon.data = tegra;
 159                 err = falcon_load_firmware(&vic->falcon);
 160                 if (err < 0)
 161                         goto detach_device;
 162         }
 163
 164         vic->channel = host1x_channel_request(client->dev);
 165         if (!vic->channel) {
 166                 err = -ENOMEM;
 167                 goto detach_device;
 168         }
 169
 170         client->syncpts[0] = host1x_syncpt_request(client, 0);
 171         if (!client->syncpts[0]) {
 172                 err = -ENOMEM;
 173                 goto free_channel;
 174         }
 175
 176         err = tegra_drm_register_client(tegra, drm);
 177         if (err < 0)
 178                 goto free_syncpt;
 179
 180         return 0;
 181
 182 free_syncpt:
 183         host1x_syncpt_free(client->syncpts[0]);
 184 free_channel:
 185         host1x_channel_put(vic->channel);
 186 detach_device:
 187         if (tegra->domain)
 188                 iommu_detach_device(tegra->domain, vic->dev);
 189
 190         return err;
 191 }
 192
 193 static int vic_exit(struct host1x_client *client)
 194 {
 195         struct tegra_drm_client *drm = host1x_to_drm_client(client);
 196         struct drm_device *dev = dev_get_drvdata(client->parent);
 197         struct tegra_drm *tegra = dev->dev_private;
 198         struct vic *vic = to_vic(drm);
 199         int err;
 200
 201         err = tegra_drm_unregister_client(tegra, drm);
 202         if (err < 0)
 203                 return err;
 204
 205         host1x_syncpt_free(client->syncpts[0]);
 206         host1x_channel_put(vic->channel);
 207
 208         if (vic->domain) {
 209                 iommu_detach_device(vic->domain, vic->dev);
 210                 vic->domain = NULL;
 211         }
 212
 213         return 0;
 214 }
 215
 216 static const struct host1x_client_ops vic_client_ops = {
 217         .init = vic_init,
 218         .exit = vic_exit,
 219 };
 220
 221 static int vic_open_channel(struct tegra_drm_client *client,
 222                             struct tegra_drm_context *context)
 223 {
 224         struct vic *vic = to_vic(client);
 225         int err;
 226
 227         err = pm_runtime_get_sync(vic->dev);
 228         if (err < 0)
 229                 return err;
 230
 231         err = vic_boot(vic);
 232         if (err < 0) {
 233                 pm_runtime_put(vic->dev);
 234                 return err;
 235         }
 236
 237         context->channel = host1x_channel_get(vic->channel);
 238         if (!context->channel) {
 239                 pm_runtime_put(vic->dev);
 240                 return -ENOMEM;
 241         }
 242
 243         return 0;
 244 }
 245
 246 static void vic_close_channel(struct tegra_drm_context *context)
 247 {
 248         struct vic *vic = to_vic(context->client);
 249
 250         host1x_channel_put(context->channel);
 251
 252         pm_runtime_put(vic->dev);
 253 }
 254
 255 static const struct tegra_drm_client_ops vic_ops = {
 256         .open_channel = vic_open_channel,
 257         .close_channel = vic_close_channel,
 258         .submit = tegra_drm_submit,
 259 };
 260
 261 #define NVIDIA_TEGRA_124_VIC_FIRMWARE "nvidia/tegra124/vic03_ucode.bin"
 262
 263 static const struct vic_config vic_t124_config = {
 264         .firmware = NVIDIA_TEGRA_124_VIC_FIRMWARE,
 265 };
 266
 267 #define NVIDIA_TEGRA_210_VIC_FIRMWARE "nvidia/tegra210/vic04_ucode.bin"
 268
 269 static const struct vic_config vic_t210_config = {
 270         .firmware = NVIDIA_TEGRA_210_VIC_FIRMWARE,
 271 };
 272
 273 #define NVIDIA_TEGRA_186_VIC_FIRMWARE "nvidia/tegra186/vic04_ucode.bin"
 274
 275 static const struct vic_config vic_t186_config = {
 276         .firmware = NVIDIA_TEGRA_186_VIC_FIRMWARE,
 277 };
 278
 279 static const struct of_device_id vic_match[] = {
 280         { .compatible = "nvidia,tegra124-vic", .data = &vic_t124_config },
 281         { .compatible = "nvidia,tegra210-vic", .data = &vic_t210_config },
 282         { .compatible = "nvidia,tegra186-vic", .data = &vic_t186_config },
 283         { },
 284 };
 285
 286 static int vic_probe(struct platform_device *pdev)
 287 {
 288         struct device *dev = &pdev->dev;
 289         struct host1x_syncpt **syncpts;
 290         struct resource *regs;
 291         struct vic *vic;
 292         int err;
 293
 294         vic = devm_kzalloc(dev, sizeof(*vic), GFP_KERNEL);
 295         if (!vic)
 296                 return -ENOMEM;
 297
 298         vic->config = of_device_get_match_data(dev);
 299
 300         syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
 301         if (!syncpts)
 302                 return -ENOMEM;
 303
 304         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 305         if (!regs) {
 306                 dev_err(&pdev->dev, "failed to get registers\n");
 307                 return -ENXIO;
 308         }
 309
 310         vic->regs = devm_ioremap_resource(dev, regs);
 311         if (IS_ERR(vic->regs))
 312                 return PTR_ERR(vic->regs);
 313
 314         vic->clk = devm_clk_get(dev, NULL);
 315         if (IS_ERR(vic->clk)) {
 316                 dev_err(&pdev->dev, "failed to get clock\n");
 317                 return PTR_ERR(vic->clk);
 318         }
 319
 320         vic->falcon.dev = dev;
 321         vic->falcon.regs = vic->regs;
 322         vic->falcon.ops = &vic_falcon_ops;
 323
 324         err = falcon_init(&vic->falcon);
 325         if (err < 0)
 326                 return err;
 327
 328         err = falcon_read_firmware(&vic->falcon, vic->config->firmware);
 329         if (err < 0)
 330                 goto exit_falcon;
 331
 332         platform_set_drvdata(pdev, vic);
 333
 334         INIT_LIST_HEAD(&vic->client.base.list);
 335         vic->client.base.ops = &vic_client_ops;
 336         vic->client.base.dev = dev;
 337         vic->client.base.class = HOST1X_CLASS_VIC;
 338         vic->client.base.syncpts = syncpts;
 339         vic->client.base.num_syncpts = 1;
 340         vic->dev = dev;
 341
 342         INIT_LIST_HEAD(&vic->client.list);
 343         vic->client.ops = &vic_ops;
 344
 345         err = host1x_client_register(&vic->client.base);
 346         if (err < 0) {
 347                 dev_err(dev, "failed to register host1x client: %d\n", err);
 348                 platform_set_drvdata(pdev, NULL);
 349                 goto exit_falcon;
 350         }
 351
 352         pm_runtime_enable(&pdev->dev);
 353         if (!pm_runtime_enabled(&pdev->dev)) {
 354                 err = vic_runtime_resume(&pdev->dev);
 355                 if (err < 0)
 356                         goto unregister_client;
 357         }
 358
 359         return 0;
 360
 361 unregister_client:
 362         host1x_client_unregister(&vic->client.base);
 363 exit_falcon:
 364         falcon_exit(&vic->falcon);
 365
 366         return err;
 367 }
 368
 369 static int vic_remove(struct platform_device *pdev)
 370 {
 371         struct vic *vic = platform_get_drvdata(pdev);
 372         int err;
 373
 374         err = host1x_client_unregister(&vic->client.base);
 375         if (err < 0) {
 376                 dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
 377                         err);
 378                 return err;
 379         }
 380
 381         if (pm_runtime_enabled(&pdev->dev))
 382                 pm_runtime_disable(&pdev->dev);
 383         else
 384                 vic_runtime_suspend(&pdev->dev);
 385
 386         falcon_exit(&vic->falcon);
 387
 388         return 0;
 389 }
 390
 391 static const struct dev_pm_ops vic_pm_ops = {
 392         SET_RUNTIME_PM_OPS(vic_runtime_suspend, vic_runtime_resume, NULL)
 393 };
 394
 395 struct platform_driver tegra_vic_driver = {
 396         .driver = {
 397                 .name = "tegra-vic",
 398                 .of_match_table = vic_match,
 399                 .pm = &vic_pm_ops
 400         },
 401         .probe = vic_probe,
 402         .remove = vic_remove,
 403 };
 404
 405 #if IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)
 406 MODULE_FIRMWARE(NVIDIA_TEGRA_124_VIC_FIRMWARE);
 407 #endif
 408 #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
 409 MODULE_FIRMWARE(NVIDIA_TEGRA_210_VIC_FIRMWARE);
 410 #endif
 411 #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC)
 412 MODULE_FIRMWARE(NVIDIA_TEGRA_186_VIC_FIRMWARE);
 413 #endif