1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
5 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
6 * Linux device driver for RTL8192SU
8 * Modifications for inclusion into the Linux staging tree are
9 * Copyright(c) 2010 Larry Finger. All rights reserved.
11 * Contact information:
15 ******************************************************************************/
17 #define _RTL8712_XMIT_C_
19 #include "osdep_service.h"
20 #include "drv_types.h"
22 #include "osdep_intf.h"
25 static void dump_xframe(struct _adapter *padapter,
26 struct xmit_frame *pxmitframe);
27 static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz);
29 sint _r8712_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag)
31 phw_txqueue->ac_tag = ac_tag;
34 phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ;
37 phw_txqueue->ff_hwaddr = RTL8712_DMA_BKQ;
40 phw_txqueue->ff_hwaddr = RTL8712_DMA_VIQ;
43 phw_txqueue->ff_hwaddr = RTL8712_DMA_VOQ;
46 phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ;
52 int r8712_txframes_sta_ac_pending(struct _adapter *padapter,
53 struct pkt_attrib *pattrib)
55 struct sta_info *psta;
56 struct tx_servq *ptxservq;
57 int priority = pattrib->priority;
63 ptxservq = &(psta->sta_xmitpriv.bk_q);
67 ptxservq = &(psta->sta_xmitpriv.vi_q);
71 ptxservq = &(psta->sta_xmitpriv.vo_q);
76 ptxservq = &(psta->sta_xmitpriv.be_q);
79 return ptxservq->qcnt;
82 static u32 get_ff_hwaddr(struct xmit_frame *pxmitframe)
85 struct pkt_attrib *pattrib = &pxmitframe->attrib;
86 struct _adapter *padapter = pxmitframe->padapter;
87 struct dvobj_priv *pdvobj = &padapter->dvobjpriv;
89 if (pxmitframe->frame_tag == TXAGG_FRAMETAG) {
90 addr = RTL8712_DMA_H2CCMD;
91 } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
92 addr = RTL8712_DMA_MGTQ;
93 } else if (pdvobj->nr_endpoint == 6) {
94 switch (pattrib->priority) {
97 addr = RTL8712_DMA_BEQ;
101 addr = RTL8712_DMA_BKQ;
105 addr = RTL8712_DMA_VIQ;
109 addr = RTL8712_DMA_VOQ;
115 addr = RTL8712_DMA_H2CCMD;
118 addr = RTL8712_DMA_BEQ;
121 } else if (pdvobj->nr_endpoint == 4) {
122 switch (pattrib->qsel) {
127 addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/
133 addr = RTL8712_DMA_VOQ;/*RTL8712_EP_HI;*/
139 addr = RTL8712_DMA_H2CCMD;
142 addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/
149 static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv,
150 struct hw_xmit *phwxmit,
151 struct tx_servq *ptxservq,
152 struct __queue *pframe_queue)
154 struct list_head *xmitframe_plist, *xmitframe_phead;
155 struct xmit_frame *pxmitframe = NULL;
157 xmitframe_phead = &pframe_queue->queue;
158 xmitframe_plist = xmitframe_phead->next;
159 if (!end_of_queue_search(xmitframe_phead, xmitframe_plist)) {
160 pxmitframe = container_of(xmitframe_plist,
161 struct xmit_frame, list);
162 list_del_init(&pxmitframe->list);
169 static struct xmit_frame *dequeue_xframe_ex(struct xmit_priv *pxmitpriv,
170 struct hw_xmit *phwxmit_i, sint entry)
173 struct list_head *sta_plist, *sta_phead;
174 struct hw_xmit *phwxmit;
175 struct tx_servq *ptxservq = NULL;
176 struct __queue *pframe_queue = NULL;
177 struct xmit_frame *pxmitframe = NULL;
181 /*entry indx: 0->vo, 1->vi, 2->be, 3->bk.*/
182 inx[0] = 0; acirp_cnt[0] = pxmitpriv->voq_cnt;
183 inx[1] = 1; acirp_cnt[1] = pxmitpriv->viq_cnt;
184 inx[2] = 2; acirp_cnt[2] = pxmitpriv->beq_cnt;
185 inx[3] = 3; acirp_cnt[3] = pxmitpriv->bkq_cnt;
186 for (i = 0; i < 4; i++) {
187 for (j = i + 1; j < 4; j++) {
188 if (acirp_cnt[j] < acirp_cnt[i]) {
189 swap(acirp_cnt[i], acirp_cnt[j]);
190 swap(inx[i], inx[j]);
194 spin_lock_irqsave(&pxmitpriv->lock, irqL0);
195 for (i = 0; i < entry; i++) {
196 phwxmit = phwxmit_i + inx[i];
197 sta_phead = &phwxmit->sta_queue->queue;
198 sta_plist = sta_phead->next;
199 while (!end_of_queue_search(sta_phead, sta_plist)) {
200 ptxservq = container_of(sta_plist, struct tx_servq,
202 pframe_queue = &ptxservq->sta_pending;
203 pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit,
204 ptxservq, pframe_queue);
207 goto exit_dequeue_xframe_ex;
209 sta_plist = sta_plist->next;
210 /*Remove sta node when there are no pending packets.*/
211 if (list_empty(&pframe_queue->queue)) {
212 /* must be done after sta_plist->next
215 list_del_init(&ptxservq->tx_pending);
219 exit_dequeue_xframe_ex:
220 spin_unlock_irqrestore(&pxmitpriv->lock, irqL0);
224 void r8712_do_queue_select(struct _adapter *padapter,
225 struct pkt_attrib *pattrib)
227 unsigned int qsel = 0;
228 struct dvobj_priv *pdvobj = &padapter->dvobjpriv;
230 if (pdvobj->nr_endpoint == 6) {
231 qsel = (unsigned int) pattrib->priority;
232 } else if (pdvobj->nr_endpoint == 4) {
233 qsel = (unsigned int) pattrib->priority;
234 if (qsel == 0 || qsel == 3)
236 else if (qsel == 1 || qsel == 2)
238 else if (qsel == 4 || qsel == 5)
240 else if (qsel == 6 || qsel == 7)
245 pattrib->qsel = qsel;
248 #ifdef CONFIG_R8712_TX_AGGR
249 u8 r8712_construct_txaggr_cmd_desc(struct xmit_buf *pxmitbuf)
251 struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf;
253 /* Fill up TxCmd Descriptor according as USB FW Tx Aaggregation info.*/
255 ptx_desc->txdw0 = cpu_to_le32(CMD_HDR_SZ & 0xffff);
257 cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) &
259 ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
262 ptx_desc->txdw1 |= cpu_to_le32((0x13 << QSEL_SHT) & 0x00001f00);
267 u8 r8712_construct_txaggr_cmd_hdr(struct xmit_buf *pxmitbuf)
269 struct xmit_frame *pxmitframe = (struct xmit_frame *)
271 struct _adapter *padapter = pxmitframe->padapter;
272 struct cmd_priv *pcmdpriv = &(padapter->cmdpriv);
273 struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *)
274 (pxmitbuf->pbuf + TXDESC_SIZE);
276 /* Fill up Cmd Header for USB FW Tx Aggregation.*/
278 pcmd_hdr->cmd_dw0 = cpu_to_le32((GEN_CMD_CODE(_AMSDU_TO_AMPDU) << 16) |
279 (pcmdpriv->cmd_seq << 24));
285 u8 r8712_append_mpdu_unit(struct xmit_buf *pxmitbuf,
286 struct xmit_frame *pxmitframe)
288 struct _adapter *padapter = pxmitframe->padapter;
289 struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf;
290 int last_txcmdsz = 0;
293 /* 802.3->802.11 converter */
294 r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
295 /* free skb struct */
296 r8712_xmit_complete(padapter, pxmitframe);
297 if (pxmitframe->attrib.ether_type != 0x0806) {
298 if ((pxmitframe->attrib.ether_type != 0x888e) &&
299 (pxmitframe->attrib.dhcp_pkt != 1)) {
300 r8712_issue_addbareq_cmd(padapter,
301 pxmitframe->attrib.priority);
304 pxmitframe->last[0] = 1;
305 update_txdesc(pxmitframe, (uint *)(pxmitframe->buf_addr),
306 pxmitframe->attrib.last_txcmdsz);
308 last_txcmdsz = pxmitframe->attrib.last_txcmdsz;
309 padding_sz = (8 - (last_txcmdsz % 8));
310 if ((last_txcmdsz % 8) != 0) {
313 for (i = 0; i < padding_sz; i++)
314 *(pxmitframe->buf_addr + TXDESC_SIZE + last_txcmdsz +
317 /* Add the new mpdu's length */
318 ptx_desc->txdw0 = cpu_to_le32((ptx_desc->txdw0 & 0xffff0000) |
319 ((ptx_desc->txdw0 & 0x0000ffff) +
320 ((TXDESC_SIZE + last_txcmdsz + padding_sz) &
327 u8 r8712_xmitframe_aggr_1st(struct xmit_buf *pxmitbuf,
328 struct xmit_frame *pxmitframe)
330 /* linux complete context doesn't need to protect */
331 pxmitframe->pxmitbuf = pxmitbuf;
332 pxmitbuf->priv_data = pxmitframe;
333 pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0];
334 /* buffer addr assoc */
335 pxmitframe->buf_addr = pxmitbuf->pbuf + TXDESC_SIZE + CMD_HDR_SZ;
336 /*RTL8712_DMA_H2CCMD */
337 r8712_construct_txaggr_cmd_desc(pxmitbuf);
338 r8712_construct_txaggr_cmd_hdr(pxmitbuf);
339 if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS)
340 pxmitbuf->aggr_nr = 1;
345 u16 r8712_xmitframe_aggr_next(struct xmit_buf *pxmitbuf,
346 struct xmit_frame *pxmitframe)
348 pxmitframe->pxmitbuf = pxmitbuf;
349 pxmitbuf->priv_data = pxmitframe;
350 pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0];
351 /* buffer addr assoc */
352 pxmitframe->buf_addr = pxmitbuf->pbuf + TXDESC_SIZE +
353 (((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff);
354 if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS) {
355 r8712_free_xmitframe_ex(&pxmitframe->padapter->xmitpriv,
361 (((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff);
364 u8 r8712_dump_aggr_xframe(struct xmit_buf *pxmitbuf,
365 struct xmit_frame *pxmitframe)
367 struct _adapter *padapter = pxmitframe->padapter;
368 struct dvobj_priv *pdvobj = &padapter->dvobjpriv;
369 struct tx_desc *ptxdesc = pxmitbuf->pbuf;
370 struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *)
371 (pxmitbuf->pbuf + TXDESC_SIZE);
372 u16 total_length = (u16) (ptxdesc->txdw0 & 0xffff);
374 /* use 1st xmitframe as media */
375 xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf);
376 pcmd_hdr->cmd_dw0 = cpu_to_le32(((total_length - CMD_HDR_SZ) &
377 0x0000ffff) | (pcmd_hdr->cmd_dw0 &
380 /* urb length in cmd_dw1 */
381 pcmd_hdr->cmd_dw1 = cpu_to_le32((pxmitbuf->aggr_nr & 0xff)|
382 ((total_length + TXDESC_SIZE) << 16));
383 pxmitframe->last[0] = 1;
384 pxmitframe->bpending[0] = false;
385 pxmitframe->mem_addr = pxmitbuf->pbuf;
387 if ((pdvobj->ishighspeed && ((total_length + TXDESC_SIZE) % 0x200) ==
388 0) || ((!pdvobj->ishighspeed && ((total_length + TXDESC_SIZE) %
390 ptxdesc->txdw0 |= cpu_to_le32
391 (((TXDESC_SIZE + OFFSET_SZ + 8) << OFFSET_SHT) &
393 /*32 bytes for TX Desc + 8 bytes pending*/
395 ptxdesc->txdw0 |= cpu_to_le32
396 (((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) &
398 /*default = 32 bytes for TX Desc*/
400 r8712_write_port(pxmitframe->padapter, RTL8712_DMA_H2CCMD,
401 total_length + TXDESC_SIZE, (u8 *)pxmitframe);
408 static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz)
411 struct _adapter *padapter = pxmitframe->padapter;
412 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
413 struct qos_priv *pqospriv = &pmlmepriv->qospriv;
414 struct security_priv *psecuritypriv = &padapter->securitypriv;
415 struct pkt_attrib *pattrib = &pxmitframe->attrib;
416 struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
417 struct dvobj_priv *pdvobj = &padapter->dvobjpriv;
418 #ifdef CONFIG_R8712_TX_AGGR
419 struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
421 u8 blnSetTxDescOffset;
422 sint bmcst = IS_MCAST(pattrib->ra);
423 struct ht_priv *phtpriv = &pmlmepriv->htpriv;
424 struct tx_desc txdesc_mp;
426 memcpy(&txdesc_mp, ptxdesc, sizeof(struct tx_desc));
427 memset(ptxdesc, 0, sizeof(struct tx_desc));
429 ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);
430 if (pdvobj->ishighspeed) {
431 if (((sz + TXDESC_SIZE) % 512) == 0)
432 blnSetTxDescOffset = 1;
434 blnSetTxDescOffset = 0;
436 if (((sz + TXDESC_SIZE) % 64) == 0)
437 blnSetTxDescOffset = 1;
439 blnSetTxDescOffset = 0;
441 if (blnSetTxDescOffset) {
442 /* 32 bytes for TX Desc + 8 bytes pending */
443 ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ + 8) <<
444 OFFSET_SHT) & 0x00ff0000);
446 /* default = 32 bytes for TX Desc */
447 ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) <<
448 OFFSET_SHT) & 0x00ff0000);
450 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
451 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
453 ptxdesc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x1f);
455 #ifdef CONFIG_R8712_TX_AGGR
456 /* dirty workaround, need to check if it is aggr cmd. */
457 if ((u8 *)pmem != (u8 *)pxmitframe->pxmitbuf->pbuf) {
458 ptxdesc->txdw0 |= cpu_to_le32
459 ((0x3 << TYPE_SHT) & TYPE_MSK);
460 qsel = (uint)(pattrib->qsel & 0x0000001f);
463 ptxdesc->txdw1 |= cpu_to_le32
464 ((qsel << QSEL_SHT) & 0x00001f00);
465 ptxdesc->txdw2 = cpu_to_le32
466 ((qsel << RTS_RC_SHT) & 0x001f0000);
467 ptxdesc->txdw6 |= cpu_to_le32
468 ((0x5 << RSVD6_SHT) & RSVD6_MSK);
470 ptxdesc->txdw0 |= cpu_to_le32
471 ((0x3 << TYPE_SHT) & TYPE_MSK);
472 ptxdesc->txdw1 |= cpu_to_le32
473 ((0x13 << QSEL_SHT) & 0x00001f00);
474 qsel = (uint)(pattrib->qsel & 0x0000001f);
477 ptxdesc->txdw2 = cpu_to_le32
478 ((qsel << RTS_RC_SHT) & 0x0001f000);
479 ptxdesc->txdw7 |= cpu_to_le32
480 (pcmdpriv->cmd_seq << 24);
483 pattrib->qsel = 0x13;
485 qsel = (uint)(pattrib->qsel & 0x0000001f);
486 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
488 if (!pqospriv->qos_option)
489 ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/*Non-QoS*/
490 if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
491 switch (pattrib->encrypt) { /*SEC_TYPE*/
494 ptxdesc->txdw1 |= cpu_to_le32((0x01 << 22) &
496 /*KEY_ID when WEP is used;*/
497 ptxdesc->txdw1 |= cpu_to_le32((psecuritypriv->
498 PrivacyKeyIndex << 17) &
503 ptxdesc->txdw1 |= cpu_to_le32((0x02 << 22) &
507 ptxdesc->txdw1 |= cpu_to_le32((0x03 << 22) &
517 ptxdesc->txdw2 |= cpu_to_le32(BMC);
520 /* f/w will increase the seqnum by itself, driver pass the
521 * correct priority to fw
522 * fw will check the correct priority for increasing the
523 * seqnum per tid. about usb using 4-endpoint, qsel points out
524 * the correct mapping between AC&Endpoint,
525 * the purpose is that correct mapping lets the MAC release
526 * the AC Queue list correctly.
528 ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) &
530 if ((pattrib->ether_type != 0x888e) &&
531 (pattrib->ether_type != 0x0806) &&
532 (pattrib->dhcp_pkt != 1)) {
533 /*Not EAP & ARP type data packet*/
534 if (phtpriv->ht_option == 1) { /*B/G/N Mode*/
535 if (phtpriv->ampdu_enable != true)
536 ptxdesc->txdw2 |= cpu_to_le32(BK);
539 /* EAP data packet and ARP packet.
540 * Use the 1M data rate to send the EAP/ARP packet.
541 * This will maybe make the handshake smooth.
543 /*driver uses data rate*/
544 ptxdesc->txdw4 = cpu_to_le32(0x80000000);
545 ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/*1M*/
547 if (pattrib->pctrl == 1) { /* mp tx packets */
548 struct tx_desc *ptxdesc_mp;
550 ptxdesc_mp = &txdesc_mp;
552 ptxdesc->txdw2 = ptxdesc_mp->txdw2;
554 ptxdesc->txdw2 |= cpu_to_le32(BMC);
555 ptxdesc->txdw2 |= cpu_to_le32(BK);
557 ptxdesc->txdw4 = ptxdesc_mp->txdw4;
559 ptxdesc->txdw5 = ptxdesc_mp->txdw5;
560 pattrib->pctrl = 0;/* reset to zero; */
562 } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
564 /* CAM_ID(MAC_ID), default=5; */
565 ptxdesc->txdw1 |= cpu_to_le32((0x05) & 0x1f);
566 qsel = (uint)(pattrib->qsel & 0x0000001f);
567 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
568 ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/* Non-QoS */
571 ptxdesc->txdw2 |= cpu_to_le32(BMC);
573 /* f/w will increase the seqnum by itself, driver pass the
574 * correct priority to fw
575 * fw will check the correct priority for increasing the seqnum
576 * per tid. about usb using 4-endpoint, qsel points out the
577 * correct mapping between AC&Endpoint,
578 * the purpose is that correct mapping let the MAC releases
579 * the AC Queue list correctly.
581 ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) &
584 ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/
586 ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/* gtest 1M */
587 } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) {
590 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
593 qsel = (uint)(pattrib->priority & 0x0000001f);
594 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
597 ptxdesc->txdw3 = cpu_to_le32((pattrib->seqnum << SEQ_SHT) &
600 ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/
602 ptxdesc->txdw5 = cpu_to_le32(0x001f9600);/*gtest*/
606 int r8712_xmitframe_complete(struct _adapter *padapter,
607 struct xmit_priv *pxmitpriv,
608 struct xmit_buf *pxmitbuf)
610 struct hw_xmit *phwxmits;
612 struct xmit_frame *pxmitframe = NULL;
613 #ifdef CONFIG_R8712_TX_AGGR
614 struct xmit_frame *p2ndxmitframe = NULL;
616 int res = _SUCCESS, xcnt = 0;
619 phwxmits = pxmitpriv->hwxmits;
620 hwentry = pxmitpriv->hwxmit_entry;
622 pxmitbuf = r8712_alloc_xmitbuf(pxmitpriv);
625 #ifdef CONFIG_R8712_TX_AGGR
626 pxmitbuf->aggr_nr = 0;
629 /* 1st frame dequeued */
630 pxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits, hwentry);
631 /* need to remember the 1st frame */
634 #ifdef CONFIG_R8712_TX_AGGR
635 /* 1. dequeue 2nd frame
636 * 2. aggr if 2nd xframe is dequeued, else dump directly
638 if (AGGR_NR_HIGH_BOUND > 1)
639 p2ndxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits,
641 if (pxmitframe->frame_tag != DATA_FRAMETAG) {
642 r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
646 if (p2ndxmitframe->frame_tag != DATA_FRAMETAG) {
647 r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
650 r8712_xmitframe_aggr_1st(pxmitbuf, pxmitframe);
654 total_length = r8712_xmitframe_aggr_next(
655 pxmitbuf, p2ndxmitframe);
657 p2ndxmitframe = dequeue_xframe_ex(
658 pxmitpriv, phwxmits, hwentry);
661 r8712_xmitframe_aggr_next(
666 } while (total_length <= 0x1800 &&
667 pxmitbuf->aggr_nr <= AGGR_NR_HIGH_BOUND);
669 if (pxmitbuf->aggr_nr > 0)
670 r8712_dump_aggr_xframe(pxmitbuf, pxmitframe);
674 xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf);
675 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
676 if (pxmitframe->attrib.priority <= 15)
677 res = r8712_xmitframe_coalesce(padapter,
678 pxmitframe->pkt, pxmitframe);
679 /* always return ndis_packet after
680 * r8712_xmitframe_coalesce
682 r8712_xmit_complete(padapter, pxmitframe);
685 dump_xframe(padapter, pxmitframe);
687 r8712_free_xmitframe_ex(pxmitpriv, pxmitframe);
691 } else { /* pxmitframe == NULL && p2ndxmitframe == NULL */
692 r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
698 static void dump_xframe(struct _adapter *padapter,
699 struct xmit_frame *pxmitframe)
704 struct pkt_attrib *pattrib = &pxmitframe->attrib;
705 struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
706 struct security_priv *psecuritypriv = &padapter->securitypriv;
708 if (pxmitframe->attrib.ether_type != 0x0806) {
709 if (pxmitframe->attrib.ether_type != 0x888e)
710 r8712_issue_addbareq_cmd(padapter, pattrib->priority);
712 mem_addr = pxmitframe->buf_addr;
713 for (t = 0; t < pattrib->nr_frags; t++) {
714 if (t != (pattrib->nr_frags - 1)) {
715 sz = pxmitpriv->frag_len;
716 sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 :
718 pxmitframe->last[t] = 0;
720 sz = pattrib->last_txcmdsz;
721 pxmitframe->last[t] = 1;
723 update_txdesc(pxmitframe, (uint *)mem_addr, sz);
724 w_sz = sz + TXDESC_SIZE;
725 pxmitframe->mem_addr = mem_addr;
726 pxmitframe->bpending[t] = false;
727 ff_hwaddr = get_ff_hwaddr(pxmitframe);
728 #ifdef CONFIG_R8712_TX_AGGR
729 r8712_write_port(padapter, RTL8712_DMA_H2CCMD, w_sz,
730 (unsigned char *)pxmitframe);
732 r8712_write_port(padapter, ff_hwaddr, w_sz,
733 (unsigned char *)pxmitframe);
736 mem_addr = (u8 *)RND4(((addr_t)(mem_addr)));
740 int r8712_xmit_direct(struct _adapter *padapter, struct xmit_frame *pxmitframe)
744 res = r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
745 pxmitframe->pkt = NULL;
747 dump_xframe(padapter, pxmitframe);
751 int r8712_xmit_enqueue(struct _adapter *padapter, struct xmit_frame *pxmitframe)
753 if (r8712_xmit_classifier(padapter, pxmitframe) == _FAIL) {
754 pxmitframe->pkt = NULL;