1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: MediaTek mmsys controller
13 The MediaTek mmsys system controller provides clock control, routing control,
14 and miscellaneous control in mmsys partition.
18 pattern: "^syscon@[0-9a-f]+$"
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
27 - mediatek,mt6779-mmsys
28 - mediatek,mt6797-mmsys
29 - mediatek,mt8167-mmsys
30 - mediatek,mt8173-mmsys
31 - mediatek,mt8183-mmsys
32 - mediatek,mt8186-mmsys
33 - mediatek,mt8192-mmsys
34 - mediatek,mt8365-mmsys
37 - const: mediatek,mt7623-mmsys
38 - const: mediatek,mt2701-mmsys
46 A phandle and PM domain specifier as defined by bindings
47 of the power controller specified by phandle. See
48 Documentation/devicetree/bindings/power/power-domain.yaml for details.
52 Using mailbox to communicate with GCE, it should have this
53 property and list of phandle, mailbox specifiers. See
54 Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
55 $ref: /schemas/types.yaml#/definitions/phandle-array
57 mediatek,gce-client-reg:
59 The register of client driver can be configured by gce with 4 arguments
60 defined in this property, such as phandle of gce, subsys id,
61 register offset and size.
62 Each subsys id is mapping to a base address of display function blocks
63 register which is defined in the gce header
64 include/dt-bindings/gce/<chip>-gce.h.
65 $ref: /schemas/types.yaml#/definitions/phandle-array
79 additionalProperties: false
83 #include <dt-bindings/power/mt8173-power.h>
84 #include <dt-bindings/gce/mt8173-gce.h>
86 mmsys: syscon@14000000 {
87 compatible = "mediatek,mt8173-mmsys", "syscon";
88 reg = <0x14000000 0x1000>;
89 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
92 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
93 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
94 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;