1 // SPDX-License-Identifier: GPL-2.0
3 * Volume Management Device driver
4 * Copyright (c) 2015, Intel Corporation.
7 #include <linux/device.h>
8 #include <linux/interrupt.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/msi.h>
13 #include <linux/pci.h>
14 #include <linux/srcu.h>
15 #include <linux/rculist.h>
16 #include <linux/rcupdate.h>
18 #include <asm/irqdomain.h>
19 #include <asm/device.h>
21 #include <asm/msidef.h>
27 #define PCI_REG_VMCAP 0x40
28 #define BUS_RESTRICT_CAP(vmcap) (vmcap & 0x1)
29 #define PCI_REG_VMCONFIG 0x44
30 #define BUS_RESTRICT_CFG(vmcfg) ((vmcfg >> 8) & 0x3)
31 #define PCI_REG_VMLOCK 0x70
32 #define MB2_SHADOW_EN(vmlock) (vmlock & 0x2)
36 * Device may contain registers which hint the physical location of the
37 * membars, in order to allow proper address translation during
38 * resource assignment to enable guest virtualization
40 VMD_FEAT_HAS_MEMBAR_SHADOW = (1 << 0),
43 * Device may provide root port configuration information which limits
46 VMD_FEAT_HAS_BUS_RESTRICTIONS = (1 << 1),
50 * Lock for manipulating VMD IRQ lists.
52 static DEFINE_RAW_SPINLOCK(list_lock);
55 * struct vmd_irq - private data to map driver IRQ to the VMD shared vector
56 * @node: list item for parent traversal.
57 * @irq: back pointer to parent.
58 * @enabled: true if driver enabled IRQ
59 * @virq: the virtual IRQ value provided to the requesting driver.
61 * Every MSI/MSI-X IRQ requested for a device in a VMD domain will be mapped to
62 * a VMD IRQ using this structure.
65 struct list_head node;
66 struct vmd_irq_list *irq;
72 * struct vmd_irq_list - list of driver requested IRQs mapping to a VMD vector
73 * @irq_list: the list of irq's the VMD one demuxes to.
74 * @srcu: SRCU struct for local synchronization.
75 * @count: number of child IRQs assigned to this vector; used to track
79 struct list_head irq_list;
80 struct srcu_struct srcu;
91 struct vmd_irq_list *irqs;
93 struct pci_sysdata sysdata;
94 struct resource resources[3];
95 struct irq_domain *irq_domain;
98 #ifdef CONFIG_X86_DEV_DMA_OPS
99 struct dma_map_ops dma_ops;
100 struct dma_domain dma_domain;
104 static inline struct vmd_dev *vmd_from_bus(struct pci_bus *bus)
106 return container_of(bus->sysdata, struct vmd_dev, sysdata);
109 static inline unsigned int index_from_irqs(struct vmd_dev *vmd,
110 struct vmd_irq_list *irqs)
112 return irqs - vmd->irqs;
116 * Drivers managing a device in a VMD domain allocate their own IRQs as before,
117 * but the MSI entry for the hardware it's driving will be programmed with a
118 * destination ID for the VMD MSI-X table. The VMD muxes interrupts in its
119 * domain into one of its own, and the VMD driver de-muxes these for the
120 * handlers sharing that VMD IRQ. The vmd irq_domain provides the operations
121 * and irq_chip to set this up.
123 static void vmd_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
125 struct vmd_irq *vmdirq = data->chip_data;
126 struct vmd_irq_list *irq = vmdirq->irq;
127 struct vmd_dev *vmd = irq_data_get_irq_handler_data(data);
129 msg->address_hi = MSI_ADDR_BASE_HI;
130 msg->address_lo = MSI_ADDR_BASE_LO |
131 MSI_ADDR_DEST_ID(index_from_irqs(vmd, irq));
136 * We rely on MSI_FLAG_USE_DEF_CHIP_OPS to set the IRQ mask/unmask ops.
138 static void vmd_irq_enable(struct irq_data *data)
140 struct vmd_irq *vmdirq = data->chip_data;
143 raw_spin_lock_irqsave(&list_lock, flags);
144 WARN_ON(vmdirq->enabled);
145 list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list);
146 vmdirq->enabled = true;
147 raw_spin_unlock_irqrestore(&list_lock, flags);
149 data->chip->irq_unmask(data);
152 static void vmd_irq_disable(struct irq_data *data)
154 struct vmd_irq *vmdirq = data->chip_data;
157 data->chip->irq_mask(data);
159 raw_spin_lock_irqsave(&list_lock, flags);
160 if (vmdirq->enabled) {
161 list_del_rcu(&vmdirq->node);
162 vmdirq->enabled = false;
164 raw_spin_unlock_irqrestore(&list_lock, flags);
168 * XXX: Stubbed until we develop acceptable way to not create conflicts with
169 * other devices sharing the same vector.
171 static int vmd_irq_set_affinity(struct irq_data *data,
172 const struct cpumask *dest, bool force)
177 static struct irq_chip vmd_msi_controller = {
179 .irq_enable = vmd_irq_enable,
180 .irq_disable = vmd_irq_disable,
181 .irq_compose_msi_msg = vmd_compose_msi_msg,
182 .irq_set_affinity = vmd_irq_set_affinity,
185 static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
186 msi_alloc_info_t *arg)
192 * XXX: We can be even smarter selecting the best IRQ once we solve the
195 static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *desc)
200 if (pci_is_bridge(msi_desc_to_pci_dev(desc)) || vmd->msix_count == 1)
201 return &vmd->irqs[0];
203 raw_spin_lock_irqsave(&list_lock, flags);
204 for (i = 1; i < vmd->msix_count; i++)
205 if (vmd->irqs[i].count < vmd->irqs[best].count)
207 vmd->irqs[best].count++;
208 raw_spin_unlock_irqrestore(&list_lock, flags);
210 return &vmd->irqs[best];
213 static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
214 unsigned int virq, irq_hw_number_t hwirq,
215 msi_alloc_info_t *arg)
217 struct msi_desc *desc = arg->desc;
218 struct vmd_dev *vmd = vmd_from_bus(msi_desc_to_pci_dev(desc)->bus);
219 struct vmd_irq *vmdirq = kzalloc(sizeof(*vmdirq), GFP_KERNEL);
220 unsigned int index, vector;
225 INIT_LIST_HEAD(&vmdirq->node);
226 vmdirq->irq = vmd_next_irq(vmd, desc);
228 index = index_from_irqs(vmd, vmdirq->irq);
229 vector = pci_irq_vector(vmd->dev, index);
231 irq_domain_set_info(domain, virq, vector, info->chip, vmdirq,
232 handle_untracked_irq, vmd, NULL);
236 static void vmd_msi_free(struct irq_domain *domain,
237 struct msi_domain_info *info, unsigned int virq)
239 struct vmd_irq *vmdirq = irq_get_chip_data(virq);
242 synchronize_srcu(&vmdirq->irq->srcu);
244 /* XXX: Potential optimization to rebalance */
245 raw_spin_lock_irqsave(&list_lock, flags);
246 vmdirq->irq->count--;
247 raw_spin_unlock_irqrestore(&list_lock, flags);
252 static int vmd_msi_prepare(struct irq_domain *domain, struct device *dev,
253 int nvec, msi_alloc_info_t *arg)
255 struct pci_dev *pdev = to_pci_dev(dev);
256 struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
258 if (nvec > vmd->msix_count)
259 return vmd->msix_count;
261 memset(arg, 0, sizeof(*arg));
265 static void vmd_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
270 static struct msi_domain_ops vmd_msi_domain_ops = {
271 .get_hwirq = vmd_get_hwirq,
272 .msi_init = vmd_msi_init,
273 .msi_free = vmd_msi_free,
274 .msi_prepare = vmd_msi_prepare,
275 .set_desc = vmd_set_desc,
278 static struct msi_domain_info vmd_msi_domain_info = {
279 .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
281 .ops = &vmd_msi_domain_ops,
282 .chip = &vmd_msi_controller,
285 #ifdef CONFIG_X86_DEV_DMA_OPS
287 * VMD replaces the requester ID with its own. DMA mappings for devices in a
288 * VMD domain need to be mapped for the VMD, not the device requiring
291 static struct device *to_vmd_dev(struct device *dev)
293 struct pci_dev *pdev = to_pci_dev(dev);
294 struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
296 return &vmd->dev->dev;
299 static const struct dma_map_ops *vmd_dma_ops(struct device *dev)
301 return get_dma_ops(to_vmd_dev(dev));
304 static void *vmd_alloc(struct device *dev, size_t size, dma_addr_t *addr,
305 gfp_t flag, unsigned long attrs)
307 return vmd_dma_ops(dev)->alloc(to_vmd_dev(dev), size, addr, flag,
311 static void vmd_free(struct device *dev, size_t size, void *vaddr,
312 dma_addr_t addr, unsigned long attrs)
314 return vmd_dma_ops(dev)->free(to_vmd_dev(dev), size, vaddr, addr,
318 static int vmd_mmap(struct device *dev, struct vm_area_struct *vma,
319 void *cpu_addr, dma_addr_t addr, size_t size,
322 return vmd_dma_ops(dev)->mmap(to_vmd_dev(dev), vma, cpu_addr, addr,
326 static int vmd_get_sgtable(struct device *dev, struct sg_table *sgt,
327 void *cpu_addr, dma_addr_t addr, size_t size,
330 return vmd_dma_ops(dev)->get_sgtable(to_vmd_dev(dev), sgt, cpu_addr,
334 static dma_addr_t vmd_map_page(struct device *dev, struct page *page,
335 unsigned long offset, size_t size,
336 enum dma_data_direction dir,
339 return vmd_dma_ops(dev)->map_page(to_vmd_dev(dev), page, offset, size,
343 static void vmd_unmap_page(struct device *dev, dma_addr_t addr, size_t size,
344 enum dma_data_direction dir, unsigned long attrs)
346 vmd_dma_ops(dev)->unmap_page(to_vmd_dev(dev), addr, size, dir, attrs);
349 static int vmd_map_sg(struct device *dev, struct scatterlist *sg, int nents,
350 enum dma_data_direction dir, unsigned long attrs)
352 return vmd_dma_ops(dev)->map_sg(to_vmd_dev(dev), sg, nents, dir, attrs);
355 static void vmd_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
356 enum dma_data_direction dir, unsigned long attrs)
358 vmd_dma_ops(dev)->unmap_sg(to_vmd_dev(dev), sg, nents, dir, attrs);
361 static void vmd_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
362 size_t size, enum dma_data_direction dir)
364 vmd_dma_ops(dev)->sync_single_for_cpu(to_vmd_dev(dev), addr, size, dir);
367 static void vmd_sync_single_for_device(struct device *dev, dma_addr_t addr,
368 size_t size, enum dma_data_direction dir)
370 vmd_dma_ops(dev)->sync_single_for_device(to_vmd_dev(dev), addr, size,
374 static void vmd_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
375 int nents, enum dma_data_direction dir)
377 vmd_dma_ops(dev)->sync_sg_for_cpu(to_vmd_dev(dev), sg, nents, dir);
380 static void vmd_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
381 int nents, enum dma_data_direction dir)
383 vmd_dma_ops(dev)->sync_sg_for_device(to_vmd_dev(dev), sg, nents, dir);
386 static int vmd_mapping_error(struct device *dev, dma_addr_t addr)
388 return vmd_dma_ops(dev)->mapping_error(to_vmd_dev(dev), addr);
391 static int vmd_dma_supported(struct device *dev, u64 mask)
393 return vmd_dma_ops(dev)->dma_supported(to_vmd_dev(dev), mask);
396 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
397 static u64 vmd_get_required_mask(struct device *dev)
399 return vmd_dma_ops(dev)->get_required_mask(to_vmd_dev(dev));
403 static void vmd_teardown_dma_ops(struct vmd_dev *vmd)
405 struct dma_domain *domain = &vmd->dma_domain;
407 if (get_dma_ops(&vmd->dev->dev))
408 del_dma_domain(domain);
411 #define ASSIGN_VMD_DMA_OPS(source, dest, fn) \
414 dest->fn = vmd_##fn; \
417 static void vmd_setup_dma_ops(struct vmd_dev *vmd)
419 const struct dma_map_ops *source = get_dma_ops(&vmd->dev->dev);
420 struct dma_map_ops *dest = &vmd->dma_ops;
421 struct dma_domain *domain = &vmd->dma_domain;
423 domain->domain_nr = vmd->sysdata.domain;
424 domain->dma_ops = dest;
428 ASSIGN_VMD_DMA_OPS(source, dest, alloc);
429 ASSIGN_VMD_DMA_OPS(source, dest, free);
430 ASSIGN_VMD_DMA_OPS(source, dest, mmap);
431 ASSIGN_VMD_DMA_OPS(source, dest, get_sgtable);
432 ASSIGN_VMD_DMA_OPS(source, dest, map_page);
433 ASSIGN_VMD_DMA_OPS(source, dest, unmap_page);
434 ASSIGN_VMD_DMA_OPS(source, dest, map_sg);
435 ASSIGN_VMD_DMA_OPS(source, dest, unmap_sg);
436 ASSIGN_VMD_DMA_OPS(source, dest, sync_single_for_cpu);
437 ASSIGN_VMD_DMA_OPS(source, dest, sync_single_for_device);
438 ASSIGN_VMD_DMA_OPS(source, dest, sync_sg_for_cpu);
439 ASSIGN_VMD_DMA_OPS(source, dest, sync_sg_for_device);
440 ASSIGN_VMD_DMA_OPS(source, dest, mapping_error);
441 ASSIGN_VMD_DMA_OPS(source, dest, dma_supported);
442 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
443 ASSIGN_VMD_DMA_OPS(source, dest, get_required_mask);
445 add_dma_domain(domain);
447 #undef ASSIGN_VMD_DMA_OPS
449 static void vmd_teardown_dma_ops(struct vmd_dev *vmd) {}
450 static void vmd_setup_dma_ops(struct vmd_dev *vmd) {}
453 static char __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
454 unsigned int devfn, int reg, int len)
456 char __iomem *addr = vmd->cfgbar +
457 (bus->number << 20) + (devfn << 12) + reg;
459 if ((addr - vmd->cfgbar) + len >=
460 resource_size(&vmd->dev->resource[VMD_CFGBAR]))
467 * CPU may deadlock if config space is not serialized on some versions of this
468 * hardware, so all config space access is done under a spinlock.
470 static int vmd_pci_read(struct pci_bus *bus, unsigned int devfn, int reg,
473 struct vmd_dev *vmd = vmd_from_bus(bus);
474 char __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
481 spin_lock_irqsave(&vmd->cfg_lock, flags);
484 *value = readb(addr);
487 *value = readw(addr);
490 *value = readl(addr);
496 spin_unlock_irqrestore(&vmd->cfg_lock, flags);
501 * VMD h/w converts non-posted config writes to posted memory writes. The
502 * read-back in this function forces the completion so it returns only after
503 * the config space was written, as expected.
505 static int vmd_pci_write(struct pci_bus *bus, unsigned int devfn, int reg,
508 struct vmd_dev *vmd = vmd_from_bus(bus);
509 char __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
516 spin_lock_irqsave(&vmd->cfg_lock, flags);
534 spin_unlock_irqrestore(&vmd->cfg_lock, flags);
538 static struct pci_ops vmd_ops = {
539 .read = vmd_pci_read,
540 .write = vmd_pci_write,
543 static void vmd_attach_resources(struct vmd_dev *vmd)
545 vmd->dev->resource[VMD_MEMBAR1].child = &vmd->resources[1];
546 vmd->dev->resource[VMD_MEMBAR2].child = &vmd->resources[2];
549 static void vmd_detach_resources(struct vmd_dev *vmd)
551 vmd->dev->resource[VMD_MEMBAR1].child = NULL;
552 vmd->dev->resource[VMD_MEMBAR2].child = NULL;
556 * VMD domains start at 0x10000 to not clash with ACPI _SEG domains.
557 * Per ACPI r6.0, sec 6.5.6, _SEG returns an integer, of which the lower
558 * 16 bits are the PCI Segment Group (domain) number. Other bits are
559 * currently reserved.
561 static int vmd_find_free_domain(void)
564 struct pci_bus *bus = NULL;
566 while ((bus = pci_find_next_bus(bus)) != NULL)
567 domain = max_t(int, domain, pci_domain_nr(bus));
571 static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
573 struct pci_sysdata *sd = &vmd->sysdata;
574 struct fwnode_handle *fn;
575 struct resource *res;
578 LIST_HEAD(resources);
579 resource_size_t offset[2] = {0};
580 resource_size_t membar2_offset = 0x2000, busn_start = 0;
583 * Shadow registers may exist in certain VMD device ids which allow
584 * guests to correctly assign host physical addresses to the root ports
585 * and child devices. These registers will either return the host value
586 * or 0, depending on an enable bit in the VMD device.
588 if (features & VMD_FEAT_HAS_MEMBAR_SHADOW) {
592 membar2_offset = 0x2018;
593 ret = pci_read_config_dword(vmd->dev, PCI_REG_VMLOCK, &vmlock);
594 if (ret || vmlock == ~0)
597 if (MB2_SHADOW_EN(vmlock)) {
598 void __iomem *membar2;
600 membar2 = pci_iomap(vmd->dev, VMD_MEMBAR2, 0);
603 offset[0] = vmd->dev->resource[VMD_MEMBAR1].start -
604 readq(membar2 + 0x2008);
605 offset[1] = vmd->dev->resource[VMD_MEMBAR2].start -
606 readq(membar2 + 0x2010);
607 pci_iounmap(vmd->dev, membar2);
612 * Certain VMD devices may have a root port configuration option which
613 * limits the bus range to between 0-127 or 128-255
615 if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
618 pci_read_config_dword(vmd->dev, PCI_REG_VMCAP, &vmcap);
619 pci_read_config_dword(vmd->dev, PCI_REG_VMCONFIG, &vmconfig);
620 if (BUS_RESTRICT_CAP(vmcap) &&
621 (BUS_RESTRICT_CFG(vmconfig) == 0x1))
625 res = &vmd->dev->resource[VMD_CFGBAR];
626 vmd->resources[0] = (struct resource) {
627 .name = "VMD CFGBAR",
629 .end = busn_start + (resource_size(res) >> 20) - 1,
630 .flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
634 * If the window is below 4GB, clear IORESOURCE_MEM_64 so we can
635 * put 32-bit resources in the window.
637 * There's no hardware reason why a 64-bit window *couldn't*
638 * contain a 32-bit resource, but pbus_size_mem() computes the
639 * bridge window size assuming a 64-bit window will contain no
640 * 32-bit resources. __pci_assign_resource() enforces that
641 * artificial restriction to make sure everything will fit.
643 * The only way we could use a 64-bit non-prefechable MEMBAR is
644 * if its address is <4GB so that we can convert it to a 32-bit
645 * resource. To be visible to the host OS, all VMD endpoints must
646 * be initially configured by platform BIOS, which includes setting
647 * up these resources. We can assume the device is configured
648 * according to the platform needs.
650 res = &vmd->dev->resource[VMD_MEMBAR1];
651 upper_bits = upper_32_bits(res->end);
652 flags = res->flags & ~IORESOURCE_SIZEALIGN;
654 flags &= ~IORESOURCE_MEM_64;
655 vmd->resources[1] = (struct resource) {
656 .name = "VMD MEMBAR1",
663 res = &vmd->dev->resource[VMD_MEMBAR2];
664 upper_bits = upper_32_bits(res->end);
665 flags = res->flags & ~IORESOURCE_SIZEALIGN;
667 flags &= ~IORESOURCE_MEM_64;
668 vmd->resources[2] = (struct resource) {
669 .name = "VMD MEMBAR2",
670 .start = res->start + membar2_offset,
676 sd->vmd_domain = true;
677 sd->domain = vmd_find_free_domain();
681 sd->node = pcibus_to_node(vmd->dev->bus);
683 fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
687 vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info,
689 irq_domain_free_fwnode(fn);
690 if (!vmd->irq_domain)
693 pci_add_resource(&resources, &vmd->resources[0]);
694 pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
695 pci_add_resource_offset(&resources, &vmd->resources[2], offset[1]);
697 vmd->bus = pci_create_root_bus(&vmd->dev->dev, busn_start, &vmd_ops,
700 pci_free_resource_list(&resources);
701 irq_domain_remove(vmd->irq_domain);
705 vmd_attach_resources(vmd);
706 vmd_setup_dma_ops(vmd);
707 dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
708 pci_rescan_bus(vmd->bus);
710 WARN(sysfs_create_link(&vmd->dev->dev.kobj, &vmd->bus->dev.kobj,
711 "domain"), "Can't create symlink to domain\n");
715 static irqreturn_t vmd_irq(int irq, void *data)
717 struct vmd_irq_list *irqs = data;
718 struct vmd_irq *vmdirq;
721 idx = srcu_read_lock(&irqs->srcu);
722 list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
723 generic_handle_irq(vmdirq->virq);
724 srcu_read_unlock(&irqs->srcu, idx);
729 static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
734 if (resource_size(&dev->resource[VMD_CFGBAR]) < (1 << 20))
737 vmd = devm_kzalloc(&dev->dev, sizeof(*vmd), GFP_KERNEL);
742 err = pcim_enable_device(dev);
746 vmd->cfgbar = pcim_iomap(dev, VMD_CFGBAR, 0);
751 if (dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64)) &&
752 dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)))
755 vmd->msix_count = pci_msix_vec_count(dev);
756 if (vmd->msix_count < 0)
759 vmd->msix_count = pci_alloc_irq_vectors(dev, 1, vmd->msix_count,
761 if (vmd->msix_count < 0)
762 return vmd->msix_count;
764 vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
769 for (i = 0; i < vmd->msix_count; i++) {
770 err = init_srcu_struct(&vmd->irqs[i].srcu);
774 INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
775 err = devm_request_irq(&dev->dev, pci_irq_vector(dev, i),
776 vmd_irq, IRQF_NO_THREAD,
777 "vmd", &vmd->irqs[i]);
782 spin_lock_init(&vmd->cfg_lock);
783 pci_set_drvdata(dev, vmd);
784 err = vmd_enable_domain(vmd, (unsigned long) id->driver_data);
788 dev_info(&vmd->dev->dev, "Bound to PCI domain %04x\n",
789 vmd->sysdata.domain);
793 static void vmd_cleanup_srcu(struct vmd_dev *vmd)
797 for (i = 0; i < vmd->msix_count; i++)
798 cleanup_srcu_struct(&vmd->irqs[i].srcu);
801 static void vmd_remove(struct pci_dev *dev)
803 struct vmd_dev *vmd = pci_get_drvdata(dev);
805 vmd_detach_resources(vmd);
806 sysfs_remove_link(&vmd->dev->dev.kobj, "domain");
807 pci_stop_root_bus(vmd->bus);
808 pci_remove_root_bus(vmd->bus);
809 vmd_cleanup_srcu(vmd);
810 vmd_teardown_dma_ops(vmd);
811 irq_domain_remove(vmd->irq_domain);
814 #ifdef CONFIG_PM_SLEEP
815 static int vmd_suspend(struct device *dev)
817 struct pci_dev *pdev = to_pci_dev(dev);
818 struct vmd_dev *vmd = pci_get_drvdata(pdev);
821 for (i = 0; i < vmd->msix_count; i++)
822 devm_free_irq(dev, pci_irq_vector(pdev, i), &vmd->irqs[i]);
824 pci_save_state(pdev);
828 static int vmd_resume(struct device *dev)
830 struct pci_dev *pdev = to_pci_dev(dev);
831 struct vmd_dev *vmd = pci_get_drvdata(pdev);
834 for (i = 0; i < vmd->msix_count; i++) {
835 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
836 vmd_irq, IRQF_NO_THREAD,
837 "vmd", &vmd->irqs[i]);
842 pci_restore_state(pdev);
846 static SIMPLE_DEV_PM_OPS(vmd_dev_pm_ops, vmd_suspend, vmd_resume);
848 static const struct pci_device_id vmd_ids[] = {
849 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_201D),},
850 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_28C0),
851 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW |
852 VMD_FEAT_HAS_BUS_RESTRICTIONS,},
855 MODULE_DEVICE_TABLE(pci, vmd_ids);
857 static struct pci_driver vmd_drv = {
861 .remove = vmd_remove,
863 .pm = &vmd_dev_pm_ops,
866 module_pci_driver(vmd_drv);
868 MODULE_AUTHOR("Intel Corporation");
869 MODULE_LICENSE("GPL v2");
870 MODULE_VERSION("0.6");