1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe RC driver for Synopsys DesignWare Core
5 * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
10 #include <linux/delay.h>
11 #include <linux/gpio.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/of_device.h>
16 #include <linux/of_gpio.h>
17 #include <linux/pci.h>
18 #include <linux/platform_device.h>
19 #include <linux/resource.h>
20 #include <linux/signal.h>
21 #include <linux/types.h>
22 #include <linux/regmap.h>
24 #include "pcie-designware.h"
28 struct regmap *regmap;
29 enum dw_pcie_device_mode mode;
32 struct dw_plat_pcie_of_data {
33 enum dw_pcie_device_mode mode;
36 static const struct of_device_id dw_plat_pcie_of_match[];
38 static int dw_plat_pcie_host_init(struct pcie_port *pp)
40 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
43 dw_pcie_wait_for_link(pci);
45 if (IS_ENABLED(CONFIG_PCI_MSI))
51 static void dw_plat_set_num_vectors(struct pcie_port *pp)
53 pp->num_vectors = MAX_MSI_IRQS;
56 static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
57 .host_init = dw_plat_pcie_host_init,
58 .set_num_vectors = dw_plat_set_num_vectors,
61 static int dw_plat_pcie_establish_link(struct dw_pcie *pci)
66 static const struct dw_pcie_ops dw_pcie_ops = {
67 .start_link = dw_plat_pcie_establish_link,
70 static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep)
72 struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
75 for (bar = BAR_0; bar <= BAR_5; bar++)
76 dw_pcie_ep_reset_bar(pci, bar);
79 static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
80 enum pci_epc_irq_type type,
83 struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
86 case PCI_EPC_IRQ_LEGACY:
87 dev_err(pci->dev, "EP cannot trigger legacy IRQs\n");
90 return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
92 dev_err(pci->dev, "UNKNOWN IRQ type\n");
98 static struct dw_pcie_ep_ops pcie_ep_ops = {
99 .ep_init = dw_plat_pcie_ep_init,
100 .raise_irq = dw_plat_pcie_ep_raise_irq,
103 static int dw_plat_add_pcie_port(struct dw_plat_pcie *dw_plat_pcie,
104 struct platform_device *pdev)
106 struct dw_pcie *pci = dw_plat_pcie->pci;
107 struct pcie_port *pp = &pci->pp;
108 struct device *dev = &pdev->dev;
111 pp->irq = platform_get_irq(pdev, 1);
115 if (IS_ENABLED(CONFIG_PCI_MSI)) {
116 pp->msi_irq = platform_get_irq(pdev, 0);
121 pp->root_bus_nr = -1;
122 pp->ops = &dw_plat_pcie_host_ops;
124 ret = dw_pcie_host_init(pp);
126 dev_err(dev, "Failed to initialize host\n");
133 static int dw_plat_add_pcie_ep(struct dw_plat_pcie *dw_plat_pcie,
134 struct platform_device *pdev)
137 struct dw_pcie_ep *ep;
138 struct resource *res;
139 struct device *dev = &pdev->dev;
140 struct dw_pcie *pci = dw_plat_pcie->pci;
143 ep->ops = &pcie_ep_ops;
145 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi2");
146 pci->dbi_base2 = devm_ioremap_resource(dev, res);
147 if (IS_ERR(pci->dbi_base2))
148 return PTR_ERR(pci->dbi_base2);
150 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space");
154 ep->phys_base = res->start;
155 ep->addr_size = resource_size(res);
157 ret = dw_pcie_ep_init(ep);
159 dev_err(dev, "Failed to initialize endpoint\n");
165 static int dw_plat_pcie_probe(struct platform_device *pdev)
167 struct device *dev = &pdev->dev;
168 struct dw_plat_pcie *dw_plat_pcie;
170 struct resource *res; /* Resource from DT */
172 const struct of_device_id *match;
173 const struct dw_plat_pcie_of_data *data;
174 enum dw_pcie_device_mode mode;
176 match = of_match_device(dw_plat_pcie_of_match, dev);
180 data = (struct dw_plat_pcie_of_data *)match->data;
181 mode = (enum dw_pcie_device_mode)data->mode;
183 dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
187 pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
192 pci->ops = &dw_pcie_ops;
194 dw_plat_pcie->pci = pci;
195 dw_plat_pcie->mode = mode;
197 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
199 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
201 pci->dbi_base = devm_ioremap_resource(dev, res);
202 if (IS_ERR(pci->dbi_base))
203 return PTR_ERR(pci->dbi_base);
205 platform_set_drvdata(pdev, dw_plat_pcie);
207 switch (dw_plat_pcie->mode) {
208 case DW_PCIE_RC_TYPE:
209 if (!IS_ENABLED(CONFIG_PCIE_DW_PLAT_HOST))
212 ret = dw_plat_add_pcie_port(dw_plat_pcie, pdev);
216 case DW_PCIE_EP_TYPE:
217 if (!IS_ENABLED(CONFIG_PCIE_DW_PLAT_EP))
220 ret = dw_plat_add_pcie_ep(dw_plat_pcie, pdev);
225 dev_err(dev, "INVALID device type %d\n", dw_plat_pcie->mode);
231 static const struct dw_plat_pcie_of_data dw_plat_pcie_rc_of_data = {
232 .mode = DW_PCIE_RC_TYPE,
235 static const struct dw_plat_pcie_of_data dw_plat_pcie_ep_of_data = {
236 .mode = DW_PCIE_EP_TYPE,
239 static const struct of_device_id dw_plat_pcie_of_match[] = {
241 .compatible = "snps,dw-pcie",
242 .data = &dw_plat_pcie_rc_of_data,
245 .compatible = "snps,dw-pcie-ep",
246 .data = &dw_plat_pcie_ep_of_data,
251 static struct platform_driver dw_plat_pcie_driver = {
254 .of_match_table = dw_plat_pcie_of_match,
255 .suppress_bind_attrs = true,
257 .probe = dw_plat_pcie_probe,
259 builtin_platform_driver(dw_plat_pcie_driver);