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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  prepare to run common code
4  *
5  *  Copyright (C) 2000 Andrea Arcangeli <[email protected]> SuSE
6  */
7
8 #define DISABLE_BRANCH_PROFILING
9
10 /* cpu_feature_enabled() cannot be used this early */
11 #define USE_EARLY_PGTABLE_L5
12
13 #include <linux/init.h>
14 #include <linux/linkage.h>
15 #include <linux/types.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/percpu.h>
19 #include <linux/start_kernel.h>
20 #include <linux/io.h>
21 #include <linux/memblock.h>
22 #include <linux/cc_platform.h>
23 #include <linux/pgtable.h>
24
25 #include <asm/processor.h>
26 #include <asm/proto.h>
27 #include <asm/smp.h>
28 #include <asm/setup.h>
29 #include <asm/desc.h>
30 #include <asm/tlbflush.h>
31 #include <asm/sections.h>
32 #include <asm/kdebug.h>
33 #include <asm/e820/api.h>
34 #include <asm/bios_ebda.h>
35 #include <asm/bootparam_utils.h>
36 #include <asm/microcode.h>
37 #include <asm/kasan.h>
38 #include <asm/fixmap.h>
39 #include <asm/realmode.h>
40 #include <asm/extable.h>
41 #include <asm/trapnr.h>
42 #include <asm/sev.h>
43
44 /*
45  * Manage page tables very early on.
46  */
47 extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];
48 static unsigned int __initdata next_early_pgt;
49 pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX);
50
51 #ifdef CONFIG_X86_5LEVEL
52 unsigned int __pgtable_l5_enabled __ro_after_init;
53 unsigned int pgdir_shift __ro_after_init = 39;
54 EXPORT_SYMBOL(pgdir_shift);
55 unsigned int ptrs_per_p4d __ro_after_init = 1;
56 EXPORT_SYMBOL(ptrs_per_p4d);
57 #endif
58
59 #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
60 unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4;
61 EXPORT_SYMBOL(page_offset_base);
62 unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4;
63 EXPORT_SYMBOL(vmalloc_base);
64 unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4;
65 EXPORT_SYMBOL(vmemmap_base);
66 #endif
67
68 /*
69  * GDT used on the boot CPU before switching to virtual addresses.
70  */
71 static struct desc_struct startup_gdt[GDT_ENTRIES] = {
72         [GDT_ENTRY_KERNEL32_CS]         = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff),
73         [GDT_ENTRY_KERNEL_CS]           = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff),
74         [GDT_ENTRY_KERNEL_DS]           = GDT_ENTRY_INIT(0xc093, 0, 0xfffff),
75 };
76
77 /*
78  * Address needs to be set at runtime because it references the startup_gdt
79  * while the kernel still uses a direct mapping.
80  */
81 static struct desc_ptr startup_gdt_descr = {
82         .size = sizeof(startup_gdt),
83         .address = 0,
84 };
85
86 #define __head  __section(".head.text")
87
88 static void __head *fixup_pointer(void *ptr, unsigned long physaddr)
89 {
90         return ptr - (void *)_text + (void *)physaddr;
91 }
92
93 static unsigned long __head *fixup_long(void *ptr, unsigned long physaddr)
94 {
95         return fixup_pointer(ptr, physaddr);
96 }
97
98 #ifdef CONFIG_X86_5LEVEL
99 static unsigned int __head *fixup_int(void *ptr, unsigned long physaddr)
100 {
101         return fixup_pointer(ptr, physaddr);
102 }
103
104 static bool __head check_la57_support(unsigned long physaddr)
105 {
106         /*
107          * 5-level paging is detected and enabled at kernel decompression
108          * stage. Only check if it has been enabled there.
109          */
110         if (!(native_read_cr4() & X86_CR4_LA57))
111                 return false;
112
113         *fixup_int(&__pgtable_l5_enabled, physaddr) = 1;
114         *fixup_int(&pgdir_shift, physaddr) = 48;
115         *fixup_int(&ptrs_per_p4d, physaddr) = 512;
116         *fixup_long(&page_offset_base, physaddr) = __PAGE_OFFSET_BASE_L5;
117         *fixup_long(&vmalloc_base, physaddr) = __VMALLOC_BASE_L5;
118         *fixup_long(&vmemmap_base, physaddr) = __VMEMMAP_BASE_L5;
119
120         return true;
121 }
122 #else
123 static bool __head check_la57_support(unsigned long physaddr)
124 {
125         return false;
126 }
127 #endif
128
129 static unsigned long sme_postprocess_startup(struct boot_params *bp, pmdval_t *pmd)
130 {
131         unsigned long vaddr, vaddr_end;
132         int i;
133
134         /* Encrypt the kernel and related (if SME is active) */
135         sme_encrypt_kernel(bp);
136
137         /*
138          * Clear the memory encryption mask from the .bss..decrypted section.
139          * The bss section will be memset to zero later in the initialization so
140          * there is no need to zero it after changing the memory encryption
141          * attribute.
142          */
143         if (sme_get_me_mask()) {
144                 vaddr = (unsigned long)__start_bss_decrypted;
145                 vaddr_end = (unsigned long)__end_bss_decrypted;
146                 for (; vaddr < vaddr_end; vaddr += PMD_SIZE) {
147                         i = pmd_index(vaddr);
148                         pmd[i] -= sme_get_me_mask();
149                 }
150         }
151
152         /*
153          * Return the SME encryption mask (if SME is active) to be used as a
154          * modifier for the initial pgdir entry programmed into CR3.
155          */
156         return sme_get_me_mask();
157 }
158
159 /* Code in __startup_64() can be relocated during execution, but the compiler
160  * doesn't have to generate PC-relative relocations when accessing globals from
161  * that function. Clang actually does not generate them, which leads to
162  * boot-time crashes. To work around this problem, every global pointer must
163  * be adjusted using fixup_pointer().
164  */
165 unsigned long __head __startup_64(unsigned long physaddr,
166                                   struct boot_params *bp)
167 {
168         unsigned long load_delta, *p;
169         unsigned long pgtable_flags;
170         pgdval_t *pgd;
171         p4dval_t *p4d;
172         pudval_t *pud;
173         pmdval_t *pmd, pmd_entry;
174         pteval_t *mask_ptr;
175         bool la57;
176         int i;
177         unsigned int *next_pgt_ptr;
178
179         la57 = check_la57_support(physaddr);
180
181         /* Is the address too large? */
182         if (physaddr >> MAX_PHYSMEM_BITS)
183                 for (;;);
184
185         /*
186          * Compute the delta between the address I am compiled to run at
187          * and the address I am actually running at.
188          */
189         load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map);
190
191         /* Is the address not 2M aligned? */
192         if (load_delta & ~PMD_PAGE_MASK)
193                 for (;;);
194
195         /* Activate Secure Memory Encryption (SME) if supported and enabled */
196         sme_enable(bp);
197
198         /* Include the SME encryption mask in the fixup value */
199         load_delta += sme_get_me_mask();
200
201         /* Fixup the physical addresses in the page table */
202
203         pgd = fixup_pointer(&early_top_pgt, physaddr);
204         p = pgd + pgd_index(__START_KERNEL_map);
205         if (la57)
206                 *p = (unsigned long)level4_kernel_pgt;
207         else
208                 *p = (unsigned long)level3_kernel_pgt;
209         *p += _PAGE_TABLE_NOENC - __START_KERNEL_map + load_delta;
210
211         if (la57) {
212                 p4d = fixup_pointer(&level4_kernel_pgt, physaddr);
213                 p4d[511] += load_delta;
214         }
215
216         pud = fixup_pointer(&level3_kernel_pgt, physaddr);
217         pud[510] += load_delta;
218         pud[511] += load_delta;
219
220         pmd = fixup_pointer(level2_fixmap_pgt, physaddr);
221         for (i = FIXMAP_PMD_TOP; i > FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--)
222                 pmd[i] += load_delta;
223
224         /*
225          * Set up the identity mapping for the switchover.  These
226          * entries should *NOT* have the global bit set!  This also
227          * creates a bunch of nonsense entries but that is fine --
228          * it avoids problems around wraparound.
229          */
230
231         next_pgt_ptr = fixup_pointer(&next_early_pgt, physaddr);
232         pud = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
233         pmd = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
234
235         pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();
236
237         if (la57) {
238                 p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++],
239                                     physaddr);
240
241                 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
242                 pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;
243                 pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;
244
245                 i = physaddr >> P4D_SHIFT;
246                 p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
247                 p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
248         } else {
249                 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
250                 pgd[i + 0] = (pgdval_t)pud + pgtable_flags;
251                 pgd[i + 1] = (pgdval_t)pud + pgtable_flags;
252         }
253
254         i = physaddr >> PUD_SHIFT;
255         pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
256         pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
257
258         pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL;
259         /* Filter out unsupported __PAGE_KERNEL_* bits: */
260         mask_ptr = fixup_pointer(&__supported_pte_mask, physaddr);
261         pmd_entry &= *mask_ptr;
262         pmd_entry += sme_get_me_mask();
263         pmd_entry +=  physaddr;
264
265         for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) {
266                 int idx = i + (physaddr >> PMD_SHIFT);
267
268                 pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;
269         }
270
271         /*
272          * Fixup the kernel text+data virtual addresses. Note that
273          * we might write invalid pmds, when the kernel is relocated
274          * cleanup_highmap() fixes this up along with the mappings
275          * beyond _end.
276          *
277          * Only the region occupied by the kernel image has so far
278          * been checked against the table of usable memory regions
279          * provided by the firmware, so invalidate pages outside that
280          * region. A page table entry that maps to a reserved area of
281          * memory would allow processor speculation into that area,
282          * and on some hardware (particularly the UV platform) even
283          * speculative access to some reserved areas is caught as an
284          * error, causing the BIOS to halt the system.
285          */
286
287         pmd = fixup_pointer(level2_kernel_pgt, physaddr);
288
289         /* invalidate pages before the kernel image */
290         for (i = 0; i < pmd_index((unsigned long)_text); i++)
291                 pmd[i] &= ~_PAGE_PRESENT;
292
293         /* fixup pages that are part of the kernel image */
294         for (; i <= pmd_index((unsigned long)_end); i++)
295                 if (pmd[i] & _PAGE_PRESENT)
296                         pmd[i] += load_delta;
297
298         /* invalidate pages after the kernel image */
299         for (; i < PTRS_PER_PMD; i++)
300                 pmd[i] &= ~_PAGE_PRESENT;
301
302         /*
303          * Fixup phys_base - remove the memory encryption mask to obtain
304          * the true physical address.
305          */
306         *fixup_long(&phys_base, physaddr) += load_delta - sme_get_me_mask();
307
308         return sme_postprocess_startup(bp, pmd);
309 }
310
311 unsigned long __startup_secondary_64(void)
312 {
313         /*
314          * Return the SME encryption mask (if SME is active) to be used as a
315          * modifier for the initial pgdir entry programmed into CR3.
316          */
317         return sme_get_me_mask();
318 }
319
320 /* Wipe all early page tables except for the kernel symbol map */
321 static void __init reset_early_page_tables(void)
322 {
323         memset(early_top_pgt, 0, sizeof(pgd_t)*(PTRS_PER_PGD-1));
324         next_early_pgt = 0;
325         write_cr3(__sme_pa_nodebug(early_top_pgt));
326 }
327
328 /* Create a new PMD entry */
329 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd)
330 {
331         unsigned long physaddr = address - __PAGE_OFFSET;
332         pgdval_t pgd, *pgd_p;
333         p4dval_t p4d, *p4d_p;
334         pudval_t pud, *pud_p;
335         pmdval_t *pmd_p;
336
337         /* Invalid address or early pgt is done ?  */
338         if (physaddr >= MAXMEM || read_cr3_pa() != __pa_nodebug(early_top_pgt))
339                 return false;
340
341 again:
342         pgd_p = &early_top_pgt[pgd_index(address)].pgd;
343         pgd = *pgd_p;
344
345         /*
346          * The use of __START_KERNEL_map rather than __PAGE_OFFSET here is
347          * critical -- __PAGE_OFFSET would point us back into the dynamic
348          * range and we might end up looping forever...
349          */
350         if (!pgtable_l5_enabled())
351                 p4d_p = pgd_p;
352         else if (pgd)
353                 p4d_p = (p4dval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
354         else {
355                 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
356                         reset_early_page_tables();
357                         goto again;
358                 }
359
360                 p4d_p = (p4dval_t *)early_dynamic_pgts[next_early_pgt++];
361                 memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D);
362                 *pgd_p = (pgdval_t)p4d_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
363         }
364         p4d_p += p4d_index(address);
365         p4d = *p4d_p;
366
367         if (p4d)
368                 pud_p = (pudval_t *)((p4d & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
369         else {
370                 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
371                         reset_early_page_tables();
372                         goto again;
373                 }
374
375                 pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++];
376                 memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
377                 *p4d_p = (p4dval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
378         }
379         pud_p += pud_index(address);
380         pud = *pud_p;
381
382         if (pud)
383                 pmd_p = (pmdval_t *)((pud & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
384         else {
385                 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
386                         reset_early_page_tables();
387                         goto again;
388                 }
389
390                 pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++];
391                 memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD);
392                 *pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
393         }
394         pmd_p[pmd_index(address)] = pmd;
395
396         return true;
397 }
398
399 static bool __init early_make_pgtable(unsigned long address)
400 {
401         unsigned long physaddr = address - __PAGE_OFFSET;
402         pmdval_t pmd;
403
404         pmd = (physaddr & PMD_MASK) + early_pmd_flags;
405
406         return __early_make_pgtable(address, pmd);
407 }
408
409 void __init do_early_exception(struct pt_regs *regs, int trapnr)
410 {
411         if (trapnr == X86_TRAP_PF &&
412             early_make_pgtable(native_read_cr2()))
413                 return;
414
415         if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) &&
416             trapnr == X86_TRAP_VC && handle_vc_boot_ghcb(regs))
417                 return;
418
419         early_fixup_exception(regs, trapnr);
420 }
421
422 /* Don't add a printk in there. printk relies on the PDA which is not initialized 
423    yet. */
424 static void __init clear_bss(void)
425 {
426         memset(__bss_start, 0,
427                (unsigned long) __bss_stop - (unsigned long) __bss_start);
428 }
429
430 static unsigned long get_cmd_line_ptr(void)
431 {
432         unsigned long cmd_line_ptr = boot_params.hdr.cmd_line_ptr;
433
434         cmd_line_ptr |= (u64)boot_params.ext_cmd_line_ptr << 32;
435
436         return cmd_line_ptr;
437 }
438
439 static void __init copy_bootdata(char *real_mode_data)
440 {
441         char * command_line;
442         unsigned long cmd_line_ptr;
443
444         /*
445          * If SME is active, this will create decrypted mappings of the
446          * boot data in advance of the copy operations.
447          */
448         sme_map_bootdata(real_mode_data);
449
450         memcpy(&boot_params, real_mode_data, sizeof(boot_params));
451         sanitize_boot_params(&boot_params);
452         cmd_line_ptr = get_cmd_line_ptr();
453         if (cmd_line_ptr) {
454                 command_line = __va(cmd_line_ptr);
455                 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
456         }
457
458         /*
459          * The old boot data is no longer needed and won't be reserved,
460          * freeing up that memory for use by the system. If SME is active,
461          * we need to remove the mappings that were created so that the
462          * memory doesn't remain mapped as decrypted.
463          */
464         sme_unmap_bootdata(real_mode_data);
465 }
466
467 asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
468 {
469         /*
470          * Build-time sanity checks on the kernel image and module
471          * area mappings. (these are purely build-time and produce no code)
472          */
473         BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map);
474         BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE);
475         BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
476         BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0);
477         BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
478         BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
479         MAYBE_BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
480                                 (__START_KERNEL & PGDIR_MASK)));
481         BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
482
483         cr4_init_shadow();
484
485         /* Kill off the identity-map trampoline */
486         reset_early_page_tables();
487
488         clear_bss();
489
490         /*
491          * This needs to happen *before* kasan_early_init() because latter maps stuff
492          * into that page.
493          */
494         clear_page(init_top_pgt);
495
496         /*
497          * SME support may update early_pmd_flags to include the memory
498          * encryption mask, so it needs to be called before anything
499          * that may generate a page fault.
500          */
501         sme_early_init();
502
503         kasan_early_init();
504
505         /*
506          * Flush global TLB entries which could be left over from the trampoline page
507          * table.
508          *
509          * This needs to happen *after* kasan_early_init() as KASAN-enabled .configs
510          * instrument native_write_cr4() so KASAN must be initialized for that
511          * instrumentation to work.
512          */
513         __native_tlb_flush_global(this_cpu_read(cpu_tlbstate.cr4));
514
515         idt_setup_early_handler();
516
517         copy_bootdata(__va(real_mode_data));
518
519         /*
520          * Load microcode early on BSP.
521          */
522         load_ucode_bsp();
523
524         /* set init_top_pgt kernel high mapping*/
525         init_top_pgt[511] = early_top_pgt[511];
526
527         x86_64_start_reservations(real_mode_data);
528 }
529
530 void __init x86_64_start_reservations(char *real_mode_data)
531 {
532         /* version is always not zero if it is copied */
533         if (!boot_params.hdr.version)
534                 copy_bootdata(__va(real_mode_data));
535
536         x86_early_init_platform_quirks();
537
538         switch (boot_params.hdr.hardware_subarch) {
539         case X86_SUBARCH_INTEL_MID:
540                 x86_intel_mid_early_setup();
541                 break;
542         default:
543                 break;
544         }
545
546         start_kernel();
547 }
548
549 /*
550  * Data structures and code used for IDT setup in head_64.S. The bringup-IDT is
551  * used until the idt_table takes over. On the boot CPU this happens in
552  * x86_64_start_kernel(), on secondary CPUs in start_secondary(). In both cases
553  * this happens in the functions called from head_64.S.
554  *
555  * The idt_table can't be used that early because all the code modifying it is
556  * in idt.c and can be instrumented by tracing or KASAN, which both don't work
557  * during early CPU bringup. Also the idt_table has the runtime vectors
558  * configured which require certain CPU state to be setup already (like TSS),
559  * which also hasn't happened yet in early CPU bringup.
560  */
561 static gate_desc bringup_idt_table[NUM_EXCEPTION_VECTORS] __page_aligned_data;
562
563 static struct desc_ptr bringup_idt_descr = {
564         .size           = (NUM_EXCEPTION_VECTORS * sizeof(gate_desc)) - 1,
565         .address        = 0, /* Set at runtime */
566 };
567
568 static void set_bringup_idt_handler(gate_desc *idt, int n, void *handler)
569 {
570 #ifdef CONFIG_AMD_MEM_ENCRYPT
571         struct idt_data data;
572         gate_desc desc;
573
574         init_idt_data(&data, n, handler);
575         idt_init_desc(&desc, &data);
576         native_write_idt_entry(idt, n, &desc);
577 #endif
578 }
579
580 /* This runs while still in the direct mapping */
581 static void startup_64_load_idt(unsigned long physbase)
582 {
583         struct desc_ptr *desc = fixup_pointer(&bringup_idt_descr, physbase);
584         gate_desc *idt = fixup_pointer(bringup_idt_table, physbase);
585
586
587         if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) {
588                 void *handler;
589
590                 /* VMM Communication Exception */
591                 handler = fixup_pointer(vc_no_ghcb, physbase);
592                 set_bringup_idt_handler(idt, X86_TRAP_VC, handler);
593         }
594
595         desc->address = (unsigned long)idt;
596         native_load_idt(desc);
597 }
598
599 /* This is used when running on kernel addresses */
600 void early_setup_idt(void)
601 {
602         /* VMM Communication Exception */
603         if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
604                 set_bringup_idt_handler(bringup_idt_table, X86_TRAP_VC, vc_boot_ghcb);
605
606         bringup_idt_descr.address = (unsigned long)bringup_idt_table;
607         native_load_idt(&bringup_idt_descr);
608 }
609
610 /*
611  * Setup boot CPU state needed before kernel switches to virtual addresses.
612  */
613 void __head startup_64_setup_env(unsigned long physbase)
614 {
615         /* Load GDT */
616         startup_gdt_descr.address = (unsigned long)fixup_pointer(startup_gdt, physbase);
617         native_load_gdt(&startup_gdt_descr);
618
619         /* New GDT is live - reload data segment registers */
620         asm volatile("movl %%eax, %%ds\n"
621                      "movl %%eax, %%ss\n"
622                      "movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory");
623
624         startup_64_load_idt(physbase);
625 }
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