5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * Gated clock implementation
12 #include <linux/clk-provider.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/string.h>
21 * DOC: basic gatable clock which can gate and ungate it's ouput
23 * Traits of this clock:
24 * prepare - clk_(un)prepare only ensures parent is (un)prepared
25 * enable - clk_enable and clk_disable are functional & control gating
26 * rate - inherits rate from parent. No clk_set_rate support
27 * parent - fixed parent. No clk_set_parent support
36 unsigned int *share_count;
39 #define to_clk_gate2(_hw) container_of(_hw, struct clk_gate2, hw)
41 static int clk_gate2_enable(struct clk_hw *hw)
43 struct clk_gate2 *gate = to_clk_gate2(hw);
45 unsigned long flags = 0;
47 spin_lock_irqsave(gate->lock, flags);
49 if (gate->share_count && (*gate->share_count)++ > 0)
52 reg = readl(gate->reg);
53 reg |= 3 << gate->bit_idx;
54 writel(reg, gate->reg);
57 spin_unlock_irqrestore(gate->lock, flags);
62 static void clk_gate2_disable(struct clk_hw *hw)
64 struct clk_gate2 *gate = to_clk_gate2(hw);
66 unsigned long flags = 0;
68 spin_lock_irqsave(gate->lock, flags);
70 if (gate->share_count) {
71 if (WARN_ON(*gate->share_count == 0))
73 else if (--(*gate->share_count) > 0)
77 reg = readl(gate->reg);
78 reg &= ~(3 << gate->bit_idx);
79 writel(reg, gate->reg);
82 spin_unlock_irqrestore(gate->lock, flags);
85 static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx)
89 if (((val >> bit_idx) & 1) == 1)
95 static int clk_gate2_is_enabled(struct clk_hw *hw)
97 struct clk_gate2 *gate = to_clk_gate2(hw);
99 return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
102 static void clk_gate2_disable_unused(struct clk_hw *hw)
104 struct clk_gate2 *gate = to_clk_gate2(hw);
105 unsigned long flags = 0;
108 spin_lock_irqsave(gate->lock, flags);
110 if (!gate->share_count || *gate->share_count == 0) {
111 reg = readl(gate->reg);
112 reg &= ~(3 << gate->bit_idx);
113 writel(reg, gate->reg);
116 spin_unlock_irqrestore(gate->lock, flags);
119 static struct clk_ops clk_gate2_ops = {
120 .enable = clk_gate2_enable,
121 .disable = clk_gate2_disable,
122 .disable_unused = clk_gate2_disable_unused,
123 .is_enabled = clk_gate2_is_enabled,
126 struct clk *clk_register_gate2(struct device *dev, const char *name,
127 const char *parent_name, unsigned long flags,
128 void __iomem *reg, u8 bit_idx,
129 u8 clk_gate2_flags, spinlock_t *lock,
130 unsigned int *share_count)
132 struct clk_gate2 *gate;
134 struct clk_init_data init;
136 gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
138 return ERR_PTR(-ENOMEM);
140 /* struct clk_gate2 assignments */
142 gate->bit_idx = bit_idx;
143 gate->flags = clk_gate2_flags;
145 gate->share_count = share_count;
148 init.ops = &clk_gate2_ops;
150 init.parent_names = parent_name ? &parent_name : NULL;
151 init.num_parents = parent_name ? 1 : 0;
153 gate->hw.init = &init;
155 clk = clk_register(dev, &gate->hw);