2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
31 #include <linux/types.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-algo-bit.h>
36 #include <drm/drm_connector.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/drm_mode.h>
40 #include <drm/drm_framebuffer.h>
41 #include <drm/drm_fb_helper.h>
43 #define DRIVER_AUTHOR "Dave Airlie"
45 #define DRIVER_NAME "ast"
46 #define DRIVER_DESC "AST"
47 #define DRIVER_DATE "20120228"
49 #define DRIVER_MAJOR 0
50 #define DRIVER_MINOR 1
51 #define DRIVER_PATCHLEVEL 0
53 #define PCI_CHIP_AST2000 0x2000
54 #define PCI_CHIP_AST2100 0x2010
75 #define AST_DRAM_512Mx16 0
76 #define AST_DRAM_1Gx16 1
77 #define AST_DRAM_512Mx32 2
78 #define AST_DRAM_1Gx32 3
79 #define AST_DRAM_2Gx16 6
80 #define AST_DRAM_4Gx16 7
81 #define AST_DRAM_8Gx16 8
84 #define AST_MAX_HWC_WIDTH 64
85 #define AST_MAX_HWC_HEIGHT 64
87 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH * AST_MAX_HWC_HEIGHT * 2)
88 #define AST_HWC_SIGNATURE_SIZE 32
90 #define AST_DEFAULT_HWC_NUM 2
92 /* define for signature structure */
93 #define AST_HWC_SIGNATURE_CHECKSUM 0x00
94 #define AST_HWC_SIGNATURE_SizeX 0x04
95 #define AST_HWC_SIGNATURE_SizeY 0x08
96 #define AST_HWC_SIGNATURE_X 0x0C
97 #define AST_HWC_SIGNATURE_Y 0x10
98 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14
99 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18
103 struct drm_device *dev;
106 void __iomem *ioregs;
110 uint32_t dram_bus_width;
117 struct drm_gem_vram_object *gbo[AST_DEFAULT_HWC_NUM];
118 void __iomem *vaddr[AST_DEFAULT_HWC_NUM];
119 unsigned int next_index;
122 struct drm_encoder encoder;
123 struct drm_plane primary_plane;
124 struct drm_plane cursor_plane;
126 bool support_wide_screen;
133 enum ast_tx_chip tx_chip_type;
136 const struct firmware *dp501_fw; /* dp501 fw */
139 static inline struct ast_private *to_ast_private(struct drm_device *dev)
141 return dev->dev_private;
144 int ast_driver_load(struct drm_device *dev, unsigned long flags);
145 void ast_driver_unload(struct drm_device *dev);
147 #define AST_IO_AR_PORT_WRITE (0x40)
148 #define AST_IO_MISC_PORT_WRITE (0x42)
149 #define AST_IO_VGA_ENABLE_PORT (0x43)
150 #define AST_IO_SEQ_PORT (0x44)
151 #define AST_IO_DAC_INDEX_READ (0x47)
152 #define AST_IO_DAC_INDEX_WRITE (0x48)
153 #define AST_IO_DAC_DATA (0x49)
154 #define AST_IO_GR_PORT (0x4E)
155 #define AST_IO_CRTC_PORT (0x54)
156 #define AST_IO_INPUT_STATUS1_READ (0x5A)
157 #define AST_IO_MISC_PORT_READ (0x4C)
159 #define AST_IO_MM_OFFSET (0x380)
161 #define __ast_read(x) \
162 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
164 val = ioread##x(ast->regs + reg); \
172 #define __ast_io_read(x) \
173 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \
175 val = ioread##x(ast->ioregs + reg); \
183 #define __ast_write(x) \
184 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\
185 iowrite##x(val, ast->regs + reg);\
192 #define __ast_io_write(x) \
193 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\
194 iowrite##x(val, ast->ioregs + reg);\
199 #undef __ast_io_write
201 static inline void ast_set_index_reg(struct ast_private *ast,
202 uint32_t base, uint8_t index,
205 ast_io_write16(ast, base, ((u16)val << 8) | index);
208 void ast_set_index_reg_mask(struct ast_private *ast,
209 uint32_t base, uint8_t index,
210 uint8_t mask, uint8_t val);
211 uint8_t ast_get_index_reg(struct ast_private *ast,
212 uint32_t base, uint8_t index);
213 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
214 uint32_t base, uint8_t index, uint8_t mask);
216 static inline void ast_open_key(struct ast_private *ast)
218 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8);
221 #define AST_VIDMEM_SIZE_8M 0x00800000
222 #define AST_VIDMEM_SIZE_16M 0x01000000
223 #define AST_VIDMEM_SIZE_32M 0x02000000
224 #define AST_VIDMEM_SIZE_64M 0x04000000
225 #define AST_VIDMEM_SIZE_128M 0x08000000
227 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
229 struct ast_i2c_chan {
230 struct i2c_adapter adapter;
231 struct drm_device *dev;
232 struct i2c_algo_bit_data bit;
235 struct ast_connector {
236 struct drm_connector base;
237 struct ast_i2c_chan *i2c;
240 #define to_ast_connector(x) container_of(x, struct ast_connector, base)
242 struct ast_vbios_stdtable {
250 struct ast_vbios_enhtable {
262 u32 refresh_rate_index;
266 struct ast_vbios_dclk_info {
272 struct ast_vbios_mode_info {
273 const struct ast_vbios_stdtable *std_table;
274 const struct ast_vbios_enhtable *enh_table;
277 struct ast_crtc_state {
278 struct drm_crtc_state base;
280 /* Last known format of primary plane */
281 const struct drm_format_info *format;
283 struct ast_vbios_mode_info vbios_mode_info;
286 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base)
288 int ast_mode_config_init(struct ast_private *ast);
290 #define AST_MM_ALIGN_SHIFT 4
291 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
293 int ast_mm_init(struct ast_private *ast);
296 void ast_enable_vga(struct drm_device *dev);
297 void ast_enable_mmio(struct drm_device *dev);
298 bool ast_is_vga_enabled(struct drm_device *dev);
299 void ast_post_gpu(struct drm_device *dev);
300 u32 ast_mindwm(struct ast_private *ast, u32 r);
301 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v);
303 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode);
304 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size);
305 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata);
306 u8 ast_get_dp501_max_clk(struct drm_device *dev);
307 void ast_init_3rdtx(struct drm_device *dev);
308 void ast_release_firmware(struct drm_device *dev);
311 int ast_cursor_init(struct ast_private *ast);
312 int ast_cursor_blit(struct ast_private *ast, struct drm_framebuffer *fb);
313 void ast_cursor_page_flip(struct ast_private *ast);
314 void ast_cursor_show(struct ast_private *ast, int x, int y,
315 unsigned int offset_x, unsigned int offset_y);
316 void ast_cursor_hide(struct ast_private *ast);