2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include <linux/kthread.h>
26 #include <uapi/linux/sched/types.h>
30 static unsigned int __intel_breadcrumbs_wakeup(struct intel_breadcrumbs *b)
32 struct intel_wait *wait;
33 unsigned int result = 0;
35 lockdep_assert_held(&b->irq_lock);
39 result = ENGINE_WAKEUP_WAITER;
40 if (wake_up_process(wait->tsk))
41 result |= ENGINE_WAKEUP_ASLEEP;
47 unsigned int intel_engine_wakeup(struct intel_engine_cs *engine)
49 struct intel_breadcrumbs *b = &engine->breadcrumbs;
53 spin_lock_irqsave(&b->irq_lock, flags);
54 result = __intel_breadcrumbs_wakeup(b);
55 spin_unlock_irqrestore(&b->irq_lock, flags);
60 static unsigned long wait_timeout(void)
62 return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
65 static noinline void missed_breadcrumb(struct intel_engine_cs *engine)
67 DRM_DEBUG_DRIVER("%s missed breadcrumb at %pS, irq posted? %s, current seqno=%x, last=%x\n",
68 engine->name, __builtin_return_address(0),
69 yesno(test_bit(ENGINE_IRQ_BREADCRUMB,
70 &engine->irq_posted)),
71 intel_engine_get_seqno(engine),
72 intel_engine_last_submit(engine));
74 set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
77 static void intel_breadcrumbs_hangcheck(struct timer_list *t)
79 struct intel_engine_cs *engine = from_timer(engine, t,
80 breadcrumbs.hangcheck);
81 struct intel_breadcrumbs *b = &engine->breadcrumbs;
86 if (b->hangcheck_interrupts != atomic_read(&engine->irq_count)) {
87 b->hangcheck_interrupts = atomic_read(&engine->irq_count);
88 mod_timer(&b->hangcheck, wait_timeout());
92 /* We keep the hangcheck timer alive until we disarm the irq, even
93 * if there are no waiters at present.
95 * If the waiter was currently running, assume it hasn't had a chance
96 * to process the pending interrupt (e.g, low priority task on a loaded
97 * system) and wait until it sleeps before declaring a missed interrupt.
99 * If the waiter was asleep (and not even pending a wakeup), then we
100 * must have missed an interrupt as the GPU has stopped advancing
101 * but we still have a waiter. Assuming all batches complete within
102 * DRM_I915_HANGCHECK_JIFFIES [1.5s]!
104 if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP) {
105 missed_breadcrumb(engine);
106 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
108 mod_timer(&b->hangcheck, wait_timeout());
112 static void intel_breadcrumbs_fake_irq(struct timer_list *t)
114 struct intel_engine_cs *engine = from_timer(engine, t,
115 breadcrumbs.fake_irq);
116 struct intel_breadcrumbs *b = &engine->breadcrumbs;
118 /* The timer persists in case we cannot enable interrupts,
119 * or if we have previously seen seqno/interrupt incoherency
120 * ("missed interrupt" syndrome, better known as a "missed breadcrumb").
121 * Here the worker will wake up every jiffie in order to kick the
122 * oldest waiter to do the coherent seqno check.
125 spin_lock_irq(&b->irq_lock);
126 if (!__intel_breadcrumbs_wakeup(b))
127 __intel_engine_disarm_breadcrumbs(engine);
128 spin_unlock_irq(&b->irq_lock);
132 mod_timer(&b->fake_irq, jiffies + 1);
134 /* Ensure that even if the GPU hangs, we get woken up.
136 * However, note that if no one is waiting, we never notice
137 * a gpu hang. Eventually, we will have to wait for a resource
138 * held by the GPU and so trigger a hangcheck. In the most
139 * pathological case, this will be upon memory starvation! To
140 * prevent this, we also queue the hangcheck from the retire
143 i915_queue_hangcheck(engine->i915);
146 static void irq_enable(struct intel_engine_cs *engine)
148 /* Enabling the IRQ may miss the generation of the interrupt, but
149 * we still need to force the barrier before reading the seqno,
152 set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
154 /* Caller disables interrupts */
155 spin_lock(&engine->i915->irq_lock);
156 engine->irq_enable(engine);
157 spin_unlock(&engine->i915->irq_lock);
160 static void irq_disable(struct intel_engine_cs *engine)
162 /* Caller disables interrupts */
163 spin_lock(&engine->i915->irq_lock);
164 engine->irq_disable(engine);
165 spin_unlock(&engine->i915->irq_lock);
168 void __intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
170 struct intel_breadcrumbs *b = &engine->breadcrumbs;
172 lockdep_assert_held(&b->irq_lock);
173 GEM_BUG_ON(b->irq_wait);
175 if (b->irq_enabled) {
177 b->irq_enabled = false;
180 b->irq_armed = false;
183 void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
185 struct intel_breadcrumbs *b = &engine->breadcrumbs;
186 struct intel_wait *wait, *n, *first;
191 /* We only disarm the irq when we are idle (all requests completed),
192 * so if the bottom-half remains asleep, it missed the request
196 spin_lock_irq(&b->rb_lock);
198 spin_lock(&b->irq_lock);
199 first = fetch_and_zero(&b->irq_wait);
200 __intel_engine_disarm_breadcrumbs(engine);
201 spin_unlock(&b->irq_lock);
203 rbtree_postorder_for_each_entry_safe(wait, n, &b->waiters, node) {
204 RB_CLEAR_NODE(&wait->node);
205 if (wake_up_process(wait->tsk) && wait == first)
206 missed_breadcrumb(engine);
208 b->waiters = RB_ROOT;
210 spin_unlock_irq(&b->rb_lock);
213 static bool use_fake_irq(const struct intel_breadcrumbs *b)
215 const struct intel_engine_cs *engine =
216 container_of(b, struct intel_engine_cs, breadcrumbs);
218 if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
221 /* Only start with the heavy weight fake irq timer if we have not
222 * seen any interrupts since enabling it the first time. If the
223 * interrupts are still arriving, it means we made a mistake in our
224 * engine->seqno_barrier(), a timing error that should be transient
225 * and unlikely to reoccur.
227 return atomic_read(&engine->irq_count) == b->hangcheck_interrupts;
230 static void enable_fake_irq(struct intel_breadcrumbs *b)
232 /* Ensure we never sleep indefinitely */
233 if (!b->irq_enabled || use_fake_irq(b))
234 mod_timer(&b->fake_irq, jiffies + 1);
236 mod_timer(&b->hangcheck, wait_timeout());
239 static bool __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
241 struct intel_engine_cs *engine =
242 container_of(b, struct intel_engine_cs, breadcrumbs);
243 struct drm_i915_private *i915 = engine->i915;
245 lockdep_assert_held(&b->irq_lock);
249 /* The breadcrumb irq will be disarmed on the interrupt after the
250 * waiters are signaled. This gives us a single interrupt window in
251 * which we can add a new waiter and avoid the cost of re-enabling
255 GEM_BUG_ON(b->irq_enabled);
257 if (I915_SELFTEST_ONLY(b->mock)) {
258 /* For our mock objects we want to avoid interaction
259 * with the real hardware (which is not set up). So
260 * we simply pretend we have enabled the powerwell
261 * and the irq, and leave it up to the mock
262 * implementation to call intel_engine_wakeup()
263 * itself when it wants to simulate a user interrupt,
268 /* Since we are waiting on a request, the GPU should be busy
269 * and should have its own rpm reference. This is tracked
270 * by i915->gt.awake, we can forgo holding our own wakref
271 * for the interrupt as before i915->gt.awake is released (when
272 * the driver is idle) we disarm the breadcrumbs.
275 /* No interrupts? Kick the waiter every jiffie! */
276 if (intel_irqs_enabled(i915)) {
277 if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
279 b->irq_enabled = true;
286 static inline struct intel_wait *to_wait(struct rb_node *node)
288 return rb_entry(node, struct intel_wait, node);
291 static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
292 struct intel_wait *wait)
294 lockdep_assert_held(&b->rb_lock);
295 GEM_BUG_ON(b->irq_wait == wait);
297 /* This request is completed, so remove it from the tree, mark it as
298 * complete, and *then* wake up the associated task. N.B. when the
299 * task wakes up, it will find the empty rb_node, discern that it
300 * has already been removed from the tree and skip the serialisation
301 * of the b->rb_lock and b->irq_lock. This means that the destruction
302 * of the intel_wait is not serialised with the interrupt handler
303 * by the waiter - it must instead be serialised by the caller.
305 rb_erase(&wait->node, &b->waiters);
306 RB_CLEAR_NODE(&wait->node);
308 wake_up_process(wait->tsk); /* implicit smp_wmb() */
311 static inline void __intel_breadcrumbs_next(struct intel_engine_cs *engine,
312 struct rb_node *next)
314 struct intel_breadcrumbs *b = &engine->breadcrumbs;
316 spin_lock(&b->irq_lock);
317 GEM_BUG_ON(!b->irq_armed);
318 GEM_BUG_ON(!b->irq_wait);
319 b->irq_wait = to_wait(next);
320 spin_unlock(&b->irq_lock);
322 /* We always wake up the next waiter that takes over as the bottom-half
323 * as we may delegate not only the irq-seqno barrier to the next waiter
324 * but also the task of waking up concurrent waiters.
327 wake_up_process(to_wait(next)->tsk);
330 static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
331 struct intel_wait *wait)
333 struct intel_breadcrumbs *b = &engine->breadcrumbs;
334 struct rb_node **p, *parent, *completed;
338 /* Insert the request into the retirement ordered list
339 * of waiters by walking the rbtree. If we are the oldest
340 * seqno in the tree (the first to be retired), then
341 * set ourselves as the bottom-half.
343 * As we descend the tree, prune completed branches since we hold the
344 * spinlock we know that the first_waiter must be delayed and can
345 * reduce some of the sequential wake up latency if we take action
346 * ourselves and wake up the completed tasks in parallel. Also, by
347 * removing stale elements in the tree, we may be able to reduce the
348 * ping-pong between the old bottom-half and ourselves as first-waiter.
354 seqno = intel_engine_get_seqno(engine);
356 /* If the request completed before we managed to grab the spinlock,
357 * return now before adding ourselves to the rbtree. We let the
358 * current bottom-half handle any pending wakeups and instead
359 * try and get out of the way quickly.
361 if (i915_seqno_passed(seqno, wait->seqno)) {
362 RB_CLEAR_NODE(&wait->node);
366 p = &b->waiters.rb_node;
369 if (wait->seqno == to_wait(parent)->seqno) {
370 /* We have multiple waiters on the same seqno, select
371 * the highest priority task (that with the smallest
372 * task->prio) to serve as the bottom-half for this
375 if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
376 p = &parent->rb_right;
379 p = &parent->rb_left;
381 } else if (i915_seqno_passed(wait->seqno,
382 to_wait(parent)->seqno)) {
383 p = &parent->rb_right;
384 if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
389 p = &parent->rb_left;
392 rb_link_node(&wait->node, parent, p);
393 rb_insert_color(&wait->node, &b->waiters);
396 spin_lock(&b->irq_lock);
398 /* After assigning ourselves as the new bottom-half, we must
399 * perform a cursory check to prevent a missed interrupt.
400 * Either we miss the interrupt whilst programming the hardware,
401 * or if there was a previous waiter (for a later seqno) they
402 * may be woken instead of us (due to the inherent race
403 * in the unlocked read of b->irq_seqno_bh in the irq handler)
404 * and so we miss the wake up.
406 armed = __intel_breadcrumbs_enable_irq(b);
407 spin_unlock(&b->irq_lock);
411 /* Advance the bottom-half (b->irq_wait) before we wake up
412 * the waiters who may scribble over their intel_wait
413 * just as the interrupt handler is dereferencing it via
417 struct rb_node *next = rb_next(completed);
418 GEM_BUG_ON(next == &wait->node);
419 __intel_breadcrumbs_next(engine, next);
423 struct intel_wait *crumb = to_wait(completed);
424 completed = rb_prev(completed);
425 __intel_breadcrumbs_finish(b, crumb);
429 GEM_BUG_ON(!b->irq_wait);
430 GEM_BUG_ON(!b->irq_armed);
431 GEM_BUG_ON(rb_first(&b->waiters) != &b->irq_wait->node);
436 bool intel_engine_add_wait(struct intel_engine_cs *engine,
437 struct intel_wait *wait)
439 struct intel_breadcrumbs *b = &engine->breadcrumbs;
442 spin_lock_irq(&b->rb_lock);
443 armed = __intel_engine_add_wait(engine, wait);
444 spin_unlock_irq(&b->rb_lock);
448 /* Make the caller recheck if its request has already started. */
449 return i915_seqno_passed(intel_engine_get_seqno(engine),
453 static inline bool chain_wakeup(struct rb_node *rb, int priority)
455 return rb && to_wait(rb)->tsk->prio <= priority;
458 static inline int wakeup_priority(struct intel_breadcrumbs *b,
459 struct task_struct *tsk)
461 if (tsk == b->signaler)
467 static void __intel_engine_remove_wait(struct intel_engine_cs *engine,
468 struct intel_wait *wait)
470 struct intel_breadcrumbs *b = &engine->breadcrumbs;
472 lockdep_assert_held(&b->rb_lock);
474 if (RB_EMPTY_NODE(&wait->node))
477 if (b->irq_wait == wait) {
478 const int priority = wakeup_priority(b, wait->tsk);
479 struct rb_node *next;
481 /* We are the current bottom-half. Find the next candidate,
482 * the first waiter in the queue on the remaining oldest
483 * request. As multiple seqnos may complete in the time it
484 * takes us to wake up and find the next waiter, we have to
485 * wake up that waiter for it to perform its own coherent
488 next = rb_next(&wait->node);
489 if (chain_wakeup(next, priority)) {
490 /* If the next waiter is already complete,
491 * wake it up and continue onto the next waiter. So
492 * if have a small herd, they will wake up in parallel
493 * rather than sequentially, which should reduce
494 * the overall latency in waking all the completed
497 * However, waking up a chain adds extra latency to
498 * the first_waiter. This is undesirable if that
499 * waiter is a high priority task.
501 u32 seqno = intel_engine_get_seqno(engine);
503 while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
504 struct rb_node *n = rb_next(next);
506 __intel_breadcrumbs_finish(b, to_wait(next));
508 if (!chain_wakeup(next, priority))
513 __intel_breadcrumbs_next(engine, next);
515 GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
518 GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
519 rb_erase(&wait->node, &b->waiters);
522 GEM_BUG_ON(b->irq_wait == wait);
523 GEM_BUG_ON(rb_first(&b->waiters) !=
524 (b->irq_wait ? &b->irq_wait->node : NULL));
527 void intel_engine_remove_wait(struct intel_engine_cs *engine,
528 struct intel_wait *wait)
530 struct intel_breadcrumbs *b = &engine->breadcrumbs;
532 /* Quick check to see if this waiter was already decoupled from
533 * the tree by the bottom-half to avoid contention on the spinlock
536 if (RB_EMPTY_NODE(&wait->node)) {
537 GEM_BUG_ON(READ_ONCE(b->irq_wait) == wait);
541 spin_lock_irq(&b->rb_lock);
542 __intel_engine_remove_wait(engine, wait);
543 spin_unlock_irq(&b->rb_lock);
546 static bool signal_valid(const struct drm_i915_gem_request *request)
548 return intel_wait_check_request(&request->signaling.wait, request);
551 static bool signal_complete(const struct drm_i915_gem_request *request)
556 /* If another process served as the bottom-half it may have already
557 * signalled that this wait is already completed.
559 if (intel_wait_complete(&request->signaling.wait))
560 return signal_valid(request);
562 /* Carefully check if the request is complete, giving time for the
563 * seqno to be visible or if the GPU hung.
565 if (__i915_request_irq_complete(request))
571 static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
573 return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
576 static void signaler_set_rtpriority(void)
578 struct sched_param param = { .sched_priority = 1 };
580 sched_setscheduler_nocheck(current, SCHED_FIFO, ¶m);
583 static int intel_breadcrumbs_signaler(void *arg)
585 struct intel_engine_cs *engine = arg;
586 struct intel_breadcrumbs *b = &engine->breadcrumbs;
587 struct drm_i915_gem_request *request;
589 /* Install ourselves with high priority to reduce signalling latency */
590 signaler_set_rtpriority();
593 bool do_schedule = true;
595 set_current_state(TASK_INTERRUPTIBLE);
597 /* We are either woken up by the interrupt bottom-half,
598 * or by a client adding a new signaller. In both cases,
599 * the GPU seqno may have advanced beyond our oldest signal.
600 * If it has, propagate the signal, remove the waiter and
601 * check again with the next oldest signal. Otherwise we
602 * need to wait for a new interrupt from the GPU or for
606 request = rcu_dereference(b->first_signal);
608 request = i915_gem_request_get_rcu(request);
610 if (signal_complete(request)) {
612 dma_fence_signal(&request->fence);
613 local_bh_enable(); /* kick start the tasklets */
615 spin_lock_irq(&b->rb_lock);
617 /* Wake up all other completed waiters and select the
618 * next bottom-half for the next user interrupt.
620 __intel_engine_remove_wait(engine,
621 &request->signaling.wait);
623 /* Find the next oldest signal. Note that as we have
624 * not been holding the lock, another client may
625 * have installed an even older signal than the one
626 * we just completed - so double check we are still
627 * the oldest before picking the next one.
629 if (request == rcu_access_pointer(b->first_signal)) {
631 rb_next(&request->signaling.node);
632 rcu_assign_pointer(b->first_signal,
633 rb ? to_signaler(rb) : NULL);
635 rb_erase(&request->signaling.node, &b->signals);
636 RB_CLEAR_NODE(&request->signaling.node);
638 spin_unlock_irq(&b->rb_lock);
640 i915_gem_request_put(request);
642 /* If the engine is saturated we may be continually
643 * processing completed requests. This angers the
644 * NMI watchdog if we never let anything else
645 * have access to the CPU. Let's pretend to be nice
646 * and relinquish the CPU if we burn through the
647 * entire RT timeslice!
649 do_schedule = need_resched();
652 if (unlikely(do_schedule)) {
655 if (kthread_should_park())
658 if (kthread_should_stop()) {
664 add_wait_queue(&request->execute, &exec);
669 remove_wait_queue(&request->execute, &exec);
671 i915_gem_request_put(request);
673 __set_current_state(TASK_RUNNING);
678 void intel_engine_enable_signaling(struct drm_i915_gem_request *request,
681 struct intel_engine_cs *engine = request->engine;
682 struct intel_breadcrumbs *b = &engine->breadcrumbs;
685 /* Note that we may be called from an interrupt handler on another
686 * device (e.g. nouveau signaling a fence completion causing us
687 * to submit a request, and so enable signaling). As such,
688 * we need to make sure that all other users of b->rb_lock protect
689 * against interrupts, i.e. use spin_lock_irqsave.
692 /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
693 GEM_BUG_ON(!irqs_disabled());
694 lockdep_assert_held(&request->lock);
696 seqno = i915_gem_request_global_seqno(request);
700 request->signaling.wait.tsk = b->signaler;
701 request->signaling.wait.request = request;
702 request->signaling.wait.seqno = seqno;
703 i915_gem_request_get(request);
705 spin_lock(&b->rb_lock);
707 /* First add ourselves into the list of waiters, but register our
708 * bottom-half as the signaller thread. As per usual, only the oldest
709 * waiter (not just signaller) is tasked as the bottom-half waking
710 * up all completed waiters after the user interrupt.
712 * If we are the oldest waiter, enable the irq (after which we
713 * must double check that the seqno did not complete).
715 wakeup &= __intel_engine_add_wait(engine, &request->signaling.wait);
717 if (!__i915_gem_request_completed(request, seqno)) {
718 struct rb_node *parent, **p;
721 /* Now insert ourselves into the retirement ordered list of
722 * signals on this engine. We track the oldest seqno as that
723 * will be the first signal to complete.
727 p = &b->signals.rb_node;
730 if (i915_seqno_passed(seqno,
731 to_signaler(parent)->signaling.wait.seqno)) {
732 p = &parent->rb_right;
735 p = &parent->rb_left;
738 rb_link_node(&request->signaling.node, parent, p);
739 rb_insert_color(&request->signaling.node, &b->signals);
741 rcu_assign_pointer(b->first_signal, request);
743 __intel_engine_remove_wait(engine, &request->signaling.wait);
744 i915_gem_request_put(request);
748 spin_unlock(&b->rb_lock);
751 wake_up_process(b->signaler);
754 void intel_engine_cancel_signaling(struct drm_i915_gem_request *request)
756 struct intel_engine_cs *engine = request->engine;
757 struct intel_breadcrumbs *b = &engine->breadcrumbs;
759 GEM_BUG_ON(!irqs_disabled());
760 lockdep_assert_held(&request->lock);
761 GEM_BUG_ON(!request->signaling.wait.seqno);
763 spin_lock(&b->rb_lock);
765 if (!RB_EMPTY_NODE(&request->signaling.node)) {
766 if (request == rcu_access_pointer(b->first_signal)) {
768 rb_next(&request->signaling.node);
769 rcu_assign_pointer(b->first_signal,
770 rb ? to_signaler(rb) : NULL);
772 rb_erase(&request->signaling.node, &b->signals);
773 RB_CLEAR_NODE(&request->signaling.node);
774 i915_gem_request_put(request);
777 __intel_engine_remove_wait(engine, &request->signaling.wait);
779 spin_unlock(&b->rb_lock);
781 request->signaling.wait.seqno = 0;
784 int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
786 struct intel_breadcrumbs *b = &engine->breadcrumbs;
787 struct task_struct *tsk;
789 spin_lock_init(&b->rb_lock);
790 spin_lock_init(&b->irq_lock);
792 timer_setup(&b->fake_irq, intel_breadcrumbs_fake_irq, 0);
793 timer_setup(&b->hangcheck, intel_breadcrumbs_hangcheck, 0);
795 /* Spawn a thread to provide a common bottom-half for all signals.
796 * As this is an asynchronous interface we cannot steal the current
797 * task for handling the bottom-half to the user interrupt, therefore
798 * we create a thread to do the coherent seqno dance after the
799 * interrupt and then signal the waitqueue (via the dma-buf/fence).
801 tsk = kthread_run(intel_breadcrumbs_signaler, engine,
802 "i915/signal:%d", engine->id);
811 static void cancel_fake_irq(struct intel_engine_cs *engine)
813 struct intel_breadcrumbs *b = &engine->breadcrumbs;
815 del_timer_sync(&b->hangcheck);
816 del_timer_sync(&b->fake_irq);
817 clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
820 void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
822 struct intel_breadcrumbs *b = &engine->breadcrumbs;
824 cancel_fake_irq(engine);
825 spin_lock_irq(&b->irq_lock);
832 /* We set the IRQ_BREADCRUMB bit when we enable the irq presuming the
833 * GPU is active and may have already executed the MI_USER_INTERRUPT
834 * before the CPU is ready to receive. However, the engine is currently
835 * idle (we haven't started it yet), there is no possibility for a
836 * missed interrupt as we enabled the irq and so we can clear the
837 * immediate wakeup (until a real interrupt arrives for the waiter).
839 clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
844 spin_unlock_irq(&b->irq_lock);
847 void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
849 struct intel_breadcrumbs *b = &engine->breadcrumbs;
851 /* The engines should be idle and all requests accounted for! */
852 WARN_ON(READ_ONCE(b->irq_wait));
853 WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
854 WARN_ON(rcu_access_pointer(b->first_signal));
855 WARN_ON(!RB_EMPTY_ROOT(&b->signals));
857 if (!IS_ERR_OR_NULL(b->signaler))
858 kthread_stop(b->signaler);
860 cancel_fake_irq(engine);
863 bool intel_breadcrumbs_busy(struct intel_engine_cs *engine)
865 struct intel_breadcrumbs *b = &engine->breadcrumbs;
868 spin_lock_irq(&b->rb_lock);
871 wake_up_process(b->irq_wait->tsk);
875 if (rcu_access_pointer(b->first_signal)) {
876 wake_up_process(b->signaler);
880 spin_unlock_irq(&b->rb_lock);
885 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
886 #include "selftests/intel_breadcrumbs.c"