1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (C) Altera Corporation 1998-2001
8 * Copyright (C) 2010 NetUP Inc.
12 #include <linux/delay.h>
13 #include <linux/firmware.h>
14 #include <linux/slab.h>
15 #include <misc/altera.h>
16 #include "altera-exprt.h"
17 #include "altera-jtag.h"
19 #define alt_jtag_io(a, b, c)\
20 astate->config->jtag_io(astate->config->dev, a, b, c);
22 #define alt_malloc(a) kzalloc(a, GFP_KERNEL);
25 * This structure shows, for each JTAG state, which state is reached after
26 * a single TCK clock cycle with TMS high or TMS low, respectively. This
27 * describes all possible state transitions in the JTAG state machine.
29 struct altera_jtag_machine {
30 enum altera_jtag_state tms_high;
31 enum altera_jtag_state tms_low;
34 static const struct altera_jtag_machine altera_transitions[] = {
35 /* RESET */ { RESET, IDLE },
36 /* IDLE */ { DRSELECT, IDLE },
37 /* DRSELECT */ { IRSELECT, DRCAPTURE },
38 /* DRCAPTURE */ { DREXIT1, DRSHIFT },
39 /* DRSHIFT */ { DREXIT1, DRSHIFT },
40 /* DREXIT1 */ { DRUPDATE, DRPAUSE },
41 /* DRPAUSE */ { DREXIT2, DRPAUSE },
42 /* DREXIT2 */ { DRUPDATE, DRSHIFT },
43 /* DRUPDATE */ { DRSELECT, IDLE },
44 /* IRSELECT */ { RESET, IRCAPTURE },
45 /* IRCAPTURE */ { IREXIT1, IRSHIFT },
46 /* IRSHIFT */ { IREXIT1, IRSHIFT },
47 /* IREXIT1 */ { IRUPDATE, IRPAUSE },
48 /* IRPAUSE */ { IREXIT2, IRPAUSE },
49 /* IREXIT2 */ { IRUPDATE, IRSHIFT },
50 /* IRUPDATE */ { DRSELECT, IDLE }
54 * This table contains the TMS value to be used to take the NEXT STEP on
55 * the path to the desired state. The array index is the current state,
56 * and the bit position is the desired endstate. To find out which state
57 * is used as the intermediate state, look up the TMS value in the
58 * altera_transitions[] table.
60 static const u16 altera_jtag_path_map[16] = {
61 /* RST RTI SDRS CDR SDR E1DR PDR E2DR */
62 0x0001, 0xFFFD, 0xFE01, 0xFFE7, 0xFFEF, 0xFF0F, 0xFFBF, 0xFFFF,
63 /* UDR SIRS CIR SIR E1IR PIR E2IR UIR */
64 0xFEFD, 0x0001, 0xF3FF, 0xF7FF, 0x87FF, 0xDFFF, 0xFFFF, 0x7FFD
67 /* Flag bits for alt_jtag_io() function */
75 int altera_jinit(struct altera_state *astate)
77 struct altera_jtag *js = &astate->js;
79 /* initial JTAG state is unknown */
80 js->jtag_state = ILLEGAL_JTAG_STATE;
82 /* initialize to default state */
83 js->drstop_state = IDLE;
84 js->irstop_state = IDLE;
92 js->dr_pre_data = NULL;
93 js->dr_post_data = NULL;
94 js->ir_pre_data = NULL;
95 js->ir_post_data = NULL;
102 int altera_set_drstop(struct altera_jtag *js, enum altera_jtag_state state)
104 js->drstop_state = state;
109 int altera_set_irstop(struct altera_jtag *js, enum altera_jtag_state state)
111 js->irstop_state = state;
116 int altera_set_dr_pre(struct altera_jtag *js,
117 u32 count, u32 start_index,
124 if (count > js->dr_pre) {
125 kfree(js->dr_pre_data);
126 js->dr_pre_data = (u8 *)alt_malloc((count + 7) >> 3);
127 if (js->dr_pre_data == NULL)
135 for (i = 0; i < count; ++i) {
138 if (preamble_data == NULL)
139 js->dr_pre_data[i >> 3] |= (1 << (i & 7));
141 if (preamble_data[j >> 3] & (1 << (j & 7)))
142 js->dr_pre_data[i >> 3] |=
145 js->dr_pre_data[i >> 3] &=
146 ~(u32)(1 << (i & 7));
155 int altera_set_ir_pre(struct altera_jtag *js, u32 count, u32 start_index,
162 if (count > js->ir_pre) {
163 kfree(js->ir_pre_data);
164 js->ir_pre_data = (u8 *)alt_malloc((count + 7) >> 3);
165 if (js->ir_pre_data == NULL)
174 for (i = 0; i < count; ++i) {
176 if (preamble_data == NULL)
177 js->ir_pre_data[i >> 3] |= (1 << (i & 7));
179 if (preamble_data[j >> 3] & (1 << (j & 7)))
180 js->ir_pre_data[i >> 3] |=
183 js->ir_pre_data[i >> 3] &=
184 ~(u32)(1 << (i & 7));
193 int altera_set_dr_post(struct altera_jtag *js, u32 count, u32 start_index,
200 if (count > js->dr_post) {
201 kfree(js->dr_post_data);
202 js->dr_post_data = (u8 *)alt_malloc((count + 7) >> 3);
204 if (js->dr_post_data == NULL)
213 for (i = 0; i < count; ++i) {
216 if (postamble_data == NULL)
217 js->dr_post_data[i >> 3] |= (1 << (i & 7));
219 if (postamble_data[j >> 3] & (1 << (j & 7)))
220 js->dr_post_data[i >> 3] |=
223 js->dr_post_data[i >> 3] &=
224 ~(u32)(1 << (i & 7));
233 int altera_set_ir_post(struct altera_jtag *js, u32 count, u32 start_index,
240 if (count > js->ir_post) {
241 kfree(js->ir_post_data);
242 js->ir_post_data = (u8 *)alt_malloc((count + 7) >> 3);
243 if (js->ir_post_data == NULL)
254 for (i = 0; i < count; ++i) {
257 if (postamble_data == NULL)
258 js->ir_post_data[i >> 3] |= (1 << (i & 7));
260 if (postamble_data[j >> 3] & (1 << (j & 7)))
261 js->ir_post_data[i >> 3] |= (1 << (i & 7));
263 js->ir_post_data[i >> 3] &=
264 ~(u32)(1 << (i & 7));
272 static void altera_jreset_idle(struct altera_state *astate)
274 struct altera_jtag *js = &astate->js;
276 /* Go to Test Logic Reset (no matter what the starting state may be) */
277 for (i = 0; i < 5; ++i)
278 alt_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
280 /* Now step to Run Test / Idle */
281 alt_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
282 js->jtag_state = IDLE;
285 int altera_goto_jstate(struct altera_state *astate,
286 enum altera_jtag_state state)
288 struct altera_jtag *js = &astate->js;
293 if (js->jtag_state == ILLEGAL_JTAG_STATE)
294 /* initialize JTAG chain to known state */
295 altera_jreset_idle(astate);
297 if (js->jtag_state == state) {
299 * We are already in the desired state.
300 * If it is a stable state, loop here.
301 * Otherwise do nothing (no clock cycles).
303 if ((state == IDLE) || (state == DRSHIFT) ||
304 (state == DRPAUSE) || (state == IRSHIFT) ||
305 (state == IRPAUSE)) {
306 alt_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
307 } else if (state == RESET)
308 alt_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
311 while ((js->jtag_state != state) && (count < 9)) {
312 /* Get TMS value to take a step toward desired state */
313 tms = (altera_jtag_path_map[js->jtag_state] &
315 ? TMS_HIGH : TMS_LOW;
318 alt_jtag_io(tms, TDI_LOW, IGNORE_TDO);
322 altera_transitions[js->jtag_state].tms_high;
325 altera_transitions[js->jtag_state].tms_low;
331 if (js->jtag_state != state)
337 int altera_wait_cycles(struct altera_state *astate,
339 enum altera_jtag_state wait_state)
341 struct altera_jtag *js = &astate->js;
346 if (js->jtag_state != wait_state)
347 status = altera_goto_jstate(astate, wait_state);
351 * Set TMS high to loop in RESET state
352 * Set TMS low to loop in any other stable state
354 tms = (wait_state == RESET) ? TMS_HIGH : TMS_LOW;
356 for (count = 0L; count < cycles; count++)
357 alt_jtag_io(tms, TDI_LOW, IGNORE_TDO);
364 int altera_wait_msecs(struct altera_state *astate,
365 s32 microseconds, enum altera_jtag_state wait_state)
367 * Causes JTAG hardware to sit in the specified stable
368 * state for the specified duration of real time. If
369 * no JTAG operations have been performed yet, then only
370 * a delay is performed. This permits the WAIT USECS
371 * statement to be used in VECTOR programs without causing
372 * any JTAG operations.
373 * Returns 0 for success, else appropriate error code.
376 struct altera_jtag *js = &astate->js;
379 if ((js->jtag_state != ILLEGAL_JTAG_STATE) &&
380 (js->jtag_state != wait_state))
381 status = altera_goto_jstate(astate, wait_state);
384 /* Wait for specified time interval */
385 udelay(microseconds);
390 static void altera_concatenate_data(u8 *buffer,
399 * Copies preamble data, target data, and postamble data
400 * into one buffer for IR or DR scans.
405 for (i = 0L; i < preamble_count; ++i) {
406 if (preamble_data[i >> 3L] & (1L << (i & 7L)))
407 buffer[i >> 3L] |= (1L << (i & 7L));
409 buffer[i >> 3L] &= ~(u32)(1L << (i & 7L));
414 k = preamble_count + target_count;
415 for (; i < k; ++i, ++j) {
416 if (target_data[j >> 3L] & (1L << (j & 7L)))
417 buffer[i >> 3L] |= (1L << (i & 7L));
419 buffer[i >> 3L] &= ~(u32)(1L << (i & 7L));
424 k = preamble_count + target_count + postamble_count;
425 for (; i < k; ++i, ++j) {
426 if (postamble_data[j >> 3L] & (1L << (j & 7L)))
427 buffer[i >> 3L] |= (1L << (i & 7L));
429 buffer[i >> 3L] &= ~(u32)(1L << (i & 7L));
434 static int alt_jtag_drscan(struct altera_state *astate,
444 /* First go to DRSHIFT state */
445 switch (start_state) {
447 alt_jtag_io(1, 0, 0); /* DRSELECT */
448 alt_jtag_io(0, 0, 0); /* DRCAPTURE */
449 alt_jtag_io(0, 0, 0); /* DRSHIFT */
452 case 1: /* DRPAUSE */
453 alt_jtag_io(1, 0, 0); /* DREXIT2 */
454 alt_jtag_io(1, 0, 0); /* DRUPDATE */
455 alt_jtag_io(1, 0, 0); /* DRSELECT */
456 alt_jtag_io(0, 0, 0); /* DRCAPTURE */
457 alt_jtag_io(0, 0, 0); /* DRSHIFT */
460 case 2: /* IRPAUSE */
461 alt_jtag_io(1, 0, 0); /* IREXIT2 */
462 alt_jtag_io(1, 0, 0); /* IRUPDATE */
463 alt_jtag_io(1, 0, 0); /* DRSELECT */
464 alt_jtag_io(0, 0, 0); /* DRCAPTURE */
465 alt_jtag_io(0, 0, 0); /* DRSHIFT */
473 /* loop in the SHIFT-DR state */
474 for (i = 0; i < count; i++) {
475 tdo_bit = alt_jtag_io(
477 tdi[i >> 3] & (1 << (i & 7)),
482 tdo[i >> 3] |= (1 << (i & 7));
484 tdo[i >> 3] &= ~(u32)(1 << (i & 7));
489 alt_jtag_io(0, 0, 0); /* DRPAUSE */
495 static int alt_jtag_irscan(struct altera_state *astate,
505 /* First go to IRSHIFT state */
506 switch (start_state) {
508 alt_jtag_io(1, 0, 0); /* DRSELECT */
509 alt_jtag_io(1, 0, 0); /* IRSELECT */
510 alt_jtag_io(0, 0, 0); /* IRCAPTURE */
511 alt_jtag_io(0, 0, 0); /* IRSHIFT */
514 case 1: /* DRPAUSE */
515 alt_jtag_io(1, 0, 0); /* DREXIT2 */
516 alt_jtag_io(1, 0, 0); /* DRUPDATE */
517 alt_jtag_io(1, 0, 0); /* DRSELECT */
518 alt_jtag_io(1, 0, 0); /* IRSELECT */
519 alt_jtag_io(0, 0, 0); /* IRCAPTURE */
520 alt_jtag_io(0, 0, 0); /* IRSHIFT */
523 case 2: /* IRPAUSE */
524 alt_jtag_io(1, 0, 0); /* IREXIT2 */
525 alt_jtag_io(1, 0, 0); /* IRUPDATE */
526 alt_jtag_io(1, 0, 0); /* DRSELECT */
527 alt_jtag_io(1, 0, 0); /* IRSELECT */
528 alt_jtag_io(0, 0, 0); /* IRCAPTURE */
529 alt_jtag_io(0, 0, 0); /* IRSHIFT */
537 /* loop in the SHIFT-IR state */
538 for (i = 0; i < count; i++) {
539 tdo_bit = alt_jtag_io(
541 tdi[i >> 3] & (1 << (i & 7)),
545 tdo[i >> 3] |= (1 << (i & 7));
547 tdo[i >> 3] &= ~(u32)(1 << (i & 7));
552 alt_jtag_io(0, 0, 0); /* IRPAUSE */
558 static void altera_extract_target_data(u8 *buffer,
564 * Copies target data from scan buffer, filtering out
565 * preamble and postamble data.
573 k = start_index + target_count;
574 for (i = start_index; i < k; ++i, ++j) {
575 if (buffer[j >> 3] & (1 << (j & 7)))
576 target_data[i >> 3] |= (1 << (i & 7));
578 target_data[i >> 3] &= ~(u32)(1 << (i & 7));
583 int altera_irscan(struct altera_state *astate,
587 /* Shifts data into instruction register */
589 struct altera_jtag *js = &astate->js;
592 u32 shift_count = js->ir_pre + count + js->ir_post;
594 enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
596 switch (js->jtag_state) {
597 case ILLEGAL_JTAG_STATE:
612 start_state = DRPAUSE;
623 start_state = IRPAUSE;
632 if (js->jtag_state != start_state)
633 status = altera_goto_jstate(astate, start_state);
636 if (shift_count > js->ir_length) {
637 alloc_chars = (shift_count + 7) >> 3;
638 kfree(js->ir_buffer);
639 js->ir_buffer = (u8 *)alt_malloc(alloc_chars);
640 if (js->ir_buffer == NULL)
643 js->ir_length = alloc_chars * 8;
650 * Copy preamble data, IR data,
651 * and postamble data into a buffer
653 altera_concatenate_data(js->ir_buffer,
662 alt_jtag_irscan(astate,
668 /* alt_jtag_irscan() always ends in IRPAUSE state */
669 js->jtag_state = IRPAUSE;
673 if (js->irstop_state != IRPAUSE)
674 status = altera_goto_jstate(astate, js->irstop_state);
680 int altera_swap_ir(struct altera_state *astate,
686 /* Shifts data into instruction register, capturing output data */
688 struct altera_jtag *js = &astate->js;
691 u32 shift_count = js->ir_pre + count + js->ir_post;
693 enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
695 switch (js->jtag_state) {
696 case ILLEGAL_JTAG_STATE:
711 start_state = DRPAUSE;
722 start_state = IRPAUSE;
731 if (js->jtag_state != start_state)
732 status = altera_goto_jstate(astate, start_state);
735 if (shift_count > js->ir_length) {
736 alloc_chars = (shift_count + 7) >> 3;
737 kfree(js->ir_buffer);
738 js->ir_buffer = (u8 *)alt_malloc(alloc_chars);
739 if (js->ir_buffer == NULL)
742 js->ir_length = alloc_chars * 8;
749 * Copy preamble data, IR data,
750 * and postamble data into a buffer
752 altera_concatenate_data(js->ir_buffer,
762 alt_jtag_irscan(astate,
768 /* alt_jtag_irscan() always ends in IRPAUSE state */
769 js->jtag_state = IRPAUSE;
773 if (js->irstop_state != IRPAUSE)
774 status = altera_goto_jstate(astate, js->irstop_state);
778 /* Now extract the returned data from the buffer */
779 altera_extract_target_data(js->ir_buffer,
786 int altera_drscan(struct altera_state *astate,
790 /* Shifts data into data register (ignoring output data) */
792 struct altera_jtag *js = &astate->js;
795 u32 shift_count = js->dr_pre + count + js->dr_post;
797 enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
799 switch (js->jtag_state) {
800 case ILLEGAL_JTAG_STATE:
815 start_state = DRPAUSE;
826 start_state = IRPAUSE;
835 if (js->jtag_state != start_state)
836 status = altera_goto_jstate(astate, start_state);
839 if (shift_count > js->dr_length) {
840 alloc_chars = (shift_count + 7) >> 3;
841 kfree(js->dr_buffer);
842 js->dr_buffer = (u8 *)alt_malloc(alloc_chars);
843 if (js->dr_buffer == NULL)
846 js->dr_length = alloc_chars * 8;
853 * Copy preamble data, DR data,
854 * and postamble data into a buffer
856 altera_concatenate_data(js->dr_buffer,
865 alt_jtag_drscan(astate, start_code, shift_count,
866 js->dr_buffer, NULL);
867 /* alt_jtag_drscan() always ends in DRPAUSE state */
868 js->jtag_state = DRPAUSE;
872 if (js->drstop_state != DRPAUSE)
873 status = altera_goto_jstate(astate, js->drstop_state);
878 int altera_swap_dr(struct altera_state *astate, u32 count,
879 u8 *in_data, u32 in_index,
880 u8 *out_data, u32 out_index)
881 /* Shifts data into data register, capturing output data */
883 struct altera_jtag *js = &astate->js;
886 u32 shift_count = js->dr_pre + count + js->dr_post;
888 enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
890 switch (js->jtag_state) {
891 case ILLEGAL_JTAG_STATE:
906 start_state = DRPAUSE;
917 start_state = IRPAUSE;
926 if (js->jtag_state != start_state)
927 status = altera_goto_jstate(astate, start_state);
930 if (shift_count > js->dr_length) {
931 alloc_chars = (shift_count + 7) >> 3;
932 kfree(js->dr_buffer);
933 js->dr_buffer = (u8 *)alt_malloc(alloc_chars);
935 if (js->dr_buffer == NULL)
938 js->dr_length = alloc_chars * 8;
945 * Copy preamble data, DR data,
946 * and postamble data into a buffer
948 altera_concatenate_data(js->dr_buffer,
958 alt_jtag_drscan(astate,
964 /* alt_jtag_drscan() always ends in DRPAUSE state */
965 js->jtag_state = DRPAUSE;
969 if (js->drstop_state != DRPAUSE)
970 status = altera_goto_jstate(astate, js->drstop_state);
973 /* Now extract the returned data from the buffer */
974 altera_extract_target_data(js->dr_buffer,
983 void altera_free_buffers(struct altera_state *astate)
985 struct altera_jtag *js = &astate->js;
986 /* If the JTAG interface was used, reset it to TLR */
987 if (js->jtag_state != ILLEGAL_JTAG_STATE)
988 altera_jreset_idle(astate);
990 kfree(js->dr_pre_data);
991 js->dr_pre_data = NULL;
993 kfree(js->dr_post_data);
994 js->dr_post_data = NULL;
996 kfree(js->dr_buffer);
997 js->dr_buffer = NULL;
999 kfree(js->ir_pre_data);
1000 js->ir_pre_data = NULL;
1002 kfree(js->ir_post_data);
1003 js->ir_post_data = NULL;
1005 kfree(js->ir_buffer);
1006 js->ir_buffer = NULL;