1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt control channel messages
6 * Copyright (C) 2017, Intel Corporation
12 #include <linux/types.h>
13 #include <linux/uuid.h>
23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 TB_CFG_ERROR_LINK_ERROR = 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP = 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
34 struct tb_cfg_header {
36 u32 unknown:10; /* highest order bit is set on replies */
40 /* additional header for read/write packets */
41 struct tb_cfg_address {
42 u32 offset:13; /* in dwords */
43 u32 length:6; /* in dwords */
45 enum tb_cfg_space space:2;
46 u32 seq:2; /* sequence number */
50 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
52 struct tb_cfg_header header;
53 struct tb_cfg_address addr;
56 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
57 struct cfg_write_pkg {
58 struct tb_cfg_header header;
59 struct tb_cfg_address addr;
60 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
63 /* TB_CFG_PKG_ERROR */
64 struct cfg_error_pkg {
65 struct tb_cfg_header header;
66 enum tb_cfg_error error:4;
69 u32 zero2:2; /* Both should be zero, still they are different fields. */
73 /* TB_CFG_PKG_EVENT */
74 struct cfg_event_pkg {
75 struct tb_cfg_header header;
81 /* TB_CFG_PKG_RESET */
82 struct cfg_reset_pkg {
83 struct tb_cfg_header header;
86 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
88 struct tb_cfg_header header;
95 ICM_GET_TOPOLOGY = 0x1,
96 ICM_DRIVER_READY = 0x3,
97 ICM_APPROVE_DEVICE = 0x4,
98 ICM_CHALLENGE_DEVICE = 0x5,
99 ICM_ADD_DEVICE_KEY = 0x6,
101 ICM_APPROVE_XDOMAIN = 0x10,
102 ICM_DISCONNECT_XDOMAIN = 0x11,
103 ICM_PREBOOT_ACL = 0x18,
106 enum icm_event_code {
107 ICM_EVENT_DEVICE_CONNECTED = 0x3,
108 ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
109 ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
110 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
111 ICM_EVENT_RTD3_VETO = 0xa,
114 struct icm_pkg_header {
121 #define ICM_FLAGS_ERROR BIT(0)
122 #define ICM_FLAGS_NO_KEY BIT(1)
123 #define ICM_FLAGS_SLEVEL_SHIFT 3
124 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
125 #define ICM_FLAGS_WRITE BIT(7)
127 struct icm_pkg_driver_ready {
128 struct icm_pkg_header hdr;
131 /* Falcon Ridge only messages */
133 struct icm_fr_pkg_driver_ready_response {
134 struct icm_pkg_header hdr;
140 #define ICM_FR_SLEVEL_MASK 0xf
142 /* Falcon Ridge & Alpine Ridge common messages */
144 struct icm_fr_pkg_get_topology {
145 struct icm_pkg_header hdr;
148 #define ICM_GET_TOPOLOGY_PACKETS 14
150 struct icm_fr_pkg_get_topology_response {
151 struct icm_pkg_header hdr;
156 u8 drom_i2c_address_index;
160 u32 port_hop_info[16];
163 #define ICM_SWITCH_USED BIT(0)
164 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
165 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
167 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
168 #define ICM_PORT_INDEX_SHIFT 24
169 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
171 struct icm_fr_event_device_connected {
172 struct icm_pkg_header hdr;
180 #define ICM_LINK_INFO_LINK_MASK 0x7
181 #define ICM_LINK_INFO_DEPTH_SHIFT 4
182 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
183 #define ICM_LINK_INFO_APPROVED BIT(8)
184 #define ICM_LINK_INFO_REJECTED BIT(9)
185 #define ICM_LINK_INFO_BOOT BIT(10)
187 struct icm_fr_pkg_approve_device {
188 struct icm_pkg_header hdr;
195 struct icm_fr_event_device_disconnected {
196 struct icm_pkg_header hdr;
201 struct icm_fr_event_xdomain_connected {
202 struct icm_pkg_header hdr;
213 struct icm_fr_event_xdomain_disconnected {
214 struct icm_pkg_header hdr;
220 struct icm_fr_pkg_add_device_key {
221 struct icm_pkg_header hdr;
229 struct icm_fr_pkg_add_device_key_response {
230 struct icm_pkg_header hdr;
237 struct icm_fr_pkg_challenge_device {
238 struct icm_pkg_header hdr;
246 struct icm_fr_pkg_challenge_device_response {
247 struct icm_pkg_header hdr;
256 struct icm_fr_pkg_approve_xdomain {
257 struct icm_pkg_header hdr;
267 struct icm_fr_pkg_approve_xdomain_response {
268 struct icm_pkg_header hdr;
278 /* Alpine Ridge only messages */
280 struct icm_ar_pkg_driver_ready_response {
281 struct icm_pkg_header hdr;
287 #define ICM_AR_FLAGS_RTD3 BIT(6)
289 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
290 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
291 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
292 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
294 struct icm_ar_pkg_get_route {
295 struct icm_pkg_header hdr;
300 struct icm_ar_pkg_get_route_response {
301 struct icm_pkg_header hdr;
308 struct icm_ar_boot_acl_entry {
313 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
315 struct icm_ar_pkg_preboot_acl {
316 struct icm_pkg_header hdr;
317 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
320 struct icm_ar_pkg_preboot_acl_response {
321 struct icm_pkg_header hdr;
322 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
325 /* Titan Ridge messages */
327 struct icm_tr_pkg_driver_ready_response {
328 struct icm_pkg_header hdr;
336 #define ICM_TR_FLAGS_RTD3 BIT(6)
338 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
339 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
340 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
342 struct icm_tr_event_device_connected {
343 struct icm_pkg_header hdr;
353 struct icm_tr_event_device_disconnected {
354 struct icm_pkg_header hdr;
359 struct icm_tr_event_xdomain_connected {
360 struct icm_pkg_header hdr;
371 struct icm_tr_event_xdomain_disconnected {
372 struct icm_pkg_header hdr;
378 struct icm_tr_pkg_approve_device {
379 struct icm_pkg_header hdr;
387 struct icm_tr_pkg_add_device_key {
388 struct icm_pkg_header hdr;
397 struct icm_tr_pkg_challenge_device {
398 struct icm_pkg_header hdr;
407 struct icm_tr_pkg_approve_xdomain {
408 struct icm_pkg_header hdr;
418 struct icm_tr_pkg_disconnect_xdomain {
419 struct icm_pkg_header hdr;
427 struct icm_tr_pkg_challenge_device_response {
428 struct icm_pkg_header hdr;
438 struct icm_tr_pkg_add_device_key_response {
439 struct icm_pkg_header hdr;
447 struct icm_tr_pkg_approve_xdomain_response {
448 struct icm_pkg_header hdr;
458 struct icm_tr_pkg_disconnect_xdomain_response {
459 struct icm_pkg_header hdr;
467 /* Ice Lake messages */
469 struct icm_icl_event_rtd3_veto {
470 struct icm_pkg_header hdr;
474 /* XDomain messages */
476 struct tb_xdomain_header {
482 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
483 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
484 #define TB_XDOMAIN_SN_SHIFT 27
487 UUID_REQUEST_OLD = 1,
491 PROPERTIES_CHANGED_REQUEST,
492 PROPERTIES_CHANGED_RESPONSE,
497 struct tb_xdp_header {
498 struct tb_xdomain_header xd_hdr;
504 struct tb_xdp_header hdr;
507 struct tb_xdp_uuid_response {
508 struct tb_xdp_header hdr;
514 struct tb_xdp_properties {
515 struct tb_xdp_header hdr;
522 struct tb_xdp_properties_response {
523 struct tb_xdp_header hdr;
533 * Max length of data array single XDomain property response is allowed
536 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
537 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
539 /* Maximum size of the total property block in dwords we allow */
540 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
542 struct tb_xdp_properties_changed {
543 struct tb_xdp_header hdr;
547 struct tb_xdp_properties_changed_response {
548 struct tb_xdp_header hdr;
553 ERROR_UNKNOWN_PACKET,
554 ERROR_UNKNOWN_DOMAIN,
559 struct tb_xdp_error_response {
560 struct tb_xdp_header hdr;