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drm/i915: disable sampler indirect state in bindless heap
[linux.git] / drivers / gpu / drm / i915 / display / intel_plane_initial.c
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2021 Intel Corporation
4  */
5
6 #include "gem/i915_gem_region.h"
7 #include "i915_drv.h"
8 #include "intel_atomic_plane.h"
9 #include "intel_display.h"
10 #include "intel_display_types.h"
11 #include "intel_fb.h"
12 #include "intel_plane_initial.h"
13
14 static bool
15 intel_reuse_initial_plane_obj(struct drm_i915_private *i915,
16                               const struct intel_initial_plane_config *plane_config,
17                               struct drm_framebuffer **fb,
18                               struct i915_vma **vma)
19 {
20         struct intel_crtc *crtc;
21
22         for_each_intel_crtc(&i915->drm, crtc) {
23                 struct intel_crtc_state *crtc_state =
24                         to_intel_crtc_state(crtc->base.state);
25                 struct intel_plane *plane =
26                         to_intel_plane(crtc->base.primary);
27                 struct intel_plane_state *plane_state =
28                         to_intel_plane_state(plane->base.state);
29
30                 if (!crtc_state->uapi.active)
31                         continue;
32
33                 if (!plane_state->ggtt_vma)
34                         continue;
35
36                 if (intel_plane_ggtt_offset(plane_state) == plane_config->base) {
37                         *fb = plane_state->hw.fb;
38                         *vma = plane_state->ggtt_vma;
39                         return true;
40                 }
41         }
42
43         return false;
44 }
45
46 static struct i915_vma *
47 initial_plane_vma(struct drm_i915_private *i915,
48                   struct intel_initial_plane_config *plane_config)
49 {
50         struct intel_memory_region *mem;
51         struct drm_i915_gem_object *obj;
52         struct i915_vma *vma;
53         resource_size_t phys_base;
54         u32 base, size;
55         u64 pinctl;
56
57         if (plane_config->size == 0)
58                 return NULL;
59
60         base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
61         if (IS_DGFX(i915)) {
62                 gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm;
63                 gen8_pte_t pte;
64
65                 gte += base / I915_GTT_PAGE_SIZE;
66
67                 pte = ioread64(gte);
68                 if (!(pte & GEN12_GGTT_PTE_LM)) {
69                         drm_err(&i915->drm,
70                                 "Initial plane programming missing PTE_LM bit\n");
71                         return NULL;
72                 }
73
74                 phys_base = pte & I915_GTT_PAGE_MASK;
75                 mem = i915->mm.regions[INTEL_REGION_LMEM_0];
76
77                 /*
78                  * We don't currently expect this to ever be placed in the
79                  * stolen portion.
80                  */
81                 if (phys_base >= resource_size(&mem->region)) {
82                         drm_err(&i915->drm,
83                                 "Initial plane programming using invalid range, phys_base=%pa\n",
84                                 &phys_base);
85                         return NULL;
86                 }
87
88                 drm_dbg(&i915->drm,
89                         "Using phys_base=%pa, based on initial plane programming\n",
90                         &phys_base);
91         } else {
92                 phys_base = base;
93                 mem = i915->mm.stolen_region;
94         }
95
96         if (!mem)
97                 return NULL;
98
99         size = round_up(plane_config->base + plane_config->size,
100                         mem->min_page_size);
101         size -= base;
102
103         /*
104          * If the FB is too big, just don't use it since fbdev is not very
105          * important and we should probably use that space with FBC or other
106          * features.
107          */
108         if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
109             mem == i915->mm.stolen_region &&
110             size * 2 > i915->stolen_usable_size)
111                 return NULL;
112
113         obj = i915_gem_object_create_region_at(mem, phys_base, size,
114                                                I915_BO_ALLOC_USER |
115                                                I915_BO_PREALLOC);
116         if (IS_ERR(obj))
117                 return NULL;
118
119         /*
120          * Mark it WT ahead of time to avoid changing the
121          * cache_level during fbdev initialization. The
122          * unbind there would get stuck waiting for rcu.
123          */
124         i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?
125                                             I915_CACHE_WT : I915_CACHE_NONE);
126
127         switch (plane_config->tiling) {
128         case I915_TILING_NONE:
129                 break;
130         case I915_TILING_X:
131         case I915_TILING_Y:
132                 obj->tiling_and_stride =
133                         plane_config->fb->base.pitches[0] |
134                         plane_config->tiling;
135                 break;
136         default:
137                 MISSING_CASE(plane_config->tiling);
138                 goto err_obj;
139         }
140
141         vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL);
142         if (IS_ERR(vma))
143                 goto err_obj;
144
145         pinctl = PIN_GLOBAL | PIN_OFFSET_FIXED | base;
146         if (HAS_GMCH(i915))
147                 pinctl |= PIN_MAPPABLE;
148         if (i915_vma_pin(vma, 0, 0, pinctl))
149                 goto err_obj;
150
151         if (i915_gem_object_is_tiled(obj) &&
152             !i915_vma_is_map_and_fenceable(vma))
153                 goto err_obj;
154
155         return vma;
156
157 err_obj:
158         i915_gem_object_put(obj);
159         return NULL;
160 }
161
162 static bool
163 intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
164                               struct intel_initial_plane_config *plane_config)
165 {
166         struct drm_device *dev = crtc->base.dev;
167         struct drm_i915_private *dev_priv = to_i915(dev);
168         struct drm_mode_fb_cmd2 mode_cmd = { 0 };
169         struct drm_framebuffer *fb = &plane_config->fb->base;
170         struct i915_vma *vma;
171
172         switch (fb->modifier) {
173         case DRM_FORMAT_MOD_LINEAR:
174         case I915_FORMAT_MOD_X_TILED:
175         case I915_FORMAT_MOD_Y_TILED:
176         case I915_FORMAT_MOD_4_TILED:
177                 break;
178         default:
179                 drm_dbg(&dev_priv->drm,
180                         "Unsupported modifier for initial FB: 0x%llx\n",
181                         fb->modifier);
182                 return false;
183         }
184
185         vma = initial_plane_vma(dev_priv, plane_config);
186         if (!vma)
187                 return false;
188
189         mode_cmd.pixel_format = fb->format->format;
190         mode_cmd.width = fb->width;
191         mode_cmd.height = fb->height;
192         mode_cmd.pitches[0] = fb->pitches[0];
193         mode_cmd.modifier[0] = fb->modifier;
194         mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
195
196         if (intel_framebuffer_init(to_intel_framebuffer(fb),
197                                    vma->obj, &mode_cmd)) {
198                 drm_dbg_kms(&dev_priv->drm, "intel fb init failed\n");
199                 goto err_vma;
200         }
201
202         plane_config->vma = vma;
203         return true;
204
205 err_vma:
206         i915_vma_put(vma);
207         return false;
208 }
209
210 static void
211 intel_find_initial_plane_obj(struct intel_crtc *crtc,
212                              struct intel_initial_plane_config *plane_config)
213 {
214         struct drm_device *dev = crtc->base.dev;
215         struct drm_i915_private *dev_priv = to_i915(dev);
216         struct intel_plane *plane =
217                 to_intel_plane(crtc->base.primary);
218         struct intel_plane_state *plane_state =
219                 to_intel_plane_state(plane->base.state);
220         struct drm_framebuffer *fb;
221         struct i915_vma *vma;
222
223         /*
224          * TODO:
225          *   Disable planes if get_initial_plane_config() failed.
226          *   Make sure things work if the surface base is not page aligned.
227          */
228         if (!plane_config->fb)
229                 return;
230
231         if (intel_alloc_initial_plane_obj(crtc, plane_config)) {
232                 fb = &plane_config->fb->base;
233                 vma = plane_config->vma;
234                 goto valid_fb;
235         }
236
237         /*
238          * Failed to alloc the obj, check to see if we should share
239          * an fb with another CRTC instead
240          */
241         if (intel_reuse_initial_plane_obj(dev_priv, plane_config, &fb, &vma))
242                 goto valid_fb;
243
244         /*
245          * We've failed to reconstruct the BIOS FB.  Current display state
246          * indicates that the primary plane is visible, but has a NULL FB,
247          * which will lead to problems later if we don't fix it up.  The
248          * simplest solution is to just disable the primary plane now and
249          * pretend the BIOS never had it enabled.
250          */
251         intel_plane_disable_noatomic(crtc, plane);
252
253         return;
254
255 valid_fb:
256         plane_state->uapi.rotation = plane_config->rotation;
257         intel_fb_fill_view(to_intel_framebuffer(fb),
258                            plane_state->uapi.rotation, &plane_state->view);
259
260         __i915_vma_pin(vma);
261         plane_state->ggtt_vma = i915_vma_get(vma);
262         if (intel_plane_uses_fence(plane_state) &&
263             i915_vma_pin_fence(vma) == 0 && vma->fence)
264                 plane_state->flags |= PLANE_HAS_FENCE;
265
266         plane_state->uapi.src_x = 0;
267         plane_state->uapi.src_y = 0;
268         plane_state->uapi.src_w = fb->width << 16;
269         plane_state->uapi.src_h = fb->height << 16;
270
271         plane_state->uapi.crtc_x = 0;
272         plane_state->uapi.crtc_y = 0;
273         plane_state->uapi.crtc_w = fb->width;
274         plane_state->uapi.crtc_h = fb->height;
275
276         if (plane_config->tiling)
277                 dev_priv->preserve_bios_swizzle = true;
278
279         plane_state->uapi.fb = fb;
280         drm_framebuffer_get(fb);
281
282         plane_state->uapi.crtc = &crtc->base;
283         intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);
284
285         atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);
286 }
287
288 static void plane_config_fini(struct intel_initial_plane_config *plane_config)
289 {
290         if (plane_config->fb) {
291                 struct drm_framebuffer *fb = &plane_config->fb->base;
292
293                 /* We may only have the stub and not a full framebuffer */
294                 if (drm_framebuffer_read_refcount(fb))
295                         drm_framebuffer_put(fb);
296                 else
297                         kfree(fb);
298         }
299
300         if (plane_config->vma)
301                 i915_vma_put(plane_config->vma);
302 }
303
304 void intel_crtc_initial_plane_config(struct intel_crtc *crtc)
305 {
306         struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
307         struct intel_initial_plane_config plane_config = {};
308
309         /*
310          * Note that reserving the BIOS fb up front prevents us
311          * from stuffing other stolen allocations like the ring
312          * on top.  This prevents some ugliness at boot time, and
313          * can even allow for smooth boot transitions if the BIOS
314          * fb is large enough for the active pipe configuration.
315          */
316         dev_priv->display.funcs.display->get_initial_plane_config(crtc, &plane_config);
317
318         /*
319          * If the fb is shared between multiple heads, we'll
320          * just get the first one.
321          */
322         intel_find_initial_plane_obj(crtc, &plane_config);
323
324         plane_config_fini(&plane_config);
325 }
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