2 * PCA953x 4/8/16/24/40 bit I/O ports
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_data/pca953x.h>
20 #include <linux/slab.h>
22 #include <linux/of_platform.h>
25 #define PCA953X_INPUT 0
26 #define PCA953X_OUTPUT 1
27 #define PCA953X_INVERT 2
28 #define PCA953X_DIRECTION 3
30 #define REG_ADDR_AI 0x80
33 #define PCA957X_INVRT 1
34 #define PCA957X_BKEN 2
35 #define PCA957X_PUPD 3
39 #define PCA957X_INTS 7
41 #define PCA_GPIO_MASK 0x00FF
42 #define PCA_INT 0x0100
43 #define PCA953X_TYPE 0x1000
44 #define PCA957X_TYPE 0x2000
46 static const struct i2c_device_id pca953x_id[] = {
47 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
48 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
49 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
50 { "pca9536", 4 | PCA953X_TYPE, },
51 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
52 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
53 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
54 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
55 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
56 { "pca9556", 8 | PCA953X_TYPE, },
57 { "pca9557", 8 | PCA953X_TYPE, },
58 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
59 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
60 { "pca9698", 40 | PCA953X_TYPE, },
62 { "max7310", 8 | PCA953X_TYPE, },
63 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
64 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
65 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
66 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
67 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
68 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
69 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
70 { "xra1202", 8 | PCA953X_TYPE },
73 MODULE_DEVICE_TABLE(i2c, pca953x_id);
78 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
82 u8 reg_output[MAX_BANK];
83 u8 reg_direction[MAX_BANK];
84 struct mutex i2c_lock;
86 #ifdef CONFIG_GPIO_PCA953X_IRQ
87 struct mutex irq_lock;
88 u8 irq_mask[MAX_BANK];
89 u8 irq_stat[MAX_BANK];
90 u8 irq_trig_raise[MAX_BANK];
91 u8 irq_trig_fall[MAX_BANK];
94 struct i2c_client *client;
95 struct gpio_chip gpio_chip;
96 const char *const *names;
100 static inline struct pca953x_chip *to_pca(struct gpio_chip *gc)
102 return container_of(gc, struct pca953x_chip, gpio_chip);
105 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
109 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
110 int offset = off / BANK_SZ;
112 ret = i2c_smbus_read_byte_data(chip->client,
113 (reg << bank_shift) + offset);
117 dev_err(&chip->client->dev, "failed reading register\n");
124 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
128 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
129 int offset = off / BANK_SZ;
131 ret = i2c_smbus_write_byte_data(chip->client,
132 (reg << bank_shift) + offset, val);
135 dev_err(&chip->client->dev, "failed writing register\n");
142 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
146 if (chip->gpio_chip.ngpio <= 8)
147 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
148 else if (chip->gpio_chip.ngpio >= 24) {
149 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
150 ret = i2c_smbus_write_i2c_block_data(chip->client,
151 (reg << bank_shift) | REG_ADDR_AI,
154 switch (chip->chip_type) {
156 ret = i2c_smbus_write_word_data(chip->client,
157 reg << 1, (u16) *val);
160 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
164 ret = i2c_smbus_write_byte_data(chip->client,
172 dev_err(&chip->client->dev, "failed writing register\n");
179 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
183 if (chip->gpio_chip.ngpio <= 8) {
184 ret = i2c_smbus_read_byte_data(chip->client, reg);
186 } else if (chip->gpio_chip.ngpio >= 24) {
187 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
189 ret = i2c_smbus_read_i2c_block_data(chip->client,
190 (reg << bank_shift) | REG_ADDR_AI,
193 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
194 val[0] = (u16)ret & 0xFF;
195 val[1] = (u16)ret >> 8;
198 dev_err(&chip->client->dev, "failed reading register\n");
205 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
207 struct pca953x_chip *chip = to_pca(gc);
211 mutex_lock(&chip->i2c_lock);
212 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
214 switch (chip->chip_type) {
216 offset = PCA953X_DIRECTION;
219 offset = PCA957X_CFG;
222 ret = pca953x_write_single(chip, offset, reg_val, off);
226 chip->reg_direction[off / BANK_SZ] = reg_val;
229 mutex_unlock(&chip->i2c_lock);
233 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
234 unsigned off, int val)
236 struct pca953x_chip *chip = to_pca(gc);
240 mutex_lock(&chip->i2c_lock);
241 /* set output level */
243 reg_val = chip->reg_output[off / BANK_SZ]
244 | (1u << (off % BANK_SZ));
246 reg_val = chip->reg_output[off / BANK_SZ]
247 & ~(1u << (off % BANK_SZ));
249 switch (chip->chip_type) {
251 offset = PCA953X_OUTPUT;
254 offset = PCA957X_OUT;
257 ret = pca953x_write_single(chip, offset, reg_val, off);
261 chip->reg_output[off / BANK_SZ] = reg_val;
264 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
265 switch (chip->chip_type) {
267 offset = PCA953X_DIRECTION;
270 offset = PCA957X_CFG;
273 ret = pca953x_write_single(chip, offset, reg_val, off);
277 chip->reg_direction[off / BANK_SZ] = reg_val;
280 mutex_unlock(&chip->i2c_lock);
284 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
286 struct pca953x_chip *chip = to_pca(gc);
290 mutex_lock(&chip->i2c_lock);
291 switch (chip->chip_type) {
293 offset = PCA953X_INPUT;
299 ret = pca953x_read_single(chip, offset, ®_val, off);
300 mutex_unlock(&chip->i2c_lock);
302 /* NOTE: diagnostic already emitted; that's all we should
303 * do unless gpio_*_value_cansleep() calls become different
304 * from their nonsleeping siblings (and report faults).
309 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
312 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
314 struct pca953x_chip *chip = to_pca(gc);
318 mutex_lock(&chip->i2c_lock);
320 reg_val = chip->reg_output[off / BANK_SZ]
321 | (1u << (off % BANK_SZ));
323 reg_val = chip->reg_output[off / BANK_SZ]
324 & ~(1u << (off % BANK_SZ));
326 switch (chip->chip_type) {
328 offset = PCA953X_OUTPUT;
331 offset = PCA957X_OUT;
334 ret = pca953x_write_single(chip, offset, reg_val, off);
338 chip->reg_output[off / BANK_SZ] = reg_val;
340 mutex_unlock(&chip->i2c_lock);
343 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
345 struct gpio_chip *gc;
347 gc = &chip->gpio_chip;
349 gc->direction_input = pca953x_gpio_direction_input;
350 gc->direction_output = pca953x_gpio_direction_output;
351 gc->get = pca953x_gpio_get_value;
352 gc->set = pca953x_gpio_set_value;
353 gc->can_sleep = true;
355 gc->base = chip->gpio_start;
357 gc->label = chip->client->name;
358 gc->dev = &chip->client->dev;
359 gc->owner = THIS_MODULE;
360 gc->names = chip->names;
363 #ifdef CONFIG_GPIO_PCA953X_IRQ
364 static void pca953x_irq_mask(struct irq_data *d)
366 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
367 struct pca953x_chip *chip = to_pca(gc);
369 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
372 static void pca953x_irq_unmask(struct irq_data *d)
374 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
375 struct pca953x_chip *chip = to_pca(gc);
377 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
380 static void pca953x_irq_bus_lock(struct irq_data *d)
382 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
383 struct pca953x_chip *chip = to_pca(gc);
385 mutex_lock(&chip->irq_lock);
388 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
390 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
391 struct pca953x_chip *chip = to_pca(gc);
395 /* Look for any newly setup interrupt */
396 for (i = 0; i < NBANK(chip); i++) {
397 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
398 new_irqs &= ~chip->reg_direction[i];
401 level = __ffs(new_irqs);
402 pca953x_gpio_direction_input(&chip->gpio_chip,
403 level + (BANK_SZ * i));
404 new_irqs &= ~(1 << level);
408 mutex_unlock(&chip->irq_lock);
411 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
413 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
414 struct pca953x_chip *chip = to_pca(gc);
415 int bank_nb = d->hwirq / BANK_SZ;
416 u8 mask = 1 << (d->hwirq % BANK_SZ);
418 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
419 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
424 if (type & IRQ_TYPE_EDGE_FALLING)
425 chip->irq_trig_fall[bank_nb] |= mask;
427 chip->irq_trig_fall[bank_nb] &= ~mask;
429 if (type & IRQ_TYPE_EDGE_RISING)
430 chip->irq_trig_raise[bank_nb] |= mask;
432 chip->irq_trig_raise[bank_nb] &= ~mask;
437 static struct irq_chip pca953x_irq_chip = {
439 .irq_mask = pca953x_irq_mask,
440 .irq_unmask = pca953x_irq_unmask,
441 .irq_bus_lock = pca953x_irq_bus_lock,
442 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
443 .irq_set_type = pca953x_irq_set_type,
446 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
448 u8 cur_stat[MAX_BANK];
449 u8 old_stat[MAX_BANK];
450 bool pending_seen = false;
451 bool trigger_seen = false;
452 u8 trigger[MAX_BANK];
453 int ret, i, offset = 0;
455 switch (chip->chip_type) {
457 offset = PCA953X_INPUT;
463 ret = pca953x_read_regs(chip, offset, cur_stat);
467 /* Remove output pins from the equation */
468 for (i = 0; i < NBANK(chip); i++)
469 cur_stat[i] &= chip->reg_direction[i];
471 memcpy(old_stat, chip->irq_stat, NBANK(chip));
473 for (i = 0; i < NBANK(chip); i++) {
474 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
482 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
484 for (i = 0; i < NBANK(chip); i++) {
485 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
486 (cur_stat[i] & chip->irq_trig_raise[i]);
487 pending[i] &= trigger[i];
495 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
497 struct pca953x_chip *chip = devid;
498 u8 pending[MAX_BANK];
500 unsigned nhandled = 0;
503 if (!pca953x_irq_pending(chip, pending))
506 for (i = 0; i < NBANK(chip); i++) {
508 level = __ffs(pending[i]);
509 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
510 level + (BANK_SZ * i)));
511 pending[i] &= ~(1 << level);
516 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
519 static int pca953x_irq_setup(struct pca953x_chip *chip,
520 const struct i2c_device_id *id,
523 struct i2c_client *client = chip->client;
524 int ret, i, offset = 0;
526 if (client->irq && irq_base != -1
527 && (id->driver_data & PCA_INT)) {
529 switch (chip->chip_type) {
531 offset = PCA953X_INPUT;
537 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
542 * There is no way to know which GPIO line generated the
543 * interrupt. We have to rely on the previous read for
546 for (i = 0; i < NBANK(chip); i++)
547 chip->irq_stat[i] &= chip->reg_direction[i];
548 mutex_init(&chip->irq_lock);
550 ret = devm_request_threaded_irq(&client->dev,
554 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
556 dev_name(&client->dev), chip);
558 dev_err(&client->dev, "failed to request irq %d\n",
563 ret = gpiochip_irqchip_add(&chip->gpio_chip,
569 dev_err(&client->dev,
570 "could not connect irqchip to gpiochip\n");
574 gpiochip_set_chained_irqchip(&chip->gpio_chip,
582 #else /* CONFIG_GPIO_PCA953X_IRQ */
583 static int pca953x_irq_setup(struct pca953x_chip *chip,
584 const struct i2c_device_id *id,
587 struct i2c_client *client = chip->client;
589 if (irq_base != -1 && (id->driver_data & PCA_INT))
590 dev_warn(&client->dev, "interrupt support not compiled in\n");
596 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
601 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
605 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
606 chip->reg_direction);
610 /* set platform specific polarity inversion */
612 memset(val, 0xFF, NBANK(chip));
614 memset(val, 0, NBANK(chip));
616 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
621 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
626 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
629 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
633 /* set platform specific polarity inversion */
635 memset(val, 0xFF, NBANK(chip));
637 memset(val, 0, NBANK(chip));
638 pca953x_write_regs(chip, PCA957X_INVRT, val);
640 /* To enable register 6, 7 to control pull up and pull down */
641 memset(val, 0x02, NBANK(chip));
642 pca953x_write_regs(chip, PCA957X_BKEN, val);
649 static int pca953x_probe(struct i2c_client *client,
650 const struct i2c_device_id *id)
652 struct pca953x_platform_data *pdata;
653 struct pca953x_chip *chip;
658 chip = devm_kzalloc(&client->dev,
659 sizeof(struct pca953x_chip), GFP_KERNEL);
663 pdata = dev_get_platdata(&client->dev);
665 irq_base = pdata->irq_base;
666 chip->gpio_start = pdata->gpio_base;
667 invert = pdata->invert;
668 chip->names = pdata->names;
670 chip->gpio_start = -1;
674 chip->client = client;
676 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
678 mutex_init(&chip->i2c_lock);
680 /* initialize cached registers from their original values.
681 * we can't share this chip with another i2c master.
683 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
685 if (chip->chip_type == PCA953X_TYPE)
686 ret = device_pca953x_init(chip, invert);
688 ret = device_pca957x_init(chip, invert);
692 ret = gpiochip_add(&chip->gpio_chip);
696 ret = pca953x_irq_setup(chip, id, irq_base);
700 if (pdata && pdata->setup) {
701 ret = pdata->setup(client, chip->gpio_chip.base,
702 chip->gpio_chip.ngpio, pdata->context);
704 dev_warn(&client->dev, "setup failed, %d\n", ret);
707 i2c_set_clientdata(client, chip);
711 static int pca953x_remove(struct i2c_client *client)
713 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
714 struct pca953x_chip *chip = i2c_get_clientdata(client);
717 if (pdata && pdata->teardown) {
718 ret = pdata->teardown(client, chip->gpio_chip.base,
719 chip->gpio_chip.ngpio, pdata->context);
721 dev_err(&client->dev, "%s failed, %d\n",
727 gpiochip_remove(&chip->gpio_chip);
732 static const struct of_device_id pca953x_dt_ids[] = {
733 { .compatible = "nxp,pca9505", },
734 { .compatible = "nxp,pca9534", },
735 { .compatible = "nxp,pca9535", },
736 { .compatible = "nxp,pca9536", },
737 { .compatible = "nxp,pca9537", },
738 { .compatible = "nxp,pca9538", },
739 { .compatible = "nxp,pca9539", },
740 { .compatible = "nxp,pca9554", },
741 { .compatible = "nxp,pca9555", },
742 { .compatible = "nxp,pca9556", },
743 { .compatible = "nxp,pca9557", },
744 { .compatible = "nxp,pca9574", },
745 { .compatible = "nxp,pca9575", },
746 { .compatible = "nxp,pca9698", },
748 { .compatible = "maxim,max7310", },
749 { .compatible = "maxim,max7312", },
750 { .compatible = "maxim,max7313", },
751 { .compatible = "maxim,max7315", },
753 { .compatible = "ti,pca6107", },
754 { .compatible = "ti,tca6408", },
755 { .compatible = "ti,tca6416", },
756 { .compatible = "ti,tca6424", },
758 { .compatible = "exar,xra1202", },
762 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
764 static struct i2c_driver pca953x_driver = {
767 .of_match_table = pca953x_dt_ids,
769 .probe = pca953x_probe,
770 .remove = pca953x_remove,
771 .id_table = pca953x_id,
774 static int __init pca953x_init(void)
776 return i2c_add_driver(&pca953x_driver);
778 /* register after i2c postcore initcall and before
779 * subsys initcalls that may rely on these GPIOs
781 subsys_initcall(pca953x_init);
783 static void __exit pca953x_exit(void)
785 i2c_del_driver(&pca953x_driver);
787 module_exit(pca953x_exit);
790 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
791 MODULE_LICENSE("GPL");