1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PWM device driver for ST SoCs
5 * Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited
11 #include <linux/clk.h>
12 #include <linux/interrupt.h>
13 #include <linux/math64.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/regmap.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <linux/time.h>
23 #include <linux/wait.h>
25 #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */
26 #define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */
27 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
29 #define STI_PWM_CTRL 0x50 /* Control/Config register */
30 #define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
31 #define STI_INT_STA 0x58 /* Interrupt Status register */
32 #define PWM_INT_ACK 0x5c
33 #define PWM_PRESCALE_LOW_MASK 0x0f
34 #define PWM_PRESCALE_HIGH_MASK 0xf0
35 #define PWM_CPT_EDGE_MASK 0x03
36 #define PWM_INT_ACK_MASK 0x1ff
38 #define STI_MAX_CPT_DEVS 4
39 #define CPT_DC_MAX 0xff
59 * Each capture input can be programmed to detect rising-edge, falling-edge,
60 * either edge or neither egde.
69 struct sti_cpt_ddata {
73 wait_queue_head_t wait;
80 struct regmap *regmap;
81 unsigned int pwm_num_devs;
82 unsigned int cpt_num_devs;
83 unsigned int max_pwm_cnt;
84 unsigned int max_prescale;
85 struct sti_cpt_ddata *ddata;
86 struct regmap_field *prescale_low;
87 struct regmap_field *prescale_high;
88 struct regmap_field *pwm_out_en;
89 struct regmap_field *pwm_cpt_en;
90 struct regmap_field *pwm_cpt_int_en;
91 struct regmap_field *pwm_cpt_int_stat;
92 struct pwm_device *cur;
93 unsigned long configured;
94 unsigned int en_count;
95 struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
99 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
100 [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
101 [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
102 [CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
103 [PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
104 [PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
105 [PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
106 [PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
109 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
111 return pwmchip_get_drvdata(chip);
115 * Calculate the prescaler value corresponding to the period.
117 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
118 unsigned int *prescale)
120 unsigned long clk_rate;
124 clk_rate = clk_get_rate(pc->pwm_clk);
126 dev_err(pc->dev, "failed to get clock rate\n");
131 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1
133 value = NSEC_PER_SEC / clk_rate;
134 value *= pc->max_pwm_cnt + 1;
139 ps = period / value - 1;
140 if (ps > pc->max_prescale)
149 * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The
150 * only way to change the period (apart from changing the PWM input clock) is
151 * to change the PWM clock prescaler.
153 * The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible
154 * period values are supported (for a particular clock rate). The requested
155 * period will be applied only if it matches one of these 256 values.
157 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
158 int duty_ns, int period_ns)
160 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
161 unsigned int ncfg, value, prescale = 0;
162 struct pwm_device *cur = pc->cur;
163 struct device *dev = pc->dev;
164 bool period_same = false;
167 ncfg = hweight_long(pc->configured);
169 period_same = (period_ns == pwm_get_period(cur));
172 * Allow configuration changes if one of the following conditions
174 * 1. No devices have been configured.
175 * 2. Only one device has been configured and the new request is for
177 * 3. Only one device has been configured and the new request is for
178 * a new device and period of the new device is same as the current
180 * 4. More than one devices are configured and period of the new
181 * requestis the same as the current period.
184 ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
185 ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
186 ((ncfg > 1) && period_same)) {
187 /* Enable clock before writing to PWM registers. */
188 ret = clk_enable(pc->pwm_clk);
192 ret = clk_enable(pc->cpt_clk);
197 ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
201 value = prescale & PWM_PRESCALE_LOW_MASK;
203 ret = regmap_field_write(pc->prescale_low, value);
207 value = (prescale & PWM_PRESCALE_HIGH_MASK) >> 4;
209 ret = regmap_field_write(pc->prescale_high, value);
215 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
216 * When PWMVal == max_pwm_count,
217 * PWM pulse = (max_pwm_count + 1) local cycles,
218 * that is continuous pulse: signal never goes low.
220 value = pc->max_pwm_cnt * duty_ns / period_ns;
222 ret = regmap_write(pc->regmap, PWM_OUT_VAL(pwm->hwpwm), value);
226 ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
228 set_bit(pwm->hwpwm, &pc->configured);
231 dev_dbg(dev, "prescale:%u, period:%i, duty:%i, value:%u\n",
232 prescale, period_ns, duty_ns, value);
238 clk_disable(pc->pwm_clk);
239 clk_disable(pc->cpt_clk);
243 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
245 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
246 struct device *dev = pc->dev;
250 * Since we have a common enable for all PWM devices, do not enable if
253 mutex_lock(&pc->sti_pwm_lock);
256 ret = clk_enable(pc->pwm_clk);
260 ret = clk_enable(pc->cpt_clk);
264 ret = regmap_field_write(pc->pwm_out_en, 1);
266 dev_err(dev, "failed to enable PWM device %u: %d\n",
275 mutex_unlock(&pc->sti_pwm_lock);
279 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
281 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
283 mutex_lock(&pc->sti_pwm_lock);
285 if (--pc->en_count) {
286 mutex_unlock(&pc->sti_pwm_lock);
290 regmap_field_write(pc->pwm_out_en, 0);
292 clk_disable(pc->pwm_clk);
293 clk_disable(pc->cpt_clk);
295 mutex_unlock(&pc->sti_pwm_lock);
298 static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
300 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
302 clear_bit(pwm->hwpwm, &pc->configured);
305 static int sti_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
306 struct pwm_capture *result, unsigned long timeout)
308 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
309 struct sti_cpt_ddata *ddata = &pc->ddata[pwm->hwpwm];
310 struct device *dev = pc->dev;
311 unsigned int effective_ticks;
312 unsigned long long high, low;
315 if (pwm->hwpwm >= pc->cpt_num_devs) {
316 dev_err(dev, "device %u is not valid\n", pwm->hwpwm);
320 mutex_lock(&ddata->lock);
323 /* Prepare capture measurement */
324 regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_RISING);
325 regmap_field_write(pc->pwm_cpt_int_en, BIT(pwm->hwpwm));
328 ret = regmap_field_write(pc->pwm_cpt_en, 1);
330 dev_err(dev, "failed to enable PWM capture %u: %d\n",
335 ret = wait_event_interruptible_timeout(ddata->wait, ddata->index > 1,
336 msecs_to_jiffies(timeout));
338 regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_DISABLED);
340 if (ret == -ERESTARTSYS)
343 switch (ddata->index) {
347 * Getting here could mean:
348 * - input signal is constant of less than 1 Hz
349 * - there is no input signal at all
351 * In such case the frequency is rounded down to 0
354 result->duty_cycle = 0;
359 /* We have everying we need */
360 high = ddata->snapshot[1] - ddata->snapshot[0];
361 low = ddata->snapshot[2] - ddata->snapshot[1];
363 effective_ticks = clk_get_rate(pc->cpt_clk);
365 result->period = (high + low) * NSEC_PER_SEC;
366 result->period /= effective_ticks;
368 result->duty_cycle = high * NSEC_PER_SEC;
369 result->duty_cycle /= effective_ticks;
374 dev_err(dev, "internal error\n");
379 /* Disable capture */
380 regmap_field_write(pc->pwm_cpt_en, 0);
382 mutex_unlock(&ddata->lock);
386 static int sti_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
387 const struct pwm_state *state)
389 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
390 struct device *dev = pc->dev;
393 if (pwm->hwpwm >= pc->pwm_num_devs) {
394 dev_err(dev, "device %u is not valid for pwm mode\n",
399 if (state->polarity != PWM_POLARITY_NORMAL)
402 if (!state->enabled) {
403 if (pwm->state.enabled)
404 sti_pwm_disable(chip, pwm);
409 err = sti_pwm_config(chip, pwm, state->duty_cycle, state->period);
413 if (!pwm->state.enabled)
414 err = sti_pwm_enable(chip, pwm);
419 static const struct pwm_ops sti_pwm_ops = {
420 .capture = sti_pwm_capture,
421 .apply = sti_pwm_apply,
422 .free = sti_pwm_free,
425 static irqreturn_t sti_pwm_interrupt(int irq, void *data)
427 struct sti_pwm_chip *pc = data;
428 struct device *dev = pc->dev;
429 struct sti_cpt_ddata *ddata;
431 unsigned int cpt_int_stat;
435 ret = regmap_field_read(pc->pwm_cpt_int_stat, &cpt_int_stat);
439 while (cpt_int_stat) {
440 devicenum = ffs(cpt_int_stat) - 1;
442 ddata = &pc->ddata[devicenum];
448 * __| |_________________| |________
451 * Capture start by the first available rising edge. When a
452 * capture event occurs, capture value (CPT_VALx) is stored,
453 * index incremented, capture edge changed.
455 * After the capture, if the index > 1, we have collected the
456 * necessary data so we signal the thread waiting for it and
457 * disable the capture by setting capture edge to none
460 regmap_read(pc->regmap,
461 PWM_CPT_VAL(devicenum),
462 &ddata->snapshot[ddata->index]);
464 switch (ddata->index) {
467 regmap_read(pc->regmap, PWM_CPT_EDGE(devicenum), ®);
468 reg ^= PWM_CPT_EDGE_MASK;
469 regmap_write(pc->regmap, PWM_CPT_EDGE(devicenum), reg);
475 regmap_write(pc->regmap,
476 PWM_CPT_EDGE(devicenum),
478 wake_up(&ddata->wait);
482 dev_err(dev, "Internal error\n");
485 cpt_int_stat &= ~BIT_MASK(devicenum);
490 /* Just ACK everything */
491 regmap_write(pc->regmap, PWM_INT_ACK, PWM_INT_ACK_MASK);
496 static int sti_pwm_probe_regmap(struct sti_pwm_chip *pc)
498 struct device *dev = pc->dev;
500 pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
501 sti_pwm_regfields[PWMCLK_PRESCALE_LOW]);
502 if (IS_ERR(pc->prescale_low))
503 return PTR_ERR(pc->prescale_low);
505 pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
506 sti_pwm_regfields[PWMCLK_PRESCALE_HIGH]);
507 if (IS_ERR(pc->prescale_high))
508 return PTR_ERR(pc->prescale_high);
510 pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
511 sti_pwm_regfields[PWM_OUT_EN]);
512 if (IS_ERR(pc->pwm_out_en))
513 return PTR_ERR(pc->pwm_out_en);
515 pc->pwm_cpt_en = devm_regmap_field_alloc(dev, pc->regmap,
516 sti_pwm_regfields[PWM_CPT_EN]);
517 if (IS_ERR(pc->pwm_cpt_en))
518 return PTR_ERR(pc->pwm_cpt_en);
520 pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
521 sti_pwm_regfields[PWM_CPT_INT_EN]);
522 if (IS_ERR(pc->pwm_cpt_int_en))
523 return PTR_ERR(pc->pwm_cpt_int_en);
525 pc->pwm_cpt_int_stat = devm_regmap_field_alloc(dev, pc->regmap,
526 sti_pwm_regfields[PWM_CPT_INT_STAT]);
527 if (PTR_ERR_OR_ZERO(pc->pwm_cpt_int_stat))
528 return PTR_ERR(pc->pwm_cpt_int_stat);
533 static const struct regmap_config sti_pwm_regmap_config = {
539 static int sti_pwm_probe(struct platform_device *pdev)
541 struct device *dev = &pdev->dev;
542 struct device_node *np = dev->of_node;
544 unsigned int pwm_num_devs = 0;
545 unsigned int cpt_num_devs = 0;
546 struct pwm_chip *chip;
547 struct sti_pwm_chip *pc;
551 ret = of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
553 pwm_num_devs = num_devs;
555 ret = of_property_read_u32(np, "st,capture-num-chan", &num_devs);
557 cpt_num_devs = num_devs;
559 if (!pwm_num_devs && !cpt_num_devs)
560 return dev_err_probe(dev, -EINVAL, "No channels configured\n");
562 chip = devm_pwmchip_alloc(dev, max(pwm_num_devs, cpt_num_devs), sizeof(*pc));
564 return PTR_ERR(chip);
565 pc = to_sti_pwmchip(chip);
567 pc->mmio = devm_platform_ioremap_resource(pdev, 0);
568 if (IS_ERR(pc->mmio))
569 return PTR_ERR(pc->mmio);
571 pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
572 &sti_pwm_regmap_config);
573 if (IS_ERR(pc->regmap))
574 return dev_err_probe(dev, PTR_ERR(pc->regmap),
575 "Failed to initialize regmap\n");
577 irq = platform_get_irq(pdev, 0);
581 ret = devm_request_irq(&pdev->dev, irq, sti_pwm_interrupt, 0,
584 dev_err_probe(&pdev->dev, ret, "Failed to request IRQ\n");
587 * Setup PWM data with default values: some values could be replaced
588 * with specific ones provided from Device Tree.
590 pc->max_prescale = 0xff;
591 pc->max_pwm_cnt = 255;
592 pc->pwm_num_devs = pwm_num_devs;
593 pc->cpt_num_devs = cpt_num_devs;
597 mutex_init(&pc->sti_pwm_lock);
599 ret = sti_pwm_probe_regmap(pc);
601 return dev_err_probe(dev, ret, "Failed to initialize regmap fields\n");
604 pc->pwm_clk = devm_clk_get_prepared(dev, "pwm");
605 if (IS_ERR(pc->pwm_clk))
606 return dev_err_probe(dev, PTR_ERR(pc->pwm_clk),
607 "failed to get PWM clock\n");
611 pc->cpt_clk = devm_clk_get_prepared(dev, "capture");
612 if (IS_ERR(pc->cpt_clk))
613 return dev_err_probe(dev, PTR_ERR(pc->cpt_clk),
614 "failed to get PWM capture clock\n");
616 pc->ddata = devm_kcalloc(dev, cpt_num_devs,
617 sizeof(*pc->ddata), GFP_KERNEL);
621 for (i = 0; i < cpt_num_devs; i++) {
622 struct sti_cpt_ddata *ddata = &pc->ddata[i];
624 init_waitqueue_head(&ddata->wait);
625 mutex_init(&ddata->lock);
629 chip->ops = &sti_pwm_ops;
631 ret = devm_pwmchip_add(dev, chip);
633 return dev_err_probe(dev, ret, "Failed to register pwm chip\n");
638 static const struct of_device_id sti_pwm_of_match[] = {
639 { .compatible = "st,sti-pwm", },
642 MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
644 static struct platform_driver sti_pwm_driver = {
647 .of_match_table = sti_pwm_of_match,
649 .probe = sti_pwm_probe,
651 module_platform_driver(sti_pwm_driver);
654 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
655 MODULE_LICENSE("GPL");