drivers/net/phy/phylink.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * phylink models the MAC to optional PHY connection, supporting
   4  * technologies such as SFP cages where the PHY is hot-pluggable.
   5  *
   6  * Copyright (C) 2015 Russell King
   7  */
   8 #include <linux/acpi.h>
   9 #include <linux/ethtool.h>
  10 #include <linux/export.h>
  11 #include <linux/gpio/consumer.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/of.h>
  14 #include <linux/of_mdio.h>
  15 #include <linux/phy.h>
  16 #include <linux/phy_fixed.h>
  17 #include <linux/phylink.h>
  18 #include <linux/rtnetlink.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/timer.h>
  21 #include <linux/workqueue.h>
  22
  23 #include "sfp.h"
  24 #include "swphy.h"
  25
  26 #define SUPPORTED_INTERFACES \
  27         (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  28          SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  29 #define ADVERTISED_INTERFACES \
  30         (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  31          ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  32
  33 enum {
  34         PHYLINK_DISABLE_STOPPED,
  35         PHYLINK_DISABLE_LINK,
  36         PHYLINK_DISABLE_MAC_WOL,
  37 };
  38
  39 /**
  40  * struct phylink - internal data type for phylink
  41  */
  42 struct phylink {
  43         /* private: */
  44         struct net_device *netdev;
  45         const struct phylink_mac_ops *mac_ops;
  46         struct phylink_config *config;
  47         struct phylink_pcs *pcs;
  48         struct device *dev;
  49         unsigned int old_link_state:1;
  50
  51         unsigned long phylink_disable_state; /* bitmask of disables */
  52         struct phy_device *phydev;
  53         phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
  54         u8 cfg_link_an_mode;            /* MLO_AN_xxx */
  55         u8 cur_link_an_mode;
  56         u8 link_port;                   /* The current non-phy ethtool port */
  57         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  58
  59         /* The link configuration settings */
  60         struct phylink_link_state link_config;
  61
  62         /* The current settings */
  63         phy_interface_t cur_interface;
  64
  65         struct gpio_desc *link_gpio;
  66         unsigned int link_irq;
  67         struct timer_list link_poll;
  68         void (*get_fixed_state)(struct net_device *dev,
  69                                 struct phylink_link_state *s);
  70
  71         struct mutex state_mutex;
  72         struct phylink_link_state phy_state;
  73         struct work_struct resolve;
  74         unsigned int pcs_neg_mode;
  75
  76         bool mac_link_dropped;
  77         bool using_mac_select_pcs;
  78
  79         struct sfp_bus *sfp_bus;
  80         bool sfp_may_have_phy;
  81         DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  82         __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  83         u8 sfp_port;
  84 };
  85
  86 #define phylink_printk(level, pl, fmt, ...) \
  87         do { \
  88                 if ((pl)->config->type == PHYLINK_NETDEV) \
  89                         netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  90                 else if ((pl)->config->type == PHYLINK_DEV) \
  91                         dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  92         } while (0)
  93
  94 #define phylink_err(pl, fmt, ...) \
  95         phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
  96 #define phylink_warn(pl, fmt, ...) \
  97         phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
  98 #define phylink_info(pl, fmt, ...) \
  99         phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
 100 #if defined(CONFIG_DYNAMIC_DEBUG)
 101 #define phylink_dbg(pl, fmt, ...) \
 102 do {                                                                    \
 103         if ((pl)->config->type == PHYLINK_NETDEV)                       \
 104                 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);           \
 105         else if ((pl)->config->type == PHYLINK_DEV)                     \
 106                 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);                 \
 107 } while (0)
 108 #elif defined(DEBUG)
 109 #define phylink_dbg(pl, fmt, ...)                                       \
 110         phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
 111 #else
 112 #define phylink_dbg(pl, fmt, ...)                                       \
 113 ({                                                                      \
 114         if (0)                                                          \
 115                 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);     \
 116 })
 117 #endif
 118
 119 /**
 120  * phylink_set_port_modes() - set the port type modes in the ethtool mask
 121  * @mask: ethtool link mode mask
 122  *
 123  * Sets all the port type modes in the ethtool mask.  MAC drivers should
 124  * use this in their 'validate' callback.
 125  */
 126 void phylink_set_port_modes(unsigned long *mask)
 127 {
 128         phylink_set(mask, TP);
 129         phylink_set(mask, AUI);
 130         phylink_set(mask, MII);
 131         phylink_set(mask, FIBRE);
 132         phylink_set(mask, BNC);
 133         phylink_set(mask, Backplane);
 134 }
 135 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
 136
 137 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
 138 {
 139         __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
 140
 141         phylink_set_port_modes(tmp);
 142         phylink_set(tmp, Autoneg);
 143         phylink_set(tmp, Pause);
 144         phylink_set(tmp, Asym_Pause);
 145
 146         return linkmode_subset(linkmode, tmp);
 147 }
 148
 149 static const char *phylink_an_mode_str(unsigned int mode)
 150 {
 151         static const char *modestr[] = {
 152                 [MLO_AN_PHY] = "phy",
 153                 [MLO_AN_FIXED] = "fixed",
 154                 [MLO_AN_INBAND] = "inband",
 155         };
 156
 157         return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
 158 }
 159
 160 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
 161 {
 162         switch (interface) {
 163         case PHY_INTERFACE_MODE_SGMII:
 164         case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
 165                 return 1250;
 166         case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
 167                 return 3125;
 168         case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
 169                 return 5156;
 170         case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
 171                 return 10313;
 172         default:
 173                 return 0;
 174         }
 175 }
 176
 177 /**
 178  * phylink_interface_max_speed() - get the maximum speed of a phy interface
 179  * @interface: phy interface mode defined by &typedef phy_interface_t
 180  *
 181  * Determine the maximum speed of a phy interface. This is intended to help
 182  * determine the correct speed to pass to the MAC when the phy is performing
 183  * rate matching.
 184  *
 185  * Return: The maximum speed of @interface
 186  */
 187 static int phylink_interface_max_speed(phy_interface_t interface)
 188 {
 189         switch (interface) {
 190         case PHY_INTERFACE_MODE_100BASEX:
 191         case PHY_INTERFACE_MODE_REVRMII:
 192         case PHY_INTERFACE_MODE_RMII:
 193         case PHY_INTERFACE_MODE_SMII:
 194         case PHY_INTERFACE_MODE_REVMII:
 195         case PHY_INTERFACE_MODE_MII:
 196                 return SPEED_100;
 197
 198         case PHY_INTERFACE_MODE_TBI:
 199         case PHY_INTERFACE_MODE_MOCA:
 200         case PHY_INTERFACE_MODE_RTBI:
 201         case PHY_INTERFACE_MODE_1000BASEX:
 202         case PHY_INTERFACE_MODE_1000BASEKX:
 203         case PHY_INTERFACE_MODE_TRGMII:
 204         case PHY_INTERFACE_MODE_RGMII_TXID:
 205         case PHY_INTERFACE_MODE_RGMII_RXID:
 206         case PHY_INTERFACE_MODE_RGMII_ID:
 207         case PHY_INTERFACE_MODE_RGMII:
 208         case PHY_INTERFACE_MODE_QSGMII:
 209         case PHY_INTERFACE_MODE_QUSGMII:
 210         case PHY_INTERFACE_MODE_SGMII:
 211         case PHY_INTERFACE_MODE_GMII:
 212                 return SPEED_1000;
 213
 214         case PHY_INTERFACE_MODE_2500BASEX:
 215                 return SPEED_2500;
 216
 217         case PHY_INTERFACE_MODE_5GBASER:
 218                 return SPEED_5000;
 219
 220         case PHY_INTERFACE_MODE_XGMII:
 221         case PHY_INTERFACE_MODE_RXAUI:
 222         case PHY_INTERFACE_MODE_XAUI:
 223         case PHY_INTERFACE_MODE_10GBASER:
 224         case PHY_INTERFACE_MODE_10GKR:
 225         case PHY_INTERFACE_MODE_USXGMII:
 226                 return SPEED_10000;
 227
 228         case PHY_INTERFACE_MODE_25GBASER:
 229                 return SPEED_25000;
 230
 231         case PHY_INTERFACE_MODE_XLGMII:
 232                 return SPEED_40000;
 233
 234         case PHY_INTERFACE_MODE_INTERNAL:
 235         case PHY_INTERFACE_MODE_NA:
 236         case PHY_INTERFACE_MODE_MAX:
 237                 /* No idea! Garbage in, unknown out */
 238                 return SPEED_UNKNOWN;
 239         }
 240
 241         /* If we get here, someone forgot to add an interface mode above */
 242         WARN_ON_ONCE(1);
 243         return SPEED_UNKNOWN;
 244 }
 245
 246 /**
 247  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
 248  * @linkmodes: ethtool linkmode mask (must be already initialised)
 249  * @caps: bitmask of MAC capabilities
 250  *
 251  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
 252  * supported by the @caps. @linkmodes must have been initialised previously.
 253  */
 254 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
 255 {
 256         if (caps & MAC_SYM_PAUSE)
 257                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
 258
 259         if (caps & MAC_ASYM_PAUSE)
 260                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
 261
 262         if (caps & MAC_10HD) {
 263                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
 264                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
 265                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
 266         }
 267
 268         if (caps & MAC_10FD) {
 269                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
 270                 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
 271                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
 272         }
 273
 274         if (caps & MAC_100HD) {
 275                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
 276                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
 277         }
 278
 279         if (caps & MAC_100FD) {
 280                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
 281                 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
 282                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
 283         }
 284
 285         if (caps & MAC_1000HD)
 286                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
 287
 288         if (caps & MAC_1000FD) {
 289                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
 290                 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
 291                 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
 292                 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
 293         }
 294
 295         if (caps & MAC_2500FD) {
 296                 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
 297                 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
 298         }
 299
 300         if (caps & MAC_5000FD)
 301                 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
 302
 303         if (caps & MAC_10000FD) {
 304                 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
 305                 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
 306                 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
 307                 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
 308                 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
 309                 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
 310                 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
 311                 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
 312                 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
 313         }
 314
 315         if (caps & MAC_25000FD) {
 316                 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 317                 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
 318                 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 319         }
 320
 321         if (caps & MAC_40000FD) {
 322                 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
 323                 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
 324                 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
 325                 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
 326         }
 327
 328         if (caps & MAC_50000FD) {
 329                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
 330                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
 331                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
 332                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
 333                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
 334                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
 335                 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 336                           linkmodes);
 337                 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
 338         }
 339
 340         if (caps & MAC_56000FD) {
 341                 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
 342                 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
 343                 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
 344                 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
 345         }
 346
 347         if (caps & MAC_100000FD) {
 348                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
 349                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
 350                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
 351                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
 352                           linkmodes);
 353                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
 354                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
 355                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
 356                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 357                           linkmodes);
 358                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
 359                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
 360                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
 361                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 362                           linkmodes);
 363                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
 364                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
 365         }
 366
 367         if (caps & MAC_200000FD) {
 368                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
 369                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
 370                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 371                           linkmodes);
 372                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
 373                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
 374                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
 375                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
 376                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 377                           linkmodes);
 378                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
 379                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
 380         }
 381
 382         if (caps & MAC_400000FD) {
 383                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
 384                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
 385                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
 386                           linkmodes);
 387                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
 388                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
 389                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
 390                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
 391                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 392                           linkmodes);
 393                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
 394                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
 395         }
 396 }
 397 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
 398
 399 static struct {
 400         unsigned long mask;
 401         int speed;
 402         unsigned int duplex;
 403 } phylink_caps_params[] = {
 404         { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
 405         { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
 406         { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
 407         { MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
 408         { MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
 409         { MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
 410         { MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
 411         { MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
 412         { MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
 413         { MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
 414         { MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
 415         { MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
 416         { MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
 417         { MAC_100FD,    SPEED_100,    DUPLEX_FULL },
 418         { MAC_100HD,    SPEED_100,    DUPLEX_HALF },
 419         { MAC_10FD,     SPEED_10,     DUPLEX_FULL },
 420         { MAC_10HD,     SPEED_10,     DUPLEX_HALF },
 421 };
 422
 423 /**
 424  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
 425  * @speed: the speed to search for
 426  * @duplex: the duplex to search for
 427  *
 428  * Find the mac capability for a given speed and duplex.
 429  *
 430  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
 431  *         there were no matches.
 432  */
 433 static unsigned long phylink_cap_from_speed_duplex(int speed,
 434                                                    unsigned int duplex)
 435 {
 436         int i;
 437
 438         for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
 439                 if (speed == phylink_caps_params[i].speed &&
 440                     duplex == phylink_caps_params[i].duplex)
 441                         return phylink_caps_params[i].mask;
 442         }
 443
 444         return 0;
 445 }
 446
 447 /**
 448  * phylink_get_capabilities() - get capabilities for a given MAC
 449  * @interface: phy interface mode defined by &typedef phy_interface_t
 450  * @mac_capabilities: bitmask of MAC capabilities
 451  * @rate_matching: type of rate matching being performed
 452  *
 453  * Get the MAC capabilities that are supported by the @interface mode and
 454  * @mac_capabilities.
 455  */
 456 unsigned long phylink_get_capabilities(phy_interface_t interface,
 457                                        unsigned long mac_capabilities,
 458                                        int rate_matching)
 459 {
 460         int max_speed = phylink_interface_max_speed(interface);
 461         unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 462         unsigned long matched_caps = 0;
 463
 464         switch (interface) {
 465         case PHY_INTERFACE_MODE_USXGMII:
 466                 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
 467                 fallthrough;
 468
 469         case PHY_INTERFACE_MODE_RGMII_TXID:
 470         case PHY_INTERFACE_MODE_RGMII_RXID:
 471         case PHY_INTERFACE_MODE_RGMII_ID:
 472         case PHY_INTERFACE_MODE_RGMII:
 473         case PHY_INTERFACE_MODE_QSGMII:
 474         case PHY_INTERFACE_MODE_QUSGMII:
 475         case PHY_INTERFACE_MODE_SGMII:
 476         case PHY_INTERFACE_MODE_GMII:
 477                 caps |= MAC_1000HD | MAC_1000FD;
 478                 fallthrough;
 479
 480         case PHY_INTERFACE_MODE_REVRMII:
 481         case PHY_INTERFACE_MODE_RMII:
 482         case PHY_INTERFACE_MODE_SMII:
 483         case PHY_INTERFACE_MODE_REVMII:
 484         case PHY_INTERFACE_MODE_MII:
 485                 caps |= MAC_10HD | MAC_10FD;
 486                 fallthrough;
 487
 488         case PHY_INTERFACE_MODE_100BASEX:
 489                 caps |= MAC_100HD | MAC_100FD;
 490                 break;
 491
 492         case PHY_INTERFACE_MODE_TBI:
 493         case PHY_INTERFACE_MODE_MOCA:
 494         case PHY_INTERFACE_MODE_RTBI:
 495         case PHY_INTERFACE_MODE_1000BASEX:
 496                 caps |= MAC_1000HD;
 497                 fallthrough;
 498         case PHY_INTERFACE_MODE_1000BASEKX:
 499         case PHY_INTERFACE_MODE_TRGMII:
 500                 caps |= MAC_1000FD;
 501                 break;
 502
 503         case PHY_INTERFACE_MODE_2500BASEX:
 504                 caps |= MAC_2500FD;
 505                 break;
 506
 507         case PHY_INTERFACE_MODE_5GBASER:
 508                 caps |= MAC_5000FD;
 509                 break;
 510
 511         case PHY_INTERFACE_MODE_XGMII:
 512         case PHY_INTERFACE_MODE_RXAUI:
 513         case PHY_INTERFACE_MODE_XAUI:
 514         case PHY_INTERFACE_MODE_10GBASER:
 515         case PHY_INTERFACE_MODE_10GKR:
 516                 caps |= MAC_10000FD;
 517                 break;
 518
 519         case PHY_INTERFACE_MODE_25GBASER:
 520                 caps |= MAC_25000FD;
 521                 break;
 522
 523         case PHY_INTERFACE_MODE_XLGMII:
 524                 caps |= MAC_40000FD;
 525                 break;
 526
 527         case PHY_INTERFACE_MODE_INTERNAL:
 528                 caps |= ~0;
 529                 break;
 530
 531         case PHY_INTERFACE_MODE_NA:
 532         case PHY_INTERFACE_MODE_MAX:
 533                 break;
 534         }
 535
 536         switch (rate_matching) {
 537         case RATE_MATCH_OPEN_LOOP:
 538                 /* TODO */
 539                 fallthrough;
 540         case RATE_MATCH_NONE:
 541                 matched_caps = 0;
 542                 break;
 543         case RATE_MATCH_PAUSE: {
 544                 /* The MAC must support asymmetric pause towards the local
 545                  * device for this. We could allow just symmetric pause, but
 546                  * then we might have to renegotiate if the link partner
 547                  * doesn't support pause. This is because there's no way to
 548                  * accept pause frames without transmitting them if we only
 549                  * support symmetric pause.
 550                  */
 551                 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
 552                     !(mac_capabilities & MAC_ASYM_PAUSE))
 553                         break;
 554
 555                 /* We can't adapt if the MAC doesn't support the interface's
 556                  * max speed at full duplex.
 557                  */
 558                 if (mac_capabilities &
 559                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
 560                         /* Although a duplex-matching phy might exist, we
 561                          * conservatively remove these modes because the MAC
 562                          * will not be aware of the half-duplex nature of the
 563                          * link.
 564                          */
 565                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 566                         matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
 567                 }
 568                 break;
 569         }
 570         case RATE_MATCH_CRS:
 571                 /* The MAC must support half duplex at the interface's max
 572                  * speed.
 573                  */
 574                 if (mac_capabilities &
 575                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
 576                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 577                         matched_caps &= mac_capabilities;
 578                 }
 579                 break;
 580         }
 581
 582         return (caps & mac_capabilities) | matched_caps;
 583 }
 584 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
 585
 586 /**
 587  * phylink_validate_mask_caps() - Restrict link modes based on caps
 588  * @supported: ethtool bitmask for supported link modes.
 589  * @state: pointer to a &struct phylink_link_state.
 590  * @mac_capabilities: bitmask of MAC capabilities
 591  *
 592  * Calculate the supported link modes based on @mac_capabilities, and restrict
 593  * @supported and @state based on that. Use this function if your capabiliies
 594  * aren't constant, such as if they vary depending on the interface.
 595  */
 596 void phylink_validate_mask_caps(unsigned long *supported,
 597                                 struct phylink_link_state *state,
 598                                 unsigned long mac_capabilities)
 599 {
 600         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 601         unsigned long caps;
 602
 603         phylink_set_port_modes(mask);
 604         phylink_set(mask, Autoneg);
 605         caps = phylink_get_capabilities(state->interface, mac_capabilities,
 606                                         state->rate_matching);
 607         phylink_caps_to_linkmodes(mask, caps);
 608
 609         linkmode_and(supported, supported, mask);
 610         linkmode_and(state->advertising, state->advertising, mask);
 611 }
 612 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps);
 613
 614 /**
 615  * phylink_generic_validate() - generic validate() callback implementation
 616  * @config: a pointer to a &struct phylink_config.
 617  * @supported: ethtool bitmask for supported link modes.
 618  * @state: a pointer to a &struct phylink_link_state.
 619  *
 620  * Generic implementation of the validate() callback that MAC drivers can
 621  * use when they pass the range of supported interfaces and MAC capabilities.
 622  */
 623 void phylink_generic_validate(struct phylink_config *config,
 624                               unsigned long *supported,
 625                               struct phylink_link_state *state)
 626 {
 627         phylink_validate_mask_caps(supported, state, config->mac_capabilities);
 628 }
 629 EXPORT_SYMBOL_GPL(phylink_generic_validate);
 630
 631 static int phylink_validate_mac_and_pcs(struct phylink *pl,
 632                                         unsigned long *supported,
 633                                         struct phylink_link_state *state)
 634 {
 635         struct phylink_pcs *pcs;
 636         int ret;
 637
 638         /* Get the PCS for this interface mode */
 639         if (pl->using_mac_select_pcs) {
 640                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
 641                 if (IS_ERR(pcs))
 642                         return PTR_ERR(pcs);
 643         } else {
 644                 pcs = pl->pcs;
 645         }
 646
 647         if (pcs) {
 648                 /* The PCS, if present, must be setup before phylink_create()
 649                  * has been called. If the ops is not initialised, print an
 650                  * error and backtrace rather than oopsing the kernel.
 651                  */
 652                 if (!pcs->ops) {
 653                         phylink_err(pl, "interface %s: uninitialised PCS\n",
 654                                     phy_modes(state->interface));
 655                         dump_stack();
 656                         return -EINVAL;
 657                 }
 658
 659                 /* Validate the link parameters with the PCS */
 660                 if (pcs->ops->pcs_validate) {
 661                         ret = pcs->ops->pcs_validate(pcs, supported, state);
 662                         if (ret < 0 || phylink_is_empty_linkmode(supported))
 663                                 return -EINVAL;
 664
 665                         /* Ensure the advertising mask is a subset of the
 666                          * supported mask.
 667                          */
 668                         linkmode_and(state->advertising, state->advertising,
 669                                      supported);
 670                 }
 671         }
 672
 673         /* Then validate the link parameters with the MAC */
 674         if (pl->mac_ops->validate)
 675                 pl->mac_ops->validate(pl->config, supported, state);
 676         else
 677                 phylink_generic_validate(pl->config, supported, state);
 678
 679         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 680 }
 681
 682 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
 683                                  struct phylink_link_state *state,
 684                                  const unsigned long *interfaces)
 685 {
 686         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
 687         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
 688         __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
 689         struct phylink_link_state t;
 690         int intf;
 691
 692         for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
 693                 if (test_bit(intf, interfaces)) {
 694                         linkmode_copy(s, supported);
 695
 696                         t = *state;
 697                         t.interface = intf;
 698                         if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
 699                                 linkmode_or(all_s, all_s, s);
 700                                 linkmode_or(all_adv, all_adv, t.advertising);
 701                         }
 702                 }
 703         }
 704
 705         linkmode_copy(supported, all_s);
 706         linkmode_copy(state->advertising, all_adv);
 707
 708         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 709 }
 710
 711 static int phylink_validate(struct phylink *pl, unsigned long *supported,
 712                             struct phylink_link_state *state)
 713 {
 714         const unsigned long *interfaces = pl->config->supported_interfaces;
 715
 716         if (state->interface == PHY_INTERFACE_MODE_NA)
 717                 return phylink_validate_mask(pl, supported, state, interfaces);
 718
 719         if (!test_bit(state->interface, interfaces))
 720                 return -EINVAL;
 721
 722         return phylink_validate_mac_and_pcs(pl, supported, state);
 723 }
 724
 725 static int phylink_parse_fixedlink(struct phylink *pl,
 726                                    const struct fwnode_handle *fwnode)
 727 {
 728         struct fwnode_handle *fixed_node;
 729         bool pause, asym_pause, autoneg;
 730         const struct phy_setting *s;
 731         struct gpio_desc *desc;
 732         u32 speed;
 733         int ret;
 734
 735         fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
 736         if (fixed_node) {
 737                 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
 738
 739                 pl->link_config.speed = speed;
 740                 pl->link_config.duplex = DUPLEX_HALF;
 741
 742                 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
 743                         pl->link_config.duplex = DUPLEX_FULL;
 744
 745                 /* We treat the "pause" and "asym-pause" terminology as
 746                  * defining the link partner's ability.
 747                  */
 748                 if (fwnode_property_read_bool(fixed_node, "pause"))
 749                         __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 750                                   pl->link_config.lp_advertising);
 751                 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
 752                         __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 753                                   pl->link_config.lp_advertising);
 754
 755                 if (ret == 0) {
 756                         desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
 757                                                       GPIOD_IN, "?");
 758
 759                         if (!IS_ERR(desc))
 760                                 pl->link_gpio = desc;
 761                         else if (desc == ERR_PTR(-EPROBE_DEFER))
 762                                 ret = -EPROBE_DEFER;
 763                 }
 764                 fwnode_handle_put(fixed_node);
 765
 766                 if (ret)
 767                         return ret;
 768         } else {
 769                 u32 prop[5];
 770
 771                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 772                                                      NULL, 0);
 773                 if (ret != ARRAY_SIZE(prop)) {
 774                         phylink_err(pl, "broken fixed-link?\n");
 775                         return -EINVAL;
 776                 }
 777
 778                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 779                                                      prop, ARRAY_SIZE(prop));
 780                 if (!ret) {
 781                         pl->link_config.duplex = prop[1] ?
 782                                                 DUPLEX_FULL : DUPLEX_HALF;
 783                         pl->link_config.speed = prop[2];
 784                         if (prop[3])
 785                                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 786                                           pl->link_config.lp_advertising);
 787                         if (prop[4])
 788                                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 789                                           pl->link_config.lp_advertising);
 790                 }
 791         }
 792
 793         if (pl->link_config.speed > SPEED_1000 &&
 794             pl->link_config.duplex != DUPLEX_FULL)
 795                 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
 796                              pl->link_config.speed);
 797
 798         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
 799         linkmode_copy(pl->link_config.advertising, pl->supported);
 800         phylink_validate(pl, pl->supported, &pl->link_config);
 801
 802         pause = phylink_test(pl->supported, Pause);
 803         asym_pause = phylink_test(pl->supported, Asym_Pause);
 804         autoneg = phylink_test(pl->supported, Autoneg);
 805         s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
 806                                pl->supported, true);
 807         linkmode_zero(pl->supported);
 808         phylink_set(pl->supported, MII);
 809
 810         if (pause)
 811                 phylink_set(pl->supported, Pause);
 812
 813         if (asym_pause)
 814                 phylink_set(pl->supported, Asym_Pause);
 815
 816         if (autoneg)
 817                 phylink_set(pl->supported, Autoneg);
 818
 819         if (s) {
 820                 __set_bit(s->bit, pl->supported);
 821                 __set_bit(s->bit, pl->link_config.lp_advertising);
 822         } else {
 823                 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
 824                              pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
 825                              pl->link_config.speed);
 826         }
 827
 828         linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
 829                      pl->supported);
 830
 831         pl->link_config.link = 1;
 832         pl->link_config.an_complete = 1;
 833
 834         return 0;
 835 }
 836
 837 static int phylink_parse_mode(struct phylink *pl,
 838                               const struct fwnode_handle *fwnode)
 839 {
 840         struct fwnode_handle *dn;
 841         const char *managed;
 842
 843         dn = fwnode_get_named_child_node(fwnode, "fixed-link");
 844         if (dn || fwnode_property_present(fwnode, "fixed-link"))
 845                 pl->cfg_link_an_mode = MLO_AN_FIXED;
 846         fwnode_handle_put(dn);
 847
 848         if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
 849              strcmp(managed, "in-band-status") == 0) ||
 850             pl->config->ovr_an_inband) {
 851                 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
 852                         phylink_err(pl,
 853                                     "can't use both fixed-link and in-band-status\n");
 854                         return -EINVAL;
 855                 }
 856
 857                 linkmode_zero(pl->supported);
 858                 phylink_set(pl->supported, MII);
 859                 phylink_set(pl->supported, Autoneg);
 860                 phylink_set(pl->supported, Asym_Pause);
 861                 phylink_set(pl->supported, Pause);
 862                 pl->cfg_link_an_mode = MLO_AN_INBAND;
 863
 864                 switch (pl->link_config.interface) {
 865                 case PHY_INTERFACE_MODE_SGMII:
 866                 case PHY_INTERFACE_MODE_QSGMII:
 867                 case PHY_INTERFACE_MODE_QUSGMII:
 868                 case PHY_INTERFACE_MODE_RGMII:
 869                 case PHY_INTERFACE_MODE_RGMII_ID:
 870                 case PHY_INTERFACE_MODE_RGMII_RXID:
 871                 case PHY_INTERFACE_MODE_RGMII_TXID:
 872                 case PHY_INTERFACE_MODE_RTBI:
 873                         phylink_set(pl->supported, 10baseT_Half);
 874                         phylink_set(pl->supported, 10baseT_Full);
 875                         phylink_set(pl->supported, 100baseT_Half);
 876                         phylink_set(pl->supported, 100baseT_Full);
 877                         phylink_set(pl->supported, 1000baseT_Half);
 878                         phylink_set(pl->supported, 1000baseT_Full);
 879                         break;
 880
 881                 case PHY_INTERFACE_MODE_1000BASEX:
 882                         phylink_set(pl->supported, 1000baseX_Full);
 883                         break;
 884
 885                 case PHY_INTERFACE_MODE_2500BASEX:
 886                         phylink_set(pl->supported, 2500baseX_Full);
 887                         break;
 888
 889                 case PHY_INTERFACE_MODE_5GBASER:
 890                         phylink_set(pl->supported, 5000baseT_Full);
 891                         break;
 892
 893                 case PHY_INTERFACE_MODE_25GBASER:
 894                         phylink_set(pl->supported, 25000baseCR_Full);
 895                         phylink_set(pl->supported, 25000baseKR_Full);
 896                         phylink_set(pl->supported, 25000baseSR_Full);
 897                         fallthrough;
 898                 case PHY_INTERFACE_MODE_USXGMII:
 899                 case PHY_INTERFACE_MODE_10GKR:
 900                 case PHY_INTERFACE_MODE_10GBASER:
 901                         phylink_set(pl->supported, 10baseT_Half);
 902                         phylink_set(pl->supported, 10baseT_Full);
 903                         phylink_set(pl->supported, 100baseT_Half);
 904                         phylink_set(pl->supported, 100baseT_Full);
 905                         phylink_set(pl->supported, 1000baseT_Half);
 906                         phylink_set(pl->supported, 1000baseT_Full);
 907                         phylink_set(pl->supported, 1000baseX_Full);
 908                         phylink_set(pl->supported, 1000baseKX_Full);
 909                         phylink_set(pl->supported, 2500baseT_Full);
 910                         phylink_set(pl->supported, 2500baseX_Full);
 911                         phylink_set(pl->supported, 5000baseT_Full);
 912                         phylink_set(pl->supported, 10000baseT_Full);
 913                         phylink_set(pl->supported, 10000baseKR_Full);
 914                         phylink_set(pl->supported, 10000baseKX4_Full);
 915                         phylink_set(pl->supported, 10000baseCR_Full);
 916                         phylink_set(pl->supported, 10000baseSR_Full);
 917                         phylink_set(pl->supported, 10000baseLR_Full);
 918                         phylink_set(pl->supported, 10000baseLRM_Full);
 919                         phylink_set(pl->supported, 10000baseER_Full);
 920                         break;
 921
 922                 case PHY_INTERFACE_MODE_XLGMII:
 923                         phylink_set(pl->supported, 25000baseCR_Full);
 924                         phylink_set(pl->supported, 25000baseKR_Full);
 925                         phylink_set(pl->supported, 25000baseSR_Full);
 926                         phylink_set(pl->supported, 40000baseKR4_Full);
 927                         phylink_set(pl->supported, 40000baseCR4_Full);
 928                         phylink_set(pl->supported, 40000baseSR4_Full);
 929                         phylink_set(pl->supported, 40000baseLR4_Full);
 930                         phylink_set(pl->supported, 50000baseCR2_Full);
 931                         phylink_set(pl->supported, 50000baseKR2_Full);
 932                         phylink_set(pl->supported, 50000baseSR2_Full);
 933                         phylink_set(pl->supported, 50000baseKR_Full);
 934                         phylink_set(pl->supported, 50000baseSR_Full);
 935                         phylink_set(pl->supported, 50000baseCR_Full);
 936                         phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
 937                         phylink_set(pl->supported, 50000baseDR_Full);
 938                         phylink_set(pl->supported, 100000baseKR4_Full);
 939                         phylink_set(pl->supported, 100000baseSR4_Full);
 940                         phylink_set(pl->supported, 100000baseCR4_Full);
 941                         phylink_set(pl->supported, 100000baseLR4_ER4_Full);
 942                         phylink_set(pl->supported, 100000baseKR2_Full);
 943                         phylink_set(pl->supported, 100000baseSR2_Full);
 944                         phylink_set(pl->supported, 100000baseCR2_Full);
 945                         phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
 946                         phylink_set(pl->supported, 100000baseDR2_Full);
 947                         break;
 948
 949                 default:
 950                         phylink_err(pl,
 951                                     "incorrect link mode %s for in-band status\n",
 952                                     phy_modes(pl->link_config.interface));
 953                         return -EINVAL;
 954                 }
 955
 956                 linkmode_copy(pl->link_config.advertising, pl->supported);
 957
 958                 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
 959                         phylink_err(pl,
 960                                     "failed to validate link configuration for in-band status\n");
 961                         return -EINVAL;
 962                 }
 963         }
 964
 965         return 0;
 966 }
 967
 968 static void phylink_apply_manual_flow(struct phylink *pl,
 969                                       struct phylink_link_state *state)
 970 {
 971         /* If autoneg is disabled, pause AN is also disabled */
 972         if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
 973                                state->advertising))
 974                 state->pause &= ~MLO_PAUSE_AN;
 975
 976         /* Manual configuration of pause modes */
 977         if (!(pl->link_config.pause & MLO_PAUSE_AN))
 978                 state->pause = pl->link_config.pause;
 979 }
 980
 981 static void phylink_resolve_an_pause(struct phylink_link_state *state)
 982 {
 983         bool tx_pause, rx_pause;
 984
 985         if (state->duplex == DUPLEX_FULL) {
 986                 linkmode_resolve_pause(state->advertising,
 987                                        state->lp_advertising,
 988                                        &tx_pause, &rx_pause);
 989                 if (tx_pause)
 990                         state->pause |= MLO_PAUSE_TX;
 991                 if (rx_pause)
 992                         state->pause |= MLO_PAUSE_RX;
 993         }
 994 }
 995
 996 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
 997                               const struct phylink_link_state *state,
 998                               bool permit_pause_to_mac)
 999 {
1000         if (!pcs)
1001                 return 0;
1002
1003         return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1004                                     state->advertising, permit_pause_to_mac);
1005 }
1006
1007 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1008                                 phy_interface_t interface, int speed,
1009                                 int duplex)
1010 {
1011         if (pcs && pcs->ops->pcs_link_up)
1012                 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1013 }
1014
1015 static void phylink_pcs_poll_stop(struct phylink *pl)
1016 {
1017         if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1018                 del_timer(&pl->link_poll);
1019 }
1020
1021 static void phylink_pcs_poll_start(struct phylink *pl)
1022 {
1023         if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1024                 mod_timer(&pl->link_poll, jiffies + HZ);
1025 }
1026
1027 static void phylink_mac_config(struct phylink *pl,
1028                                const struct phylink_link_state *state)
1029 {
1030         phylink_dbg(pl,
1031                     "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u\n",
1032                     __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1033                     phy_modes(state->interface),
1034                     phy_speed_to_str(state->speed),
1035                     phy_duplex_to_str(state->duplex),
1036                     phy_rate_matching_to_str(state->rate_matching),
1037                     __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
1038                     state->pause, state->link);
1039
1040         pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
1041 }
1042
1043 static void phylink_mac_pcs_an_restart(struct phylink *pl)
1044 {
1045         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1046                               pl->link_config.advertising) &&
1047             phy_interface_mode_is_8023z(pl->link_config.interface) &&
1048             phylink_autoneg_inband(pl->cur_link_an_mode)) {
1049                 if (pl->pcs)
1050                         pl->pcs->ops->pcs_an_restart(pl->pcs);
1051                 else if (pl->config->legacy_pre_march2020)
1052                         pl->mac_ops->mac_an_restart(pl->config);
1053         }
1054 }
1055
1056 static void phylink_major_config(struct phylink *pl, bool restart,
1057                                   const struct phylink_link_state *state)
1058 {
1059         struct phylink_pcs *pcs = NULL;
1060         bool pcs_changed = false;
1061         unsigned int rate_kbd;
1062         unsigned int neg_mode;
1063         int err;
1064
1065         phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1066
1067         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1068                                                 state->interface,
1069                                                 state->advertising);
1070
1071         if (pl->using_mac_select_pcs) {
1072                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1073                 if (IS_ERR(pcs)) {
1074                         phylink_err(pl,
1075                                     "mac_select_pcs unexpectedly failed: %pe\n",
1076                                     pcs);
1077                         return;
1078                 }
1079
1080                 pcs_changed = pcs && pl->pcs != pcs;
1081         }
1082
1083         phylink_pcs_poll_stop(pl);
1084
1085         if (pl->mac_ops->mac_prepare) {
1086                 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1087                                                state->interface);
1088                 if (err < 0) {
1089                         phylink_err(pl, "mac_prepare failed: %pe\n",
1090                                     ERR_PTR(err));
1091                         return;
1092                 }
1093         }
1094
1095         /* If we have a new PCS, switch to the new PCS after preparing the MAC
1096          * for the change.
1097          */
1098         if (pcs_changed)
1099                 pl->pcs = pcs;
1100
1101         phylink_mac_config(pl, state);
1102
1103         neg_mode = pl->cur_link_an_mode;
1104         if (pl->pcs && pl->pcs->neg_mode)
1105                 neg_mode = pl->pcs_neg_mode;
1106
1107         err = phylink_pcs_config(pl->pcs, neg_mode, state,
1108                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1109         if (err < 0)
1110                 phylink_err(pl, "pcs_config failed: %pe\n",
1111                             ERR_PTR(err));
1112         else if (err > 0)
1113                 restart = true;
1114
1115         if (restart)
1116                 phylink_mac_pcs_an_restart(pl);
1117
1118         if (pl->mac_ops->mac_finish) {
1119                 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1120                                               state->interface);
1121                 if (err < 0)
1122                         phylink_err(pl, "mac_finish failed: %pe\n",
1123                                     ERR_PTR(err));
1124         }
1125
1126         if (pl->sfp_bus) {
1127                 rate_kbd = phylink_interface_signal_rate(state->interface);
1128                 if (rate_kbd)
1129                         sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1130         }
1131
1132         phylink_pcs_poll_start(pl);
1133 }
1134
1135 /*
1136  * Reconfigure for a change of inband advertisement.
1137  * If we have a separate PCS, we only need to call its pcs_config() method,
1138  * and then restart AN if it indicates something changed. Otherwise, we do
1139  * the full MAC reconfiguration.
1140  */
1141 static int phylink_change_inband_advert(struct phylink *pl)
1142 {
1143         unsigned int neg_mode;
1144         int ret;
1145
1146         if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1147                 return 0;
1148
1149         if (!pl->pcs && pl->config->legacy_pre_march2020) {
1150                 /* Legacy method */
1151                 phylink_mac_config(pl, &pl->link_config);
1152                 phylink_mac_pcs_an_restart(pl);
1153                 return 0;
1154         }
1155
1156         phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1157                     phylink_an_mode_str(pl->cur_link_an_mode),
1158                     phy_modes(pl->link_config.interface),
1159                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1160                     pl->link_config.pause);
1161
1162         /* Recompute the PCS neg mode */
1163         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1164                                         pl->link_config.interface,
1165                                         pl->link_config.advertising);
1166
1167         neg_mode = pl->cur_link_an_mode;
1168         if (pl->pcs->neg_mode)
1169                 neg_mode = pl->pcs_neg_mode;
1170
1171         /* Modern PCS-based method; update the advert at the PCS, and
1172          * restart negotiation if the pcs_config() helper indicates that
1173          * the programmed advertisement has changed.
1174          */
1175         ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1176                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1177         if (ret < 0)
1178                 return ret;
1179
1180         if (ret > 0)
1181                 phylink_mac_pcs_an_restart(pl);
1182
1183         return 0;
1184 }
1185
1186 static void phylink_mac_pcs_get_state(struct phylink *pl,
1187                                       struct phylink_link_state *state)
1188 {
1189         linkmode_copy(state->advertising, pl->link_config.advertising);
1190         linkmode_zero(state->lp_advertising);
1191         state->interface = pl->link_config.interface;
1192         state->rate_matching = pl->link_config.rate_matching;
1193         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1194                               state->advertising)) {
1195                 state->speed = SPEED_UNKNOWN;
1196                 state->duplex = DUPLEX_UNKNOWN;
1197                 state->pause = MLO_PAUSE_NONE;
1198         } else {
1199                 state->speed =  pl->link_config.speed;
1200                 state->duplex = pl->link_config.duplex;
1201                 state->pause = pl->link_config.pause;
1202         }
1203         state->an_complete = 0;
1204         state->link = 1;
1205
1206         if (pl->pcs)
1207                 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1208         else if (pl->mac_ops->mac_pcs_get_state &&
1209                  pl->config->legacy_pre_march2020)
1210                 pl->mac_ops->mac_pcs_get_state(pl->config, state);
1211         else
1212                 state->link = 0;
1213 }
1214
1215 /* The fixed state is... fixed except for the link state,
1216  * which may be determined by a GPIO or a callback.
1217  */
1218 static void phylink_get_fixed_state(struct phylink *pl,
1219                                     struct phylink_link_state *state)
1220 {
1221         *state = pl->link_config;
1222         if (pl->config->get_fixed_state)
1223                 pl->config->get_fixed_state(pl->config, state);
1224         else if (pl->link_gpio)
1225                 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1226
1227         state->pause = MLO_PAUSE_NONE;
1228         phylink_resolve_an_pause(state);
1229 }
1230
1231 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1232 {
1233         struct phylink_link_state link_state;
1234
1235         switch (pl->cur_link_an_mode) {
1236         case MLO_AN_PHY:
1237                 link_state = pl->phy_state;
1238                 break;
1239
1240         case MLO_AN_FIXED:
1241                 phylink_get_fixed_state(pl, &link_state);
1242                 break;
1243
1244         case MLO_AN_INBAND:
1245                 link_state = pl->link_config;
1246                 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1247                         link_state.pause = MLO_PAUSE_NONE;
1248                 break;
1249
1250         default: /* can't happen */
1251                 return;
1252         }
1253
1254         link_state.link = false;
1255
1256         phylink_apply_manual_flow(pl, &link_state);
1257         phylink_major_config(pl, force_restart, &link_state);
1258 }
1259
1260 static const char *phylink_pause_to_str(int pause)
1261 {
1262         switch (pause & MLO_PAUSE_TXRX_MASK) {
1263         case MLO_PAUSE_TX | MLO_PAUSE_RX:
1264                 return "rx/tx";
1265         case MLO_PAUSE_TX:
1266                 return "tx";
1267         case MLO_PAUSE_RX:
1268                 return "rx";
1269         default:
1270                 return "off";
1271         }
1272 }
1273
1274 static void phylink_link_up(struct phylink *pl,
1275                             struct phylink_link_state link_state)
1276 {
1277         struct net_device *ndev = pl->netdev;
1278         unsigned int neg_mode;
1279         int speed, duplex;
1280         bool rx_pause;
1281
1282         speed = link_state.speed;
1283         duplex = link_state.duplex;
1284         rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1285
1286         switch (link_state.rate_matching) {
1287         case RATE_MATCH_PAUSE:
1288                 /* The PHY is doing rate matchion from the media rate (in
1289                  * the link_state) to the interface speed, and will send
1290                  * pause frames to the MAC to limit its transmission speed.
1291                  */
1292                 speed = phylink_interface_max_speed(link_state.interface);
1293                 duplex = DUPLEX_FULL;
1294                 rx_pause = true;
1295                 break;
1296
1297         case RATE_MATCH_CRS:
1298                 /* The PHY is doing rate matchion from the media rate (in
1299                  * the link_state) to the interface speed, and will cause
1300                  * collisions to the MAC to limit its transmission speed.
1301                  */
1302                 speed = phylink_interface_max_speed(link_state.interface);
1303                 duplex = DUPLEX_HALF;
1304                 break;
1305         }
1306
1307         pl->cur_interface = link_state.interface;
1308
1309         neg_mode = pl->cur_link_an_mode;
1310         if (pl->pcs && pl->pcs->neg_mode)
1311                 neg_mode = pl->pcs_neg_mode;
1312
1313         phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1314                             duplex);
1315
1316         pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1317                                  pl->cur_interface, speed, duplex,
1318                                  !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1319
1320         if (ndev)
1321                 netif_carrier_on(ndev);
1322
1323         phylink_info(pl,
1324                      "Link is Up - %s/%s - flow control %s\n",
1325                      phy_speed_to_str(link_state.speed),
1326                      phy_duplex_to_str(link_state.duplex),
1327                      phylink_pause_to_str(link_state.pause));
1328 }
1329
1330 static void phylink_link_down(struct phylink *pl)
1331 {
1332         struct net_device *ndev = pl->netdev;
1333
1334         if (ndev)
1335                 netif_carrier_off(ndev);
1336         pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1337                                    pl->cur_interface);
1338         phylink_info(pl, "Link is Down\n");
1339 }
1340
1341 static void phylink_resolve(struct work_struct *w)
1342 {
1343         struct phylink *pl = container_of(w, struct phylink, resolve);
1344         struct phylink_link_state link_state;
1345         struct net_device *ndev = pl->netdev;
1346         bool mac_config = false;
1347         bool retrigger = false;
1348         bool cur_link_state;
1349
1350         mutex_lock(&pl->state_mutex);
1351         if (pl->netdev)
1352                 cur_link_state = netif_carrier_ok(ndev);
1353         else
1354                 cur_link_state = pl->old_link_state;
1355
1356         if (pl->phylink_disable_state) {
1357                 pl->mac_link_dropped = false;
1358                 link_state.link = false;
1359         } else if (pl->mac_link_dropped) {
1360                 link_state.link = false;
1361                 retrigger = true;
1362         } else {
1363                 switch (pl->cur_link_an_mode) {
1364                 case MLO_AN_PHY:
1365                         link_state = pl->phy_state;
1366                         phylink_apply_manual_flow(pl, &link_state);
1367                         mac_config = link_state.link;
1368                         break;
1369
1370                 case MLO_AN_FIXED:
1371                         phylink_get_fixed_state(pl, &link_state);
1372                         mac_config = link_state.link;
1373                         break;
1374
1375                 case MLO_AN_INBAND:
1376                         phylink_mac_pcs_get_state(pl, &link_state);
1377
1378                         /* The PCS may have a latching link-fail indicator.
1379                          * If the link was up, bring the link down and
1380                          * re-trigger the resolve. Otherwise, re-read the
1381                          * PCS state to get the current status of the link.
1382                          */
1383                         if (!link_state.link) {
1384                                 if (cur_link_state)
1385                                         retrigger = true;
1386                                 else
1387                                         phylink_mac_pcs_get_state(pl,
1388                                                                   &link_state);
1389                         }
1390
1391                         /* If we have a phy, the "up" state is the union of
1392                          * both the PHY and the MAC
1393                          */
1394                         if (pl->phydev)
1395                                 link_state.link &= pl->phy_state.link;
1396
1397                         /* Only update if the PHY link is up */
1398                         if (pl->phydev && pl->phy_state.link) {
1399                                 /* If the interface has changed, force a
1400                                  * link down event if the link isn't already
1401                                  * down, and re-resolve.
1402                                  */
1403                                 if (link_state.interface !=
1404                                     pl->phy_state.interface) {
1405                                         retrigger = true;
1406                                         link_state.link = false;
1407                                 }
1408                                 link_state.interface = pl->phy_state.interface;
1409
1410                                 /* If we are doing rate matching, then the
1411                                  * link speed/duplex comes from the PHY
1412                                  */
1413                                 if (pl->phy_state.rate_matching) {
1414                                         link_state.rate_matching =
1415                                                 pl->phy_state.rate_matching;
1416                                         link_state.speed = pl->phy_state.speed;
1417                                         link_state.duplex =
1418                                                 pl->phy_state.duplex;
1419                                 }
1420
1421                                 /* If we have a PHY, we need to update with
1422                                  * the PHY flow control bits.
1423                                  */
1424                                 link_state.pause = pl->phy_state.pause;
1425                                 mac_config = true;
1426                         }
1427                         phylink_apply_manual_flow(pl, &link_state);
1428                         break;
1429                 }
1430         }
1431
1432         if (mac_config) {
1433                 if (link_state.interface != pl->link_config.interface) {
1434                         /* The interface has changed, force the link down and
1435                          * then reconfigure.
1436                          */
1437                         if (cur_link_state) {
1438                                 phylink_link_down(pl);
1439                                 cur_link_state = false;
1440                         }
1441                         phylink_major_config(pl, false, &link_state);
1442                         pl->link_config.interface = link_state.interface;
1443                 } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
1444                         /* The interface remains unchanged, only the speed,
1445                          * duplex or pause settings have changed. Call the
1446                          * old mac_config() method to configure the MAC/PCS
1447                          * only if we do not have a legacy MAC driver.
1448                          */
1449                         phylink_mac_config(pl, &link_state);
1450                 }
1451         }
1452
1453         if (link_state.link != cur_link_state) {
1454                 pl->old_link_state = link_state.link;
1455                 if (!link_state.link)
1456                         phylink_link_down(pl);
1457                 else
1458                         phylink_link_up(pl, link_state);
1459         }
1460         if (!link_state.link && retrigger) {
1461                 pl->mac_link_dropped = false;
1462                 queue_work(system_power_efficient_wq, &pl->resolve);
1463         }
1464         mutex_unlock(&pl->state_mutex);
1465 }
1466
1467 static void phylink_run_resolve(struct phylink *pl)
1468 {
1469         if (!pl->phylink_disable_state)
1470                 queue_work(system_power_efficient_wq, &pl->resolve);
1471 }
1472
1473 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1474 {
1475         unsigned long state = pl->phylink_disable_state;
1476
1477         set_bit(bit, &pl->phylink_disable_state);
1478         if (state == 0) {
1479                 queue_work(system_power_efficient_wq, &pl->resolve);
1480                 flush_work(&pl->resolve);
1481         }
1482 }
1483
1484 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1485 {
1486         clear_bit(bit, &pl->phylink_disable_state);
1487         phylink_run_resolve(pl);
1488 }
1489
1490 static void phylink_fixed_poll(struct timer_list *t)
1491 {
1492         struct phylink *pl = container_of(t, struct phylink, link_poll);
1493
1494         mod_timer(t, jiffies + HZ);
1495
1496         phylink_run_resolve(pl);
1497 }
1498
1499 static const struct sfp_upstream_ops sfp_phylink_ops;
1500
1501 static int phylink_register_sfp(struct phylink *pl,
1502                                 const struct fwnode_handle *fwnode)
1503 {
1504         struct sfp_bus *bus;
1505         int ret;
1506
1507         if (!fwnode)
1508                 return 0;
1509
1510         bus = sfp_bus_find_fwnode(fwnode);
1511         if (IS_ERR(bus)) {
1512                 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1513                 return PTR_ERR(bus);
1514         }
1515
1516         pl->sfp_bus = bus;
1517
1518         ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1519         sfp_bus_put(bus);
1520
1521         return ret;
1522 }
1523
1524 /**
1525  * phylink_create() - create a phylink instance
1526  * @config: a pointer to the target &struct phylink_config
1527  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1528  *      interface
1529  * @iface: the desired link mode defined by &typedef phy_interface_t
1530  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1531  *
1532  * Create a new phylink instance, and parse the link parameters found in @np.
1533  * This will parse in-band modes, fixed-link or SFP configuration.
1534  *
1535  * Note: the rtnl lock must not be held when calling this function.
1536  *
1537  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1538  * must use IS_ERR() to check for errors from this function.
1539  */
1540 struct phylink *phylink_create(struct phylink_config *config,
1541                                const struct fwnode_handle *fwnode,
1542                                phy_interface_t iface,
1543                                const struct phylink_mac_ops *mac_ops)
1544 {
1545         bool using_mac_select_pcs = false;
1546         struct phylink *pl;
1547         int ret;
1548
1549         /* Validate the supplied configuration */
1550         if (phy_interface_empty(config->supported_interfaces)) {
1551                 dev_err(config->dev,
1552                         "phylink: error: empty supported_interfaces\n");
1553                 return ERR_PTR(-EINVAL);
1554         }
1555
1556         if (mac_ops->mac_select_pcs &&
1557             mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1558               ERR_PTR(-EOPNOTSUPP))
1559                 using_mac_select_pcs = true;
1560
1561         pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1562         if (!pl)
1563                 return ERR_PTR(-ENOMEM);
1564
1565         mutex_init(&pl->state_mutex);
1566         INIT_WORK(&pl->resolve, phylink_resolve);
1567
1568         pl->config = config;
1569         if (config->type == PHYLINK_NETDEV) {
1570                 pl->netdev = to_net_dev(config->dev);
1571         } else if (config->type == PHYLINK_DEV) {
1572                 pl->dev = config->dev;
1573         } else {
1574                 kfree(pl);
1575                 return ERR_PTR(-EINVAL);
1576         }
1577
1578         pl->using_mac_select_pcs = using_mac_select_pcs;
1579         pl->phy_state.interface = iface;
1580         pl->link_interface = iface;
1581         if (iface == PHY_INTERFACE_MODE_MOCA)
1582                 pl->link_port = PORT_BNC;
1583         else
1584                 pl->link_port = PORT_MII;
1585         pl->link_config.interface = iface;
1586         pl->link_config.pause = MLO_PAUSE_AN;
1587         pl->link_config.speed = SPEED_UNKNOWN;
1588         pl->link_config.duplex = DUPLEX_UNKNOWN;
1589         pl->mac_ops = mac_ops;
1590         __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1591         timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1592
1593         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1594         linkmode_copy(pl->link_config.advertising, pl->supported);
1595         phylink_validate(pl, pl->supported, &pl->link_config);
1596
1597         ret = phylink_parse_mode(pl, fwnode);
1598         if (ret < 0) {
1599                 kfree(pl);
1600                 return ERR_PTR(ret);
1601         }
1602
1603         if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1604                 ret = phylink_parse_fixedlink(pl, fwnode);
1605                 if (ret < 0) {
1606                         kfree(pl);
1607                         return ERR_PTR(ret);
1608                 }
1609         }
1610
1611         pl->cur_link_an_mode = pl->cfg_link_an_mode;
1612
1613         ret = phylink_register_sfp(pl, fwnode);
1614         if (ret < 0) {
1615                 kfree(pl);
1616                 return ERR_PTR(ret);
1617         }
1618
1619         return pl;
1620 }
1621 EXPORT_SYMBOL_GPL(phylink_create);
1622
1623 /**
1624  * phylink_destroy() - cleanup and destroy the phylink instance
1625  * @pl: a pointer to a &struct phylink returned from phylink_create()
1626  *
1627  * Destroy a phylink instance. Any PHY that has been attached must have been
1628  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1629  *
1630  * Note: the rtnl lock must not be held when calling this function.
1631  */
1632 void phylink_destroy(struct phylink *pl)
1633 {
1634         sfp_bus_del_upstream(pl->sfp_bus);
1635         if (pl->link_gpio)
1636                 gpiod_put(pl->link_gpio);
1637
1638         cancel_work_sync(&pl->resolve);
1639         kfree(pl);
1640 }
1641 EXPORT_SYMBOL_GPL(phylink_destroy);
1642
1643 /**
1644  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1645  * @pl: a pointer to a &struct phylink returned from phylink_create()
1646  *
1647  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1648  * no PHY is needed.
1649  *
1650  * Returns true if phylink will be expecting a PHY.
1651  */
1652 bool phylink_expects_phy(struct phylink *pl)
1653 {
1654         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1655             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1656              phy_interface_mode_is_8023z(pl->link_config.interface)))
1657                 return false;
1658         return true;
1659 }
1660 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1661
1662 static void phylink_phy_change(struct phy_device *phydev, bool up)
1663 {
1664         struct phylink *pl = phydev->phylink;
1665         bool tx_pause, rx_pause;
1666
1667         phy_get_pause(phydev, &tx_pause, &rx_pause);
1668
1669         mutex_lock(&pl->state_mutex);
1670         pl->phy_state.speed = phydev->speed;
1671         pl->phy_state.duplex = phydev->duplex;
1672         pl->phy_state.rate_matching = phydev->rate_matching;
1673         pl->phy_state.pause = MLO_PAUSE_NONE;
1674         if (tx_pause)
1675                 pl->phy_state.pause |= MLO_PAUSE_TX;
1676         if (rx_pause)
1677                 pl->phy_state.pause |= MLO_PAUSE_RX;
1678         pl->phy_state.interface = phydev->interface;
1679         pl->phy_state.link = up;
1680         mutex_unlock(&pl->state_mutex);
1681
1682         phylink_run_resolve(pl);
1683
1684         phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1685                     phy_modes(phydev->interface),
1686                     phy_speed_to_str(phydev->speed),
1687                     phy_duplex_to_str(phydev->duplex),
1688                     phy_rate_matching_to_str(phydev->rate_matching),
1689                     phylink_pause_to_str(pl->phy_state.pause));
1690 }
1691
1692 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1693                                phy_interface_t interface)
1694 {
1695         struct phylink_link_state config;
1696         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1697         char *irq_str;
1698         int ret;
1699
1700         /*
1701          * This is the new way of dealing with flow control for PHYs,
1702          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1703          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1704          * using our validate call to the MAC, we rely upon the MAC
1705          * clearing the bits from both supported and advertising fields.
1706          */
1707         phy_support_asym_pause(phy);
1708
1709         memset(&config, 0, sizeof(config));
1710         linkmode_copy(supported, phy->supported);
1711         linkmode_copy(config.advertising, phy->advertising);
1712
1713         /* Check whether we would use rate matching for the proposed interface
1714          * mode.
1715          */
1716         config.rate_matching = phy_get_rate_matching(phy, interface);
1717
1718         /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1719          * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1720          * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1721          * their Serdes is either unnecessary or not reasonable.
1722          *
1723          * For these which switch interface modes, we really need to know which
1724          * interface modes the PHY supports to properly work out which ethtool
1725          * linkmodes can be supported. For now, as a work-around, we validate
1726          * against all interface modes, which may lead to more ethtool link
1727          * modes being advertised than are actually supported.
1728          */
1729         if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1730             interface != PHY_INTERFACE_MODE_RXAUI &&
1731             interface != PHY_INTERFACE_MODE_XAUI &&
1732             interface != PHY_INTERFACE_MODE_USXGMII)
1733                 config.interface = PHY_INTERFACE_MODE_NA;
1734         else
1735                 config.interface = interface;
1736
1737         ret = phylink_validate(pl, supported, &config);
1738         if (ret) {
1739                 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1740                              phy_modes(config.interface),
1741                              __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1742                              __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1743                              ERR_PTR(ret));
1744                 return ret;
1745         }
1746
1747         phy->phylink = pl;
1748         phy->phy_link_change = phylink_phy_change;
1749
1750         irq_str = phy_attached_info_irq(phy);
1751         phylink_info(pl,
1752                      "PHY [%s] driver [%s] (irq=%s)\n",
1753                      dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1754         kfree(irq_str);
1755
1756         mutex_lock(&phy->lock);
1757         mutex_lock(&pl->state_mutex);
1758         pl->phydev = phy;
1759         pl->phy_state.interface = interface;
1760         pl->phy_state.pause = MLO_PAUSE_NONE;
1761         pl->phy_state.speed = SPEED_UNKNOWN;
1762         pl->phy_state.duplex = DUPLEX_UNKNOWN;
1763         pl->phy_state.rate_matching = RATE_MATCH_NONE;
1764         linkmode_copy(pl->supported, supported);
1765         linkmode_copy(pl->link_config.advertising, config.advertising);
1766
1767         /* Restrict the phy advertisement according to the MAC support. */
1768         linkmode_copy(phy->advertising, config.advertising);
1769         mutex_unlock(&pl->state_mutex);
1770         mutex_unlock(&phy->lock);
1771
1772         phylink_dbg(pl,
1773                     "phy: %s setting supported %*pb advertising %*pb\n",
1774                     phy_modes(interface),
1775                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1776                     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1777
1778         if (phy_interrupt_is_valid(phy))
1779                 phy_request_interrupt(phy);
1780
1781         if (pl->config->mac_managed_pm)
1782                 phy->mac_managed_pm = true;
1783
1784         return 0;
1785 }
1786
1787 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1788                               phy_interface_t interface)
1789 {
1790         if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1791                     (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1792                      phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1793                 return -EINVAL;
1794
1795         if (pl->phydev)
1796                 return -EBUSY;
1797
1798         return phy_attach_direct(pl->netdev, phy, 0, interface);
1799 }
1800
1801 /**
1802  * phylink_connect_phy() - connect a PHY to the phylink instance
1803  * @pl: a pointer to a &struct phylink returned from phylink_create()
1804  * @phy: a pointer to a &struct phy_device.
1805  *
1806  * Connect @phy to the phylink instance specified by @pl by calling
1807  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1808  * capabilities, start the PHYLIB state machine and enable any interrupts
1809  * that the PHY supports.
1810  *
1811  * This updates the phylink's ethtool supported and advertising link mode
1812  * masks.
1813  *
1814  * Returns 0 on success or a negative errno.
1815  */
1816 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1817 {
1818         int ret;
1819
1820         /* Use PHY device/driver interface */
1821         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1822                 pl->link_interface = phy->interface;
1823                 pl->link_config.interface = pl->link_interface;
1824         }
1825
1826         ret = phylink_attach_phy(pl, phy, pl->link_interface);
1827         if (ret < 0)
1828                 return ret;
1829
1830         ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1831         if (ret)
1832                 phy_detach(phy);
1833
1834         return ret;
1835 }
1836 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1837
1838 /**
1839  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1840  * @pl: a pointer to a &struct phylink returned from phylink_create()
1841  * @dn: a pointer to a &struct device_node.
1842  * @flags: PHY-specific flags to communicate to the PHY device driver
1843  *
1844  * Connect the phy specified in the device node @dn to the phylink instance
1845  * specified by @pl. Actions specified in phylink_connect_phy() will be
1846  * performed.
1847  *
1848  * Returns 0 on success or a negative errno.
1849  */
1850 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1851                            u32 flags)
1852 {
1853         return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1854 }
1855 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1856
1857 /**
1858  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1859  * @pl: a pointer to a &struct phylink returned from phylink_create()
1860  * @fwnode: a pointer to a &struct fwnode_handle.
1861  * @flags: PHY-specific flags to communicate to the PHY device driver
1862  *
1863  * Connect the phy specified @fwnode to the phylink instance specified
1864  * by @pl.
1865  *
1866  * Returns 0 on success or a negative errno.
1867  */
1868 int phylink_fwnode_phy_connect(struct phylink *pl,
1869                                const struct fwnode_handle *fwnode,
1870                                u32 flags)
1871 {
1872         struct fwnode_handle *phy_fwnode;
1873         struct phy_device *phy_dev;
1874         int ret;
1875
1876         /* Fixed links and 802.3z are handled without needing a PHY */
1877         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1878             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1879              phy_interface_mode_is_8023z(pl->link_interface)))
1880                 return 0;
1881
1882         phy_fwnode = fwnode_get_phy_node(fwnode);
1883         if (IS_ERR(phy_fwnode)) {
1884                 if (pl->cfg_link_an_mode == MLO_AN_PHY)
1885                         return -ENODEV;
1886                 return 0;
1887         }
1888
1889         phy_dev = fwnode_phy_find_device(phy_fwnode);
1890         /* We're done with the phy_node handle */
1891         fwnode_handle_put(phy_fwnode);
1892         if (!phy_dev)
1893                 return -ENODEV;
1894
1895         /* Use PHY device/driver interface */
1896         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1897                 pl->link_interface = phy_dev->interface;
1898                 pl->link_config.interface = pl->link_interface;
1899         }
1900
1901         ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1902                                 pl->link_interface);
1903         phy_device_free(phy_dev);
1904         if (ret)
1905                 return ret;
1906
1907         ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1908         if (ret)
1909                 phy_detach(phy_dev);
1910
1911         return ret;
1912 }
1913 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1914
1915 /**
1916  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1917  *   instance.
1918  * @pl: a pointer to a &struct phylink returned from phylink_create()
1919  *
1920  * Disconnect any current PHY from the phylink instance described by @pl.
1921  */
1922 void phylink_disconnect_phy(struct phylink *pl)
1923 {
1924         struct phy_device *phy;
1925
1926         ASSERT_RTNL();
1927
1928         phy = pl->phydev;
1929         if (phy) {
1930                 mutex_lock(&phy->lock);
1931                 mutex_lock(&pl->state_mutex);
1932                 pl->phydev = NULL;
1933                 mutex_unlock(&pl->state_mutex);
1934                 mutex_unlock(&phy->lock);
1935                 flush_work(&pl->resolve);
1936
1937                 phy_disconnect(phy);
1938         }
1939 }
1940 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1941
1942 /**
1943  * phylink_mac_change() - notify phylink of a change in MAC state
1944  * @pl: a pointer to a &struct phylink returned from phylink_create()
1945  * @up: indicates whether the link is currently up.
1946  *
1947  * The MAC driver should call this driver when the state of its link
1948  * changes (eg, link failure, new negotiation results, etc.)
1949  */
1950 void phylink_mac_change(struct phylink *pl, bool up)
1951 {
1952         if (!up)
1953                 pl->mac_link_dropped = true;
1954         phylink_run_resolve(pl);
1955         phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1956 }
1957 EXPORT_SYMBOL_GPL(phylink_mac_change);
1958
1959 static irqreturn_t phylink_link_handler(int irq, void *data)
1960 {
1961         struct phylink *pl = data;
1962
1963         phylink_run_resolve(pl);
1964
1965         return IRQ_HANDLED;
1966 }
1967
1968 /**
1969  * phylink_start() - start a phylink instance
1970  * @pl: a pointer to a &struct phylink returned from phylink_create()
1971  *
1972  * Start the phylink instance specified by @pl, configuring the MAC for the
1973  * desired link mode(s) and negotiation style. This should be called from the
1974  * network device driver's &struct net_device_ops ndo_open() method.
1975  */
1976 void phylink_start(struct phylink *pl)
1977 {
1978         bool poll = false;
1979
1980         ASSERT_RTNL();
1981
1982         phylink_info(pl, "configuring for %s/%s link mode\n",
1983                      phylink_an_mode_str(pl->cur_link_an_mode),
1984                      phy_modes(pl->link_config.interface));
1985
1986         /* Always set the carrier off */
1987         if (pl->netdev)
1988                 netif_carrier_off(pl->netdev);
1989
1990         /* Apply the link configuration to the MAC when starting. This allows
1991          * a fixed-link to start with the correct parameters, and also
1992          * ensures that we set the appropriate advertisement for Serdes links.
1993          *
1994          * Restart autonegotiation if using 802.3z to ensure that the link
1995          * parameters are properly negotiated.  This is necessary for DSA
1996          * switches using 802.3z negotiation to ensure they see our modes.
1997          */
1998         phylink_mac_initial_config(pl, true);
1999
2000         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2001
2002         if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2003                 int irq = gpiod_to_irq(pl->link_gpio);
2004
2005                 if (irq > 0) {
2006                         if (!request_irq(irq, phylink_link_handler,
2007                                          IRQF_TRIGGER_RISING |
2008                                          IRQF_TRIGGER_FALLING,
2009                                          "netdev link", pl))
2010                                 pl->link_irq = irq;
2011                         else
2012                                 irq = 0;
2013                 }
2014                 if (irq <= 0)
2015                         poll = true;
2016         }
2017
2018         switch (pl->cfg_link_an_mode) {
2019         case MLO_AN_FIXED:
2020                 poll |= pl->config->poll_fixed_state;
2021                 break;
2022         case MLO_AN_INBAND:
2023                 if (pl->pcs)
2024                         poll |= pl->pcs->poll;
2025                 break;
2026         }
2027         if (poll)
2028                 mod_timer(&pl->link_poll, jiffies + HZ);
2029         if (pl->phydev)
2030                 phy_start(pl->phydev);
2031         if (pl->sfp_bus)
2032                 sfp_upstream_start(pl->sfp_bus);
2033 }
2034 EXPORT_SYMBOL_GPL(phylink_start);
2035
2036 /**
2037  * phylink_stop() - stop a phylink instance
2038  * @pl: a pointer to a &struct phylink returned from phylink_create()
2039  *
2040  * Stop the phylink instance specified by @pl. This should be called from the
2041  * network device driver's &struct net_device_ops ndo_stop() method.  The
2042  * network device's carrier state should not be changed prior to calling this
2043  * function.
2044  *
2045  * This will synchronously bring down the link if the link is not already
2046  * down (in other words, it will trigger a mac_link_down() method call.)
2047  */
2048 void phylink_stop(struct phylink *pl)
2049 {
2050         ASSERT_RTNL();
2051
2052         if (pl->sfp_bus)
2053                 sfp_upstream_stop(pl->sfp_bus);
2054         if (pl->phydev)
2055                 phy_stop(pl->phydev);
2056         del_timer_sync(&pl->link_poll);
2057         if (pl->link_irq) {
2058                 free_irq(pl->link_irq, pl);
2059                 pl->link_irq = 0;
2060         }
2061
2062         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2063 }
2064 EXPORT_SYMBOL_GPL(phylink_stop);
2065
2066 /**
2067  * phylink_suspend() - handle a network device suspend event
2068  * @pl: a pointer to a &struct phylink returned from phylink_create()
2069  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2070  *
2071  * Handle a network device suspend event. There are several cases:
2072  *
2073  * - If Wake-on-Lan is not active, we can bring down the link between
2074  *   the MAC and PHY by calling phylink_stop().
2075  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2076  *   can also bring down the link between the MAC and PHY.
2077  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2078  *   still needs to receive packets, so we can not bring the link down.
2079  */
2080 void phylink_suspend(struct phylink *pl, bool mac_wol)
2081 {
2082         ASSERT_RTNL();
2083
2084         if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2085                 /* Wake-on-Lan enabled, MAC handling */
2086                 mutex_lock(&pl->state_mutex);
2087
2088                 /* Stop the resolver bringing the link up */
2089                 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2090
2091                 /* Disable the carrier, to prevent transmit timeouts,
2092                  * but one would hope all packets have been sent. This
2093                  * also means phylink_resolve() will do nothing.
2094                  */
2095                 if (pl->netdev)
2096                         netif_carrier_off(pl->netdev);
2097                 else
2098                         pl->old_link_state = false;
2099
2100                 /* We do not call mac_link_down() here as we want the
2101                  * link to remain up to receive the WoL packets.
2102                  */
2103                 mutex_unlock(&pl->state_mutex);
2104         } else {
2105                 phylink_stop(pl);
2106         }
2107 }
2108 EXPORT_SYMBOL_GPL(phylink_suspend);
2109
2110 /**
2111  * phylink_resume() - handle a network device resume event
2112  * @pl: a pointer to a &struct phylink returned from phylink_create()
2113  *
2114  * Undo the effects of phylink_suspend(), returning the link to an
2115  * operational state.
2116  */
2117 void phylink_resume(struct phylink *pl)
2118 {
2119         ASSERT_RTNL();
2120
2121         if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2122                 /* Wake-on-Lan enabled, MAC handling */
2123
2124                 /* Call mac_link_down() so we keep the overall state balanced.
2125                  * Do this under the state_mutex lock for consistency. This
2126                  * will cause a "Link Down" message to be printed during
2127                  * resume, which is harmless - the true link state will be
2128                  * printed when we run a resolve.
2129                  */
2130                 mutex_lock(&pl->state_mutex);
2131                 phylink_link_down(pl);
2132                 mutex_unlock(&pl->state_mutex);
2133
2134                 /* Re-apply the link parameters so that all the settings get
2135                  * restored to the MAC.
2136                  */
2137                 phylink_mac_initial_config(pl, true);
2138
2139                 /* Re-enable and re-resolve the link parameters */
2140                 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2141         } else {
2142                 phylink_start(pl);
2143         }
2144 }
2145 EXPORT_SYMBOL_GPL(phylink_resume);
2146
2147 /**
2148  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2149  * @pl: a pointer to a &struct phylink returned from phylink_create()
2150  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2151  *
2152  * Read the wake on lan parameters from the PHY attached to the phylink
2153  * instance specified by @pl. If no PHY is currently attached, report no
2154  * support for wake on lan.
2155  */
2156 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2157 {
2158         ASSERT_RTNL();
2159
2160         wol->supported = 0;
2161         wol->wolopts = 0;
2162
2163         if (pl->phydev)
2164                 phy_ethtool_get_wol(pl->phydev, wol);
2165 }
2166 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2167
2168 /**
2169  * phylink_ethtool_set_wol() - set wake on lan parameters
2170  * @pl: a pointer to a &struct phylink returned from phylink_create()
2171  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2172  *
2173  * Set the wake on lan parameters for the PHY attached to the phylink
2174  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2175  * error.
2176  *
2177  * Returns zero on success or negative errno code.
2178  */
2179 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2180 {
2181         int ret = -EOPNOTSUPP;
2182
2183         ASSERT_RTNL();
2184
2185         if (pl->phydev)
2186                 ret = phy_ethtool_set_wol(pl->phydev, wol);
2187
2188         return ret;
2189 }
2190 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2191
2192 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2193 {
2194         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2195
2196         linkmode_zero(mask);
2197         phylink_set_port_modes(mask);
2198
2199         linkmode_and(dst, dst, mask);
2200         linkmode_or(dst, dst, b);
2201 }
2202
2203 static void phylink_get_ksettings(const struct phylink_link_state *state,
2204                                   struct ethtool_link_ksettings *kset)
2205 {
2206         phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2207         linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2208         if (kset->base.rate_matching == RATE_MATCH_NONE) {
2209                 kset->base.speed = state->speed;
2210                 kset->base.duplex = state->duplex;
2211         }
2212         kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2213                                                state->advertising) ?
2214                                 AUTONEG_ENABLE : AUTONEG_DISABLE;
2215 }
2216
2217 /**
2218  * phylink_ethtool_ksettings_get() - get the current link settings
2219  * @pl: a pointer to a &struct phylink returned from phylink_create()
2220  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2221  *
2222  * Read the current link settings for the phylink instance specified by @pl.
2223  * This will be the link settings read from the MAC, PHY or fixed link
2224  * settings depending on the current negotiation mode.
2225  */
2226 int phylink_ethtool_ksettings_get(struct phylink *pl,
2227                                   struct ethtool_link_ksettings *kset)
2228 {
2229         struct phylink_link_state link_state;
2230
2231         ASSERT_RTNL();
2232
2233         if (pl->phydev)
2234                 phy_ethtool_ksettings_get(pl->phydev, kset);
2235         else
2236                 kset->base.port = pl->link_port;
2237
2238         linkmode_copy(kset->link_modes.supported, pl->supported);
2239
2240         switch (pl->cur_link_an_mode) {
2241         case MLO_AN_FIXED:
2242                 /* We are using fixed settings. Report these as the
2243                  * current link settings - and note that these also
2244                  * represent the supported speeds/duplex/pause modes.
2245                  */
2246                 phylink_get_fixed_state(pl, &link_state);
2247                 phylink_get_ksettings(&link_state, kset);
2248                 break;
2249
2250         case MLO_AN_INBAND:
2251                 /* If there is a phy attached, then use the reported
2252                  * settings from the phy with no modification.
2253                  */
2254                 if (pl->phydev)
2255                         break;
2256
2257                 phylink_mac_pcs_get_state(pl, &link_state);
2258
2259                 /* The MAC is reporting the link results from its own PCS
2260                  * layer via in-band status. Report these as the current
2261                  * link settings.
2262                  */
2263                 phylink_get_ksettings(&link_state, kset);
2264                 break;
2265         }
2266
2267         return 0;
2268 }
2269 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2270
2271 /**
2272  * phylink_ethtool_ksettings_set() - set the link settings
2273  * @pl: a pointer to a &struct phylink returned from phylink_create()
2274  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2275  */
2276 int phylink_ethtool_ksettings_set(struct phylink *pl,
2277                                   const struct ethtool_link_ksettings *kset)
2278 {
2279         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2280         struct phylink_link_state config;
2281         const struct phy_setting *s;
2282
2283         ASSERT_RTNL();
2284
2285         if (pl->phydev) {
2286                 struct ethtool_link_ksettings phy_kset = *kset;
2287
2288                 linkmode_and(phy_kset.link_modes.advertising,
2289                              phy_kset.link_modes.advertising,
2290                              pl->supported);
2291
2292                 /* We can rely on phylib for this update; we also do not need
2293                  * to update the pl->link_config settings:
2294                  * - the configuration returned via ksettings_get() will come
2295                  *   from phylib whenever a PHY is present.
2296                  * - link_config.interface will be updated by the PHY calling
2297                  *   back via phylink_phy_change() and a subsequent resolve.
2298                  * - initial link configuration for PHY mode comes from the
2299                  *   last phy state updated via phylink_phy_change().
2300                  * - other configuration changes (e.g. pause modes) are
2301                  *   performed directly via phylib.
2302                  * - if in in-band mode with a PHY, the link configuration
2303                  *   is passed on the link from the PHY, and all of
2304                  *   link_config.{speed,duplex,an_enabled,pause} are not used.
2305                  * - the only possible use would be link_config.advertising
2306                  *   pause modes when in 1000base-X mode with a PHY, but in
2307                  *   the presence of a PHY, this should not be changed as that
2308                  *   should be determined from the media side advertisement.
2309                  */
2310                 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2311         }
2312
2313         config = pl->link_config;
2314         /* Mask out unsupported advertisements */
2315         linkmode_and(config.advertising, kset->link_modes.advertising,
2316                      pl->supported);
2317
2318         /* FIXME: should we reject autoneg if phy/mac does not support it? */
2319         switch (kset->base.autoneg) {
2320         case AUTONEG_DISABLE:
2321                 /* Autonegotiation disabled, select a suitable speed and
2322                  * duplex.
2323                  */
2324                 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2325                                        pl->supported, false);
2326                 if (!s)
2327                         return -EINVAL;
2328
2329                 /* If we have a fixed link, refuse to change link parameters.
2330                  * If the link parameters match, accept them but do nothing.
2331                  */
2332                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2333                         if (s->speed != pl->link_config.speed ||
2334                             s->duplex != pl->link_config.duplex)
2335                                 return -EINVAL;
2336                         return 0;
2337                 }
2338
2339                 config.speed = s->speed;
2340                 config.duplex = s->duplex;
2341                 break;
2342
2343         case AUTONEG_ENABLE:
2344                 /* If we have a fixed link, allow autonegotiation (since that
2345                  * is our default case) but do not allow the advertisement to
2346                  * be changed. If the advertisement matches, simply return.
2347                  */
2348                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2349                         if (!linkmode_equal(config.advertising,
2350                                             pl->link_config.advertising))
2351                                 return -EINVAL;
2352                         return 0;
2353                 }
2354
2355                 config.speed = SPEED_UNKNOWN;
2356                 config.duplex = DUPLEX_UNKNOWN;
2357                 break;
2358
2359         default:
2360                 return -EINVAL;
2361         }
2362
2363         /* We have ruled out the case with a PHY attached, and the
2364          * fixed-link cases.  All that is left are in-band links.
2365          */
2366         linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2367                          kset->base.autoneg == AUTONEG_ENABLE);
2368
2369         /* If this link is with an SFP, ensure that changes to advertised modes
2370          * also cause the associated interface to be selected such that the
2371          * link can be configured correctly.
2372          */
2373         if (pl->sfp_bus) {
2374                 config.interface = sfp_select_interface(pl->sfp_bus,
2375                                                         config.advertising);
2376                 if (config.interface == PHY_INTERFACE_MODE_NA) {
2377                         phylink_err(pl,
2378                                     "selection of interface failed, advertisement %*pb\n",
2379                                     __ETHTOOL_LINK_MODE_MASK_NBITS,
2380                                     config.advertising);
2381                         return -EINVAL;
2382                 }
2383
2384                 /* Revalidate with the selected interface */
2385                 linkmode_copy(support, pl->supported);
2386                 if (phylink_validate(pl, support, &config)) {
2387                         phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2388                                     phylink_an_mode_str(pl->cur_link_an_mode),
2389                                     phy_modes(config.interface),
2390                                     __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2391                         return -EINVAL;
2392                 }
2393         } else {
2394                 /* Validate without changing the current supported mask. */
2395                 linkmode_copy(support, pl->supported);
2396                 if (phylink_validate(pl, support, &config))
2397                         return -EINVAL;
2398         }
2399
2400         /* If autonegotiation is enabled, we must have an advertisement */
2401         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2402                               config.advertising) &&
2403             phylink_is_empty_linkmode(config.advertising))
2404                 return -EINVAL;
2405
2406         mutex_lock(&pl->state_mutex);
2407         pl->link_config.speed = config.speed;
2408         pl->link_config.duplex = config.duplex;
2409
2410         if (pl->link_config.interface != config.interface) {
2411                 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2412                 /* We need to force the link down, then change the interface */
2413                 if (pl->old_link_state) {
2414                         phylink_link_down(pl);
2415                         pl->old_link_state = false;
2416                 }
2417                 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2418                               &pl->phylink_disable_state))
2419                         phylink_major_config(pl, false, &config);
2420                 pl->link_config.interface = config.interface;
2421                 linkmode_copy(pl->link_config.advertising, config.advertising);
2422         } else if (!linkmode_equal(pl->link_config.advertising,
2423                                    config.advertising)) {
2424                 linkmode_copy(pl->link_config.advertising, config.advertising);
2425                 phylink_change_inband_advert(pl);
2426         }
2427         mutex_unlock(&pl->state_mutex);
2428
2429         return 0;
2430 }
2431 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2432
2433 /**
2434  * phylink_ethtool_nway_reset() - restart negotiation
2435  * @pl: a pointer to a &struct phylink returned from phylink_create()
2436  *
2437  * Restart negotiation for the phylink instance specified by @pl. This will
2438  * cause any attached phy to restart negotiation with the link partner, and
2439  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2440  * negotiation.
2441  *
2442  * Returns zero on success, or negative error code.
2443  */
2444 int phylink_ethtool_nway_reset(struct phylink *pl)
2445 {
2446         int ret = 0;
2447
2448         ASSERT_RTNL();
2449
2450         if (pl->phydev)
2451                 ret = phy_restart_aneg(pl->phydev);
2452         phylink_mac_pcs_an_restart(pl);
2453
2454         return ret;
2455 }
2456 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2457
2458 /**
2459  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2460  * @pl: a pointer to a &struct phylink returned from phylink_create()
2461  * @pause: a pointer to a &struct ethtool_pauseparam
2462  */
2463 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2464                                     struct ethtool_pauseparam *pause)
2465 {
2466         ASSERT_RTNL();
2467
2468         pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2469         pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2470         pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2471 }
2472 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2473
2474 /**
2475  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2476  * @pl: a pointer to a &struct phylink returned from phylink_create()
2477  * @pause: a pointer to a &struct ethtool_pauseparam
2478  */
2479 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2480                                    struct ethtool_pauseparam *pause)
2481 {
2482         struct phylink_link_state *config = &pl->link_config;
2483         bool manual_changed;
2484         int pause_state;
2485
2486         ASSERT_RTNL();
2487
2488         if (pl->cur_link_an_mode == MLO_AN_FIXED)
2489                 return -EOPNOTSUPP;
2490
2491         if (!phylink_test(pl->supported, Pause) &&
2492             !phylink_test(pl->supported, Asym_Pause))
2493                 return -EOPNOTSUPP;
2494
2495         if (!phylink_test(pl->supported, Asym_Pause) &&
2496             pause->rx_pause != pause->tx_pause)
2497                 return -EINVAL;
2498
2499         pause_state = 0;
2500         if (pause->autoneg)
2501                 pause_state |= MLO_PAUSE_AN;
2502         if (pause->rx_pause)
2503                 pause_state |= MLO_PAUSE_RX;
2504         if (pause->tx_pause)
2505                 pause_state |= MLO_PAUSE_TX;
2506
2507         mutex_lock(&pl->state_mutex);
2508         /*
2509          * See the comments for linkmode_set_pause(), wrt the deficiencies
2510          * with the current implementation.  A solution to this issue would
2511          * be:
2512          * ethtool  Local device
2513          *  rx  tx  Pause AsymDir
2514          *  0   0   0     0
2515          *  1   0   1     1
2516          *  0   1   0     1
2517          *  1   1   1     1
2518          * and then use the ethtool rx/tx enablement status to mask the
2519          * rx/tx pause resolution.
2520          */
2521         linkmode_set_pause(config->advertising, pause->tx_pause,
2522                            pause->rx_pause);
2523
2524         manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2525                          (!(pause_state & MLO_PAUSE_AN) &&
2526                            (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2527
2528         config->pause = pause_state;
2529
2530         /* Update our in-band advertisement, triggering a renegotiation if
2531          * the advertisement changed.
2532          */
2533         if (!pl->phydev)
2534                 phylink_change_inband_advert(pl);
2535
2536         mutex_unlock(&pl->state_mutex);
2537
2538         /* If we have a PHY, a change of the pause frame advertisement will
2539          * cause phylib to renegotiate (if AN is enabled) which will in turn
2540          * call our phylink_phy_change() and trigger a resolve.  Note that
2541          * we can't hold our state mutex while calling phy_set_asym_pause().
2542          */
2543         if (pl->phydev)
2544                 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2545                                    pause->tx_pause);
2546
2547         /* If the manual pause settings changed, make sure we trigger a
2548          * resolve to update their state; we can not guarantee that the
2549          * link will cycle.
2550          */
2551         if (manual_changed) {
2552                 pl->mac_link_dropped = true;
2553                 phylink_run_resolve(pl);
2554         }
2555
2556         return 0;
2557 }
2558 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2559
2560 /**
2561  * phylink_get_eee_err() - read the energy efficient ethernet error
2562  *   counter
2563  * @pl: a pointer to a &struct phylink returned from phylink_create().
2564  *
2565  * Read the Energy Efficient Ethernet error counter from the PHY associated
2566  * with the phylink instance specified by @pl.
2567  *
2568  * Returns positive error counter value, or negative error code.
2569  */
2570 int phylink_get_eee_err(struct phylink *pl)
2571 {
2572         int ret = 0;
2573
2574         ASSERT_RTNL();
2575
2576         if (pl->phydev)
2577                 ret = phy_get_eee_err(pl->phydev);
2578
2579         return ret;
2580 }
2581 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2582
2583 /**
2584  * phylink_init_eee() - init and check the EEE features
2585  * @pl: a pointer to a &struct phylink returned from phylink_create()
2586  * @clk_stop_enable: allow PHY to stop receive clock
2587  *
2588  * Must be called either with RTNL held or within mac_link_up()
2589  */
2590 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2591 {
2592         int ret = -EOPNOTSUPP;
2593
2594         if (pl->phydev)
2595                 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2596
2597         return ret;
2598 }
2599 EXPORT_SYMBOL_GPL(phylink_init_eee);
2600
2601 /**
2602  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2603  * @pl: a pointer to a &struct phylink returned from phylink_create()
2604  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2605  */
2606 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2607 {
2608         int ret = -EOPNOTSUPP;
2609
2610         ASSERT_RTNL();
2611
2612         if (pl->phydev)
2613                 ret = phy_ethtool_get_eee(pl->phydev, eee);
2614
2615         return ret;
2616 }
2617 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2618
2619 /**
2620  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2621  * @pl: a pointer to a &struct phylink returned from phylink_create()
2622  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2623  */
2624 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2625 {
2626         int ret = -EOPNOTSUPP;
2627
2628         ASSERT_RTNL();
2629
2630         if (pl->phydev)
2631                 ret = phy_ethtool_set_eee(pl->phydev, eee);
2632
2633         return ret;
2634 }
2635 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2636
2637 /* This emulates MII registers for a fixed-mode phy operating as per the
2638  * passed in state. "aneg" defines if we report negotiation is possible.
2639  *
2640  * FIXME: should deal with negotiation state too.
2641  */
2642 static int phylink_mii_emul_read(unsigned int reg,
2643                                  struct phylink_link_state *state)
2644 {
2645         struct fixed_phy_status fs;
2646         unsigned long *lpa = state->lp_advertising;
2647         int val;
2648
2649         fs.link = state->link;
2650         fs.speed = state->speed;
2651         fs.duplex = state->duplex;
2652         fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2653         fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2654
2655         val = swphy_read_reg(reg, &fs);
2656         if (reg == MII_BMSR) {
2657                 if (!state->an_complete)
2658                         val &= ~BMSR_ANEGCOMPLETE;
2659         }
2660         return val;
2661 }
2662
2663 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2664                             unsigned int reg)
2665 {
2666         struct phy_device *phydev = pl->phydev;
2667         int prtad, devad;
2668
2669         if (mdio_phy_id_is_c45(phy_id)) {
2670                 prtad = mdio_phy_id_prtad(phy_id);
2671                 devad = mdio_phy_id_devad(phy_id);
2672                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2673                                         reg);
2674         }
2675
2676         if (phydev->is_c45) {
2677                 switch (reg) {
2678                 case MII_BMCR:
2679                 case MII_BMSR:
2680                 case MII_PHYSID1:
2681                 case MII_PHYSID2:
2682                         devad = __ffs(phydev->c45_ids.mmds_present);
2683                         break;
2684                 case MII_ADVERTISE:
2685                 case MII_LPA:
2686                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2687                                 return -EINVAL;
2688                         devad = MDIO_MMD_AN;
2689                         if (reg == MII_ADVERTISE)
2690                                 reg = MDIO_AN_ADVERTISE;
2691                         else
2692                                 reg = MDIO_AN_LPA;
2693                         break;
2694                 default:
2695                         return -EINVAL;
2696                 }
2697                 prtad = phy_id;
2698                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2699                                         reg);
2700         }
2701
2702         return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2703 }
2704
2705 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2706                              unsigned int reg, unsigned int val)
2707 {
2708         struct phy_device *phydev = pl->phydev;
2709         int prtad, devad;
2710
2711         if (mdio_phy_id_is_c45(phy_id)) {
2712                 prtad = mdio_phy_id_prtad(phy_id);
2713                 devad = mdio_phy_id_devad(phy_id);
2714                 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2715                                          reg, val);
2716         }
2717
2718         if (phydev->is_c45) {
2719                 switch (reg) {
2720                 case MII_BMCR:
2721                 case MII_BMSR:
2722                 case MII_PHYSID1:
2723                 case MII_PHYSID2:
2724                         devad = __ffs(phydev->c45_ids.mmds_present);
2725                         break;
2726                 case MII_ADVERTISE:
2727                 case MII_LPA:
2728                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2729                                 return -EINVAL;
2730                         devad = MDIO_MMD_AN;
2731                         if (reg == MII_ADVERTISE)
2732                                 reg = MDIO_AN_ADVERTISE;
2733                         else
2734                                 reg = MDIO_AN_LPA;
2735                         break;
2736                 default:
2737                         return -EINVAL;
2738                 }
2739                 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2740                                          reg, val);
2741         }
2742
2743         return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2744 }
2745
2746 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2747                             unsigned int reg)
2748 {
2749         struct phylink_link_state state;
2750         int val = 0xffff;
2751
2752         switch (pl->cur_link_an_mode) {
2753         case MLO_AN_FIXED:
2754                 if (phy_id == 0) {
2755                         phylink_get_fixed_state(pl, &state);
2756                         val = phylink_mii_emul_read(reg, &state);
2757                 }
2758                 break;
2759
2760         case MLO_AN_PHY:
2761                 return -EOPNOTSUPP;
2762
2763         case MLO_AN_INBAND:
2764                 if (phy_id == 0) {
2765                         phylink_mac_pcs_get_state(pl, &state);
2766                         val = phylink_mii_emul_read(reg, &state);
2767                 }
2768                 break;
2769         }
2770
2771         return val & 0xffff;
2772 }
2773
2774 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2775                              unsigned int reg, unsigned int val)
2776 {
2777         switch (pl->cur_link_an_mode) {
2778         case MLO_AN_FIXED:
2779                 break;
2780
2781         case MLO_AN_PHY:
2782                 return -EOPNOTSUPP;
2783
2784         case MLO_AN_INBAND:
2785                 break;
2786         }
2787
2788         return 0;
2789 }
2790
2791 /**
2792  * phylink_mii_ioctl() - generic mii ioctl interface
2793  * @pl: a pointer to a &struct phylink returned from phylink_create()
2794  * @ifr: a pointer to a &struct ifreq for socket ioctls
2795  * @cmd: ioctl cmd to execute
2796  *
2797  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2798  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2799  *
2800  * Returns: zero on success or negative error code.
2801  *
2802  * %SIOCGMIIPHY:
2803  *  read register from the current PHY.
2804  * %SIOCGMIIREG:
2805  *  read register from the specified PHY.
2806  * %SIOCSMIIREG:
2807  *  set a register on the specified PHY.
2808  */
2809 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2810 {
2811         struct mii_ioctl_data *mii = if_mii(ifr);
2812         int  ret;
2813
2814         ASSERT_RTNL();
2815
2816         if (pl->phydev) {
2817                 /* PHYs only exist for MLO_AN_PHY and SGMII */
2818                 switch (cmd) {
2819                 case SIOCGMIIPHY:
2820                         mii->phy_id = pl->phydev->mdio.addr;
2821                         fallthrough;
2822
2823                 case SIOCGMIIREG:
2824                         ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2825                         if (ret >= 0) {
2826                                 mii->val_out = ret;
2827                                 ret = 0;
2828                         }
2829                         break;
2830
2831                 case SIOCSMIIREG:
2832                         ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2833                                                 mii->val_in);
2834                         break;
2835
2836                 default:
2837                         ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2838                         break;
2839                 }
2840         } else {
2841                 switch (cmd) {
2842                 case SIOCGMIIPHY:
2843                         mii->phy_id = 0;
2844                         fallthrough;
2845
2846                 case SIOCGMIIREG:
2847                         ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2848                         if (ret >= 0) {
2849                                 mii->val_out = ret;
2850                                 ret = 0;
2851                         }
2852                         break;
2853
2854                 case SIOCSMIIREG:
2855                         ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2856                                                 mii->val_in);
2857                         break;
2858
2859                 default:
2860                         ret = -EOPNOTSUPP;
2861                         break;
2862                 }
2863         }
2864
2865         return ret;
2866 }
2867 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2868
2869 /**
2870  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2871  *   link partners
2872  * @pl: a pointer to a &struct phylink returned from phylink_create()
2873  * @sync: perform action synchronously
2874  *
2875  * If we have a PHY that is not part of a SFP module, then set the speed
2876  * as described in the phy_speed_down() function. Please see this function
2877  * for a description of the @sync parameter.
2878  *
2879  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2880  */
2881 int phylink_speed_down(struct phylink *pl, bool sync)
2882 {
2883         int ret = 0;
2884
2885         ASSERT_RTNL();
2886
2887         if (!pl->sfp_bus && pl->phydev)
2888                 ret = phy_speed_down(pl->phydev, sync);
2889
2890         return ret;
2891 }
2892 EXPORT_SYMBOL_GPL(phylink_speed_down);
2893
2894 /**
2895  * phylink_speed_up() - restore the advertised speeds prior to the call to
2896  *   phylink_speed_down()
2897  * @pl: a pointer to a &struct phylink returned from phylink_create()
2898  *
2899  * If we have a PHY that is not part of a SFP module, then restore the
2900  * PHY speeds as per phy_speed_up().
2901  *
2902  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2903  */
2904 int phylink_speed_up(struct phylink *pl)
2905 {
2906         int ret = 0;
2907
2908         ASSERT_RTNL();
2909
2910         if (!pl->sfp_bus && pl->phydev)
2911                 ret = phy_speed_up(pl->phydev);
2912
2913         return ret;
2914 }
2915 EXPORT_SYMBOL_GPL(phylink_speed_up);
2916
2917 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2918 {
2919         struct phylink *pl = upstream;
2920
2921         pl->netdev->sfp_bus = bus;
2922 }
2923
2924 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2925 {
2926         struct phylink *pl = upstream;
2927
2928         pl->netdev->sfp_bus = NULL;
2929 }
2930
2931 static const phy_interface_t phylink_sfp_interface_preference[] = {
2932         PHY_INTERFACE_MODE_25GBASER,
2933         PHY_INTERFACE_MODE_USXGMII,
2934         PHY_INTERFACE_MODE_10GBASER,
2935         PHY_INTERFACE_MODE_5GBASER,
2936         PHY_INTERFACE_MODE_2500BASEX,
2937         PHY_INTERFACE_MODE_SGMII,
2938         PHY_INTERFACE_MODE_1000BASEX,
2939         PHY_INTERFACE_MODE_100BASEX,
2940 };
2941
2942 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
2943
2944 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
2945                                                     const unsigned long *intf)
2946 {
2947         phy_interface_t interface;
2948         size_t i;
2949
2950         interface = PHY_INTERFACE_MODE_NA;
2951         for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
2952                 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
2953                         interface = phylink_sfp_interface_preference[i];
2954                         break;
2955                 }
2956
2957         return interface;
2958 }
2959
2960 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
2961                                    unsigned long *supported,
2962                                    struct phylink_link_state *state)
2963 {
2964         bool changed = false;
2965
2966         phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2967                     phylink_an_mode_str(mode), phy_modes(state->interface),
2968                     __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
2969
2970         if (!linkmode_equal(pl->supported, supported)) {
2971                 linkmode_copy(pl->supported, supported);
2972                 changed = true;
2973         }
2974
2975         if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
2976                 linkmode_copy(pl->link_config.advertising, state->advertising);
2977                 changed = true;
2978         }
2979
2980         if (pl->cur_link_an_mode != mode ||
2981             pl->link_config.interface != state->interface) {
2982                 pl->cur_link_an_mode = mode;
2983                 pl->link_config.interface = state->interface;
2984
2985                 changed = true;
2986
2987                 phylink_info(pl, "switched to %s/%s link mode\n",
2988                              phylink_an_mode_str(mode),
2989                              phy_modes(state->interface));
2990         }
2991
2992         if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2993                                  &pl->phylink_disable_state))
2994                 phylink_mac_initial_config(pl, false);
2995 }
2996
2997 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
2998                                   struct phy_device *phy)
2999 {
3000         __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3001         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3002         struct phylink_link_state config;
3003         phy_interface_t iface;
3004         int ret;
3005
3006         linkmode_copy(support, phy->supported);
3007
3008         memset(&config, 0, sizeof(config));
3009         linkmode_copy(config.advertising, phy->advertising);
3010         config.interface = PHY_INTERFACE_MODE_NA;
3011         config.speed = SPEED_UNKNOWN;
3012         config.duplex = DUPLEX_UNKNOWN;
3013         config.pause = MLO_PAUSE_AN;
3014
3015         /* Ignore errors if we're expecting a PHY to attach later */
3016         ret = phylink_validate(pl, support, &config);
3017         if (ret) {
3018                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3019                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3020                             ERR_PTR(ret));
3021                 return ret;
3022         }
3023
3024         iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3025         if (iface == PHY_INTERFACE_MODE_NA) {
3026                 phylink_err(pl,
3027                             "selection of interface failed, advertisement %*pb\n",
3028                             __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3029                 return -EINVAL;
3030         }
3031
3032         config.interface = iface;
3033         linkmode_copy(support1, support);
3034         ret = phylink_validate(pl, support1, &config);
3035         if (ret) {
3036                 phylink_err(pl,
3037                             "validation of %s/%s with support %*pb failed: %pe\n",
3038                             phylink_an_mode_str(mode),
3039                             phy_modes(config.interface),
3040                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3041                             ERR_PTR(ret));
3042                 return ret;
3043         }
3044
3045         pl->link_port = pl->sfp_port;
3046
3047         phylink_sfp_set_config(pl, mode, support, &config);
3048
3049         return 0;
3050 }
3051
3052 static int phylink_sfp_config_optical(struct phylink *pl)
3053 {
3054         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3055         DECLARE_PHY_INTERFACE_MASK(interfaces);
3056         struct phylink_link_state config;
3057         phy_interface_t interface;
3058         int ret;
3059
3060         phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3061                     (int)PHY_INTERFACE_MODE_MAX,
3062                     pl->config->supported_interfaces,
3063                     (int)PHY_INTERFACE_MODE_MAX,
3064                     pl->sfp_interfaces);
3065
3066         /* Find the union of the supported interfaces by the PCS/MAC and
3067          * the SFP module.
3068          */
3069         phy_interface_and(interfaces, pl->config->supported_interfaces,
3070                           pl->sfp_interfaces);
3071         if (phy_interface_empty(interfaces)) {
3072                 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3073                 return -EINVAL;
3074         }
3075
3076         memset(&config, 0, sizeof(config));
3077         linkmode_copy(support, pl->sfp_support);
3078         linkmode_copy(config.advertising, pl->sfp_support);
3079         config.speed = SPEED_UNKNOWN;
3080         config.duplex = DUPLEX_UNKNOWN;
3081         config.pause = MLO_PAUSE_AN;
3082
3083         /* For all the interfaces that are supported, reduce the sfp_support
3084          * mask to only those link modes that can be supported.
3085          */
3086         ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
3087         if (ret) {
3088                 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3089                             __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3090                 return ret;
3091         }
3092
3093         interface = phylink_choose_sfp_interface(pl, interfaces);
3094         if (interface == PHY_INTERFACE_MODE_NA) {
3095                 phylink_err(pl, "failed to select SFP interface\n");
3096                 return -EINVAL;
3097         }
3098
3099         phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3100                     phy_modes(interface));
3101
3102         config.interface = interface;
3103
3104         /* Ignore errors if we're expecting a PHY to attach later */
3105         ret = phylink_validate(pl, support, &config);
3106         if (ret) {
3107                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3108                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3109                             ERR_PTR(ret));
3110                 return ret;
3111         }
3112
3113         pl->link_port = pl->sfp_port;
3114
3115         phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3116
3117         return 0;
3118 }
3119
3120 static int phylink_sfp_module_insert(void *upstream,
3121                                      const struct sfp_eeprom_id *id)
3122 {
3123         struct phylink *pl = upstream;
3124
3125         ASSERT_RTNL();
3126
3127         linkmode_zero(pl->sfp_support);
3128         phy_interface_zero(pl->sfp_interfaces);
3129         sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3130         pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3131
3132         /* If this module may have a PHY connecting later, defer until later */
3133         pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3134         if (pl->sfp_may_have_phy)
3135                 return 0;
3136
3137         return phylink_sfp_config_optical(pl);
3138 }
3139
3140 static int phylink_sfp_module_start(void *upstream)
3141 {
3142         struct phylink *pl = upstream;
3143
3144         /* If this SFP module has a PHY, start the PHY now. */
3145         if (pl->phydev) {
3146                 phy_start(pl->phydev);
3147                 return 0;
3148         }
3149
3150         /* If the module may have a PHY but we didn't detect one we
3151          * need to configure the MAC here.
3152          */
3153         if (!pl->sfp_may_have_phy)
3154                 return 0;
3155
3156         return phylink_sfp_config_optical(pl);
3157 }
3158
3159 static void phylink_sfp_module_stop(void *upstream)
3160 {
3161         struct phylink *pl = upstream;
3162
3163         /* If this SFP module has a PHY, stop it. */
3164         if (pl->phydev)
3165                 phy_stop(pl->phydev);
3166 }
3167
3168 static void phylink_sfp_link_down(void *upstream)
3169 {
3170         struct phylink *pl = upstream;
3171
3172         ASSERT_RTNL();
3173
3174         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3175 }
3176
3177 static void phylink_sfp_link_up(void *upstream)
3178 {
3179         struct phylink *pl = upstream;
3180
3181         ASSERT_RTNL();
3182
3183         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3184 }
3185
3186 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3187  * or 802.3z control word, so inband will not work.
3188  */
3189 static bool phylink_phy_no_inband(struct phy_device *phy)
3190 {
3191         return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3192                                              0xae025150, 0xfffffff0);
3193 }
3194
3195 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3196 {
3197         struct phylink *pl = upstream;
3198         phy_interface_t interface;
3199         u8 mode;
3200         int ret;
3201
3202         /*
3203          * This is the new way of dealing with flow control for PHYs,
3204          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3205          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3206          * using our validate call to the MAC, we rely upon the MAC
3207          * clearing the bits from both supported and advertising fields.
3208          */
3209         phy_support_asym_pause(phy);
3210
3211         if (phylink_phy_no_inband(phy))
3212                 mode = MLO_AN_PHY;
3213         else
3214                 mode = MLO_AN_INBAND;
3215
3216         /* Set the PHY's host supported interfaces */
3217         phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3218                           pl->config->supported_interfaces);
3219
3220         /* Do the initial configuration */
3221         ret = phylink_sfp_config_phy(pl, mode, phy);
3222         if (ret < 0)
3223                 return ret;
3224
3225         interface = pl->link_config.interface;
3226         ret = phylink_attach_phy(pl, phy, interface);
3227         if (ret < 0)
3228                 return ret;
3229
3230         ret = phylink_bringup_phy(pl, phy, interface);
3231         if (ret)
3232                 phy_detach(phy);
3233
3234         return ret;
3235 }
3236
3237 static void phylink_sfp_disconnect_phy(void *upstream)
3238 {
3239         phylink_disconnect_phy(upstream);
3240 }
3241
3242 static const struct sfp_upstream_ops sfp_phylink_ops = {
3243         .attach = phylink_sfp_attach,
3244         .detach = phylink_sfp_detach,
3245         .module_insert = phylink_sfp_module_insert,
3246         .module_start = phylink_sfp_module_start,
3247         .module_stop = phylink_sfp_module_stop,
3248         .link_up = phylink_sfp_link_up,
3249         .link_down = phylink_sfp_link_down,
3250         .connect_phy = phylink_sfp_connect_phy,
3251         .disconnect_phy = phylink_sfp_disconnect_phy,
3252 };
3253
3254 /* Helpers for MAC drivers */
3255
3256 static struct {
3257         int bit;
3258         int speed;
3259 } phylink_c73_priority_resolution[] = {
3260         { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3261         { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3262         /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3263         { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3264         { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3265         { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3266         { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3267         /* 5GBASE-KR not supported */
3268         { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3269         { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3270 };
3271
3272 void phylink_resolve_c73(struct phylink_link_state *state)
3273 {
3274         int i;
3275
3276         for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3277                 int bit = phylink_c73_priority_resolution[i].bit;
3278                 if (linkmode_test_bit(bit, state->advertising) &&
3279                     linkmode_test_bit(bit, state->lp_advertising))
3280                         break;
3281         }
3282
3283         if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3284                 state->speed = phylink_c73_priority_resolution[i].speed;
3285                 state->duplex = DUPLEX_FULL;
3286         } else {
3287                 /* negotiation failure */
3288                 state->link = false;
3289         }
3290
3291         phylink_resolve_an_pause(state);
3292 }
3293 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3294
3295 static void phylink_decode_c37_word(struct phylink_link_state *state,
3296                                     uint16_t config_reg, int speed)
3297 {
3298         int fd_bit;
3299
3300         if (speed == SPEED_2500)
3301                 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3302         else
3303                 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3304
3305         mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3306
3307         if (linkmode_test_bit(fd_bit, state->advertising) &&
3308             linkmode_test_bit(fd_bit, state->lp_advertising)) {
3309                 state->speed = speed;
3310                 state->duplex = DUPLEX_FULL;
3311         } else {
3312                 /* negotiation failure */
3313                 state->link = false;
3314         }
3315
3316         phylink_resolve_an_pause(state);
3317 }
3318
3319 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3320                                       uint16_t config_reg)
3321 {
3322         if (!(config_reg & LPA_SGMII_LINK)) {
3323                 state->link = false;
3324                 return;
3325         }
3326
3327         switch (config_reg & LPA_SGMII_SPD_MASK) {
3328         case LPA_SGMII_10:
3329                 state->speed = SPEED_10;
3330                 break;
3331         case LPA_SGMII_100:
3332                 state->speed = SPEED_100;
3333                 break;
3334         case LPA_SGMII_1000:
3335                 state->speed = SPEED_1000;
3336                 break;
3337         default:
3338                 state->link = false;
3339                 return;
3340         }
3341         if (config_reg & LPA_SGMII_FULL_DUPLEX)
3342                 state->duplex = DUPLEX_FULL;
3343         else
3344                 state->duplex = DUPLEX_HALF;
3345 }
3346
3347 /**
3348  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3349  * @state: a pointer to a struct phylink_link_state.
3350  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3351  *
3352  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3353  * code word.  Decode the USXGMII code word and populate the corresponding fields
3354  * (speed, duplex) into the phylink_link_state structure.
3355  */
3356 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3357                                  uint16_t lpa)
3358 {
3359         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3360         case MDIO_USXGMII_10:
3361                 state->speed = SPEED_10;
3362                 break;
3363         case MDIO_USXGMII_100:
3364                 state->speed = SPEED_100;
3365                 break;
3366         case MDIO_USXGMII_1000:
3367                 state->speed = SPEED_1000;
3368                 break;
3369         case MDIO_USXGMII_2500:
3370                 state->speed = SPEED_2500;
3371                 break;
3372         case MDIO_USXGMII_5000:
3373                 state->speed = SPEED_5000;
3374                 break;
3375         case MDIO_USXGMII_10G:
3376                 state->speed = SPEED_10000;
3377                 break;
3378         default:
3379                 state->link = false;
3380                 return;
3381         }
3382
3383         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3384                 state->duplex = DUPLEX_FULL;
3385         else
3386                 state->duplex = DUPLEX_HALF;
3387 }
3388 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3389
3390 /**
3391  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3392  * @state: a pointer to a struct phylink_link_state.
3393  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3394  *
3395  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3396  * code word.  Decode the USGMII code word and populate the corresponding fields
3397  * (speed, duplex) into the phylink_link_state structure. The structure for this
3398  * word is the same as the USXGMII word, except it only supports speeds up to
3399  * 1Gbps.
3400  */
3401 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3402                                        uint16_t lpa)
3403 {
3404         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3405         case MDIO_USXGMII_10:
3406                 state->speed = SPEED_10;
3407                 break;
3408         case MDIO_USXGMII_100:
3409                 state->speed = SPEED_100;
3410                 break;
3411         case MDIO_USXGMII_1000:
3412                 state->speed = SPEED_1000;
3413                 break;
3414         default:
3415                 state->link = false;
3416                 return;
3417         }
3418
3419         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3420                 state->duplex = DUPLEX_FULL;
3421         else
3422                 state->duplex = DUPLEX_HALF;
3423 }
3424
3425 /**
3426  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3427  * @state: a pointer to a &struct phylink_link_state.
3428  * @bmsr: The value of the %MII_BMSR register
3429  * @lpa: The value of the %MII_LPA register
3430  *
3431  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3432  * clause 37 negotiation and/or SGMII control.
3433  *
3434  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3435  * the phylink @state structure. This is suitable to be used for implementing
3436  * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
3437  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3438  */
3439 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3440                                       u16 bmsr, u16 lpa)
3441 {
3442         state->link = !!(bmsr & BMSR_LSTATUS);
3443         state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3444         /* If there is no link or autonegotiation is disabled, the LP advertisement
3445          * data is not meaningful, so don't go any further.
3446          */
3447         if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3448                                                state->advertising))
3449                 return;
3450
3451         switch (state->interface) {
3452         case PHY_INTERFACE_MODE_1000BASEX:
3453                 phylink_decode_c37_word(state, lpa, SPEED_1000);
3454                 break;
3455
3456         case PHY_INTERFACE_MODE_2500BASEX:
3457                 phylink_decode_c37_word(state, lpa, SPEED_2500);
3458                 break;
3459
3460         case PHY_INTERFACE_MODE_SGMII:
3461         case PHY_INTERFACE_MODE_QSGMII:
3462                 phylink_decode_sgmii_word(state, lpa);
3463                 break;
3464         case PHY_INTERFACE_MODE_QUSGMII:
3465                 phylink_decode_usgmii_word(state, lpa);
3466                 break;
3467
3468         default:
3469                 state->link = false;
3470                 break;
3471         }
3472 }
3473 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3474
3475 /**
3476  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3477  * @pcs: a pointer to a &struct mdio_device.
3478  * @state: a pointer to a &struct phylink_link_state.
3479  *
3480  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3481  * clause 37 negotiation and/or SGMII control.
3482  *
3483  * Read the MAC PCS state from the MII device configured in @config and
3484  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3485  * the phylink @state structure. This is suitable to be directly plugged
3486  * into the mac_pcs_get_state() member of the struct phylink_mac_ops
3487  * structure.
3488  */
3489 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3490                                    struct phylink_link_state *state)
3491 {
3492         int bmsr, lpa;
3493
3494         bmsr = mdiodev_read(pcs, MII_BMSR);
3495         lpa = mdiodev_read(pcs, MII_LPA);
3496         if (bmsr < 0 || lpa < 0) {
3497                 state->link = false;
3498                 return;
3499         }
3500
3501         phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3502 }
3503 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3504
3505 /**
3506  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3507  *      advertisement
3508  * @interface: the PHY interface mode being configured
3509  * @advertising: the ethtool advertisement mask
3510  *
3511  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3512  * clause 37 negotiation and/or SGMII control.
3513  *
3514  * Encode the clause 37 PCS advertisement as specified by @interface and
3515  * @advertising.
3516  *
3517  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3518  */
3519 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3520                                              const unsigned long *advertising)
3521 {
3522         u16 adv;
3523
3524         switch (interface) {
3525         case PHY_INTERFACE_MODE_1000BASEX:
3526         case PHY_INTERFACE_MODE_2500BASEX:
3527                 adv = ADVERTISE_1000XFULL;
3528                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3529                                       advertising))
3530                         adv |= ADVERTISE_1000XPAUSE;
3531                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3532                                       advertising))
3533                         adv |= ADVERTISE_1000XPSE_ASYM;
3534                 return adv;
3535         case PHY_INTERFACE_MODE_SGMII:
3536         case PHY_INTERFACE_MODE_QSGMII:
3537                 return 0x0001;
3538         default:
3539                 /* Nothing to do for other modes */
3540                 return -EINVAL;
3541         }
3542 }
3543 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3544
3545 /**
3546  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3547  * @pcs: a pointer to a &struct mdio_device.
3548  * @interface: the PHY interface mode being configured
3549  * @advertising: the ethtool advertisement mask
3550  * @neg_mode: PCS negotiation mode
3551  *
3552  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3553  * parameters for the @mode, @interface and @advertising parameters.
3554  * Returns negative error number on failure, zero if the advertisement
3555  * has not changed, or positive if there is a change.
3556  */
3557 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3558                                phy_interface_t interface,
3559                                const unsigned long *advertising,
3560                                unsigned int neg_mode)
3561 {
3562         bool changed = 0;
3563         u16 bmcr;
3564         int ret, adv;
3565
3566         adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3567         if (adv >= 0) {
3568                 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3569                                              MII_ADVERTISE, 0xffff, adv);
3570                 if (ret < 0)
3571                         return ret;
3572                 changed = ret;
3573         }
3574
3575         if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3576                 bmcr = BMCR_ANENABLE;
3577         else
3578                 bmcr = 0;
3579
3580         /* Configure the inband state. Ensure ISOLATE bit is disabled */
3581         ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3582         if (ret < 0)
3583                 return ret;
3584
3585         return changed;
3586 }
3587 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3588
3589 /**
3590  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3591  * @pcs: a pointer to a &struct mdio_device.
3592  *
3593  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3594  * clause 37 negotiation.
3595  *
3596  * Restart the clause 37 negotiation with the link partner. This is
3597  * suitable to be directly plugged into the mac_pcs_get_state() member
3598  * of the struct phylink_mac_ops structure.
3599  */
3600 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3601 {
3602         int val = mdiodev_read(pcs, MII_BMCR);
3603
3604         if (val >= 0) {
3605                 val |= BMCR_ANRESTART;
3606
3607                 mdiodev_write(pcs, MII_BMCR, val);
3608         }
3609 }
3610 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3611
3612 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3613                                    struct phylink_link_state *state)
3614 {
3615         struct mii_bus *bus = pcs->bus;
3616         int addr = pcs->addr;
3617         int stat;
3618
3619         stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3620         if (stat < 0) {
3621                 state->link = false;
3622                 return;
3623         }
3624
3625         state->link = !!(stat & MDIO_STAT1_LSTATUS);
3626         if (!state->link)
3627                 return;
3628
3629         switch (state->interface) {
3630         case PHY_INTERFACE_MODE_10GBASER:
3631                 state->speed = SPEED_10000;
3632                 state->duplex = DUPLEX_FULL;
3633                 break;
3634
3635         default:
3636                 break;
3637         }
3638 }
3639 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3640
3641 static int __init phylink_init(void)
3642 {
3643         for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3644                 __set_bit(phylink_sfp_interface_preference[i],
3645                           phylink_sfp_interfaces);
3646
3647         return 0;
3648 }
3649
3650 module_init(phylink_init);
3651
3652 MODULE_LICENSE("GPL v2");