]> Git Repo - linux.git/blob - drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm...
[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_prime.c
1 /*
2  * Copyright 2012 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * based on nouveau_prime.c
23  *
24  * Authors: Alex Deucher
25  */
26 #include <drm/drmP.h>
27
28 #include "amdgpu.h"
29 #include "amdgpu_display.h"
30 #include <drm/amdgpu_drm.h>
31 #include <linux/dma-buf.h>
32
33 static const struct dma_buf_ops amdgpu_dmabuf_ops;
34
35 struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
36 {
37         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
38         int npages = bo->tbo.num_pages;
39
40         return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
41 }
42
43 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
44 {
45         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
46         int ret;
47
48         ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
49                           &bo->dma_buf_vmap);
50         if (ret)
51                 return ERR_PTR(ret);
52
53         return bo->dma_buf_vmap.virtual;
54 }
55
56 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
57 {
58         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
59
60         ttm_bo_kunmap(&bo->dma_buf_vmap);
61 }
62
63 int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
64 {
65         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
66         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
67         unsigned asize = amdgpu_bo_size(bo);
68         int ret;
69
70         if (!vma->vm_file)
71                 return -ENODEV;
72
73         if (adev == NULL)
74                 return -ENODEV;
75
76         /* Check for valid size. */
77         if (asize < vma->vm_end - vma->vm_start)
78                 return -EINVAL;
79
80         if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
81             (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
82                 return -EPERM;
83         }
84         vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
85
86         /* prime mmap does not need to check access, so allow here */
87         ret = drm_vma_node_allow(&obj->vma_node, vma->vm_file->private_data);
88         if (ret)
89                 return ret;
90
91         ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev);
92         drm_vma_node_revoke(&obj->vma_node, vma->vm_file->private_data);
93
94         return ret;
95 }
96
97 struct drm_gem_object *
98 amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
99                                  struct dma_buf_attachment *attach,
100                                  struct sg_table *sg)
101 {
102         struct reservation_object *resv = attach->dmabuf->resv;
103         struct amdgpu_device *adev = dev->dev_private;
104         struct amdgpu_bo *bo;
105         int ret;
106
107         ww_mutex_lock(&resv->lock, NULL);
108         ret = amdgpu_bo_create(adev, attach->dmabuf->size, PAGE_SIZE, false,
109                                AMDGPU_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
110         if (ret)
111                 goto error;
112
113         if (attach->dmabuf->ops != &amdgpu_dmabuf_ops)
114                 bo->prime_shared_count = 1;
115
116         ww_mutex_unlock(&resv->lock);
117         return &bo->gem_base;
118
119 error:
120         ww_mutex_unlock(&resv->lock);
121         return ERR_PTR(ret);
122 }
123
124 static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
125                                  struct device *target_dev,
126                                  struct dma_buf_attachment *attach)
127 {
128         struct drm_gem_object *obj = dma_buf->priv;
129         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
130         long r;
131
132         r = drm_gem_map_attach(dma_buf, target_dev, attach);
133         if (r)
134                 return r;
135
136         r = amdgpu_bo_reserve(bo, false);
137         if (unlikely(r != 0))
138                 goto error_detach;
139
140
141         if (dma_buf->ops != &amdgpu_dmabuf_ops) {
142                 /*
143                  * Wait for all shared fences to complete before we switch to future
144                  * use of exclusive fence on this prime shared bo.
145                  */
146                 r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
147                                                         true, false,
148                                                         MAX_SCHEDULE_TIMEOUT);
149                 if (unlikely(r < 0)) {
150                         DRM_DEBUG_PRIME("Fence wait failed: %li\n", r);
151                         goto error_unreserve;
152                 }
153         }
154
155         /* pin buffer into GTT */
156         r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
157         if (r)
158                 goto error_unreserve;
159
160         if (dma_buf->ops != &amdgpu_dmabuf_ops)
161                 bo->prime_shared_count++;
162
163 error_unreserve:
164         amdgpu_bo_unreserve(bo);
165
166 error_detach:
167         if (r)
168                 drm_gem_map_detach(dma_buf, attach);
169         return r;
170 }
171
172 static void amdgpu_gem_map_detach(struct dma_buf *dma_buf,
173                                   struct dma_buf_attachment *attach)
174 {
175         struct drm_gem_object *obj = dma_buf->priv;
176         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
177         int ret = 0;
178
179         ret = amdgpu_bo_reserve(bo, true);
180         if (unlikely(ret != 0))
181                 goto error;
182
183         amdgpu_bo_unpin(bo);
184         if (dma_buf->ops != &amdgpu_dmabuf_ops && bo->prime_shared_count)
185                 bo->prime_shared_count--;
186         amdgpu_bo_unreserve(bo);
187
188 error:
189         drm_gem_map_detach(dma_buf, attach);
190 }
191
192 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
193 {
194         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
195
196         return bo->tbo.resv;
197 }
198
199 static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
200                                        enum dma_data_direction direction)
201 {
202         struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
203         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
204         struct ttm_operation_ctx ctx = { true, false };
205         u32 domain = amdgpu_display_framebuffer_domains(adev);
206         int ret;
207         bool reads = (direction == DMA_BIDIRECTIONAL ||
208                       direction == DMA_FROM_DEVICE);
209
210         if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
211                 return 0;
212
213         /* move to gtt */
214         ret = amdgpu_bo_reserve(bo, false);
215         if (unlikely(ret != 0))
216                 return ret;
217
218         if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
219                 amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
220                 ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
221         }
222
223         amdgpu_bo_unreserve(bo);
224         return ret;
225 }
226
227 static const struct dma_buf_ops amdgpu_dmabuf_ops = {
228         .attach = amdgpu_gem_map_attach,
229         .detach = amdgpu_gem_map_detach,
230         .map_dma_buf = drm_gem_map_dma_buf,
231         .unmap_dma_buf = drm_gem_unmap_dma_buf,
232         .release = drm_gem_dmabuf_release,
233         .begin_cpu_access = amdgpu_gem_begin_cpu_access,
234         .map = drm_gem_dmabuf_kmap,
235         .map_atomic = drm_gem_dmabuf_kmap_atomic,
236         .unmap = drm_gem_dmabuf_kunmap,
237         .unmap_atomic = drm_gem_dmabuf_kunmap_atomic,
238         .mmap = drm_gem_dmabuf_mmap,
239         .vmap = drm_gem_dmabuf_vmap,
240         .vunmap = drm_gem_dmabuf_vunmap,
241 };
242
243 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
244                                         struct drm_gem_object *gobj,
245                                         int flags)
246 {
247         struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
248         struct dma_buf *buf;
249
250         if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
251             bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
252                 return ERR_PTR(-EPERM);
253
254         buf = drm_gem_prime_export(dev, gobj, flags);
255         if (!IS_ERR(buf)) {
256                 buf->file->f_mapping = dev->anon_inode->i_mapping;
257                 buf->ops = &amdgpu_dmabuf_ops;
258         }
259
260         return buf;
261 }
262
263 struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
264                                             struct dma_buf *dma_buf)
265 {
266         struct drm_gem_object *obj;
267
268         if (dma_buf->ops == &amdgpu_dmabuf_ops) {
269                 obj = dma_buf->priv;
270                 if (obj->dev == dev) {
271                         /*
272                          * Importing dmabuf exported from out own gem increases
273                          * refcount on gem itself instead of f_count of dmabuf.
274                          */
275                         drm_gem_object_get(obj);
276                         return obj;
277                 }
278         }
279
280         return drm_gem_prime_import(dev, dma_buf);
281 }
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