2 * Support for LG2160 - ATSC/MH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/jiffies.h>
19 #include <linux/dvb/frontend.h>
23 module_param(debug, int, 0644);
24 MODULE_PARM_DESC(debug, "set debug level (info=1, reg=2 (or-able))");
29 #define lg_printk(kern, fmt, arg...) \
30 printk(kern "%s: " fmt, __func__, ##arg)
32 #define lg_info(fmt, arg...) printk(KERN_INFO "lg2160: " fmt, ##arg)
33 #define lg_warn(fmt, arg...) lg_printk(KERN_WARNING, fmt, ##arg)
34 #define lg_err(fmt, arg...) lg_printk(KERN_ERR, fmt, ##arg)
35 #define lg_dbg(fmt, arg...) if (debug & DBG_INFO) \
36 lg_printk(KERN_DEBUG, fmt, ##arg)
37 #define lg_reg(fmt, arg...) if (debug & DBG_REG) \
38 lg_printk(KERN_DEBUG, fmt, ##arg)
40 #define lg_fail(ret) \
45 lg_err("error %d on line %d\n", ret, __LINE__); \
50 struct i2c_adapter *i2c_adap;
51 const struct lg2160_config *cfg;
53 struct dvb_frontend frontend;
55 u32 current_frequency;
58 unsigned int last_reset;
61 /* ------------------------------------------------------------------------ */
63 static int lg216x_write_reg(struct lg216x_state *state, u16 reg, u8 val)
66 u8 buf[] = { reg >> 8, reg & 0xff, val };
67 struct i2c_msg msg = {
68 .addr = state->cfg->i2c_addr, .flags = 0,
72 lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val);
74 ret = i2c_transfer(state->i2c_adap, &msg, 1);
77 lg_err("error (addr %02x %02x <- %02x, err = %i)\n",
78 msg.buf[0], msg.buf[1], msg.buf[2], ret);
87 static int lg216x_read_reg(struct lg216x_state *state, u16 reg, u8 *val)
90 u8 reg_buf[] = { reg >> 8, reg & 0xff };
91 struct i2c_msg msg[] = {
92 { .addr = state->cfg->i2c_addr,
93 .flags = 0, .buf = reg_buf, .len = 2 },
94 { .addr = state->cfg->i2c_addr,
95 .flags = I2C_M_RD, .buf = val, .len = 1 },
98 lg_reg("reg: 0x%04x\n", reg);
100 ret = i2c_transfer(state->i2c_adap, msg, 2);
103 lg_err("error (addr %02x reg %04x error (ret == %i)\n",
104 state->cfg->i2c_addr, reg, ret);
118 static int lg216x_write_regs(struct lg216x_state *state,
119 struct lg216x_reg *regs, int len)
123 lg_reg("writing %d registers...\n", len);
125 for (i = 0; i < len; i++) {
126 ret = lg216x_write_reg(state, regs[i].reg, regs[i].val);
133 static int lg216x_set_reg_bit(struct lg216x_state *state,
134 u16 reg, int bit, int onoff)
139 lg_reg("reg: 0x%04x, bit: %d, level: %d\n", reg, bit, onoff);
141 ret = lg216x_read_reg(state, reg, &val);
146 val |= (onoff & 1) << bit;
148 ret = lg216x_write_reg(state, reg, val);
154 /* ------------------------------------------------------------------------ */
156 static int lg216x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
158 struct lg216x_state *state = fe->demodulator_priv;
161 if (state->cfg->deny_i2c_rptr)
164 lg_dbg("(%d)\n", enable);
166 ret = lg216x_set_reg_bit(state, 0x0000, 0, enable ? 0 : 1);
173 static int lg216x_soft_reset(struct lg216x_state *state)
179 ret = lg216x_write_reg(state, 0x0002, 0x00);
184 ret = lg216x_write_reg(state, 0x0002, 0x01);
188 state->last_reset = jiffies_to_msecs(jiffies);
193 static int lg216x_initialize(struct lg216x_state *state)
197 static struct lg216x_reg lg2160_init[] = {
199 { .reg = 0x0015, .val = 0xe6 },
201 { .reg = 0x0015, .val = 0xf7 },
202 { .reg = 0x001b, .val = 0x52 },
203 { .reg = 0x0208, .val = 0x00 },
204 { .reg = 0x0209, .val = 0x82 },
205 { .reg = 0x0210, .val = 0xf9 },
206 { .reg = 0x020a, .val = 0x00 },
207 { .reg = 0x020b, .val = 0x82 },
208 { .reg = 0x020d, .val = 0x28 },
209 { .reg = 0x020f, .val = 0x14 },
213 static struct lg216x_reg lg2161_init[] = {
214 { .reg = 0x0000, .val = 0x41 },
215 { .reg = 0x0001, .val = 0xfb },
216 { .reg = 0x0216, .val = 0x00 },
217 { .reg = 0x0219, .val = 0x00 },
218 { .reg = 0x021b, .val = 0x55 },
219 { .reg = 0x0606, .val = 0x0a },
222 switch (state->cfg->lg_chip) {
224 ret = lg216x_write_regs(state,
225 lg2160_init, ARRAY_SIZE(lg2160_init));
228 ret = lg216x_write_regs(state,
229 lg2161_init, ARRAY_SIZE(lg2161_init));
238 ret = lg216x_soft_reset(state);
244 /* ------------------------------------------------------------------------ */
246 static int lg216x_set_if(struct lg216x_state *state)
251 lg_dbg("%d KHz\n", state->cfg->if_khz);
253 ret = lg216x_read_reg(state, 0x0132, &val);
258 val |= (0 == state->cfg->if_khz) ? 0x04 : 0x00;
260 ret = lg216x_write_reg(state, 0x0132, val);
263 /* if NOT zero IF, 6 MHz is the default */
268 /* ------------------------------------------------------------------------ */
270 static int lg2160_agc_fix(struct lg216x_state *state,
271 int if_agc_fix, int rf_agc_fix)
276 ret = lg216x_read_reg(state, 0x0100, &val);
281 val |= (if_agc_fix) ? 0x08 : 0x00;
282 val |= (rf_agc_fix) ? 0x04 : 0x00;
284 ret = lg216x_write_reg(state, 0x0100, val);
291 static int lg2160_agc_freeze(struct lg216x_state *state,
292 int if_agc_freeze, int rf_agc_freeze)
297 ret = lg216x_read_reg(state, 0x0100, &val);
302 val |= (if_agc_freeze) ? 0x20 : 0x00;
303 val |= (rf_agc_freeze) ? 0x10 : 0x00;
305 ret = lg216x_write_reg(state, 0x0100, val);
312 static int lg2160_agc_polarity(struct lg216x_state *state,
313 int if_agc_polarity, int rf_agc_polarity)
318 ret = lg216x_read_reg(state, 0x0100, &val);
323 val |= (if_agc_polarity) ? 0x02 : 0x00;
324 val |= (rf_agc_polarity) ? 0x01 : 0x00;
326 ret = lg216x_write_reg(state, 0x0100, val);
332 static int lg2160_tuner_pwr_save_polarity(struct lg216x_state *state,
338 ret = lg216x_read_reg(state, 0x0008, &val);
343 val |= (polarity) ? 0x01 : 0x00;
345 ret = lg216x_write_reg(state, 0x0008, val);
351 static int lg2160_spectrum_polarity(struct lg216x_state *state,
357 ret = lg216x_read_reg(state, 0x0132, &val);
362 val |= (inverted) ? 0x02 : 0x00;
364 ret = lg216x_write_reg(state, 0x0132, val);
367 return lg216x_soft_reset(state);
370 static int lg2160_tuner_pwr_save(struct lg216x_state *state, int onoff)
375 ret = lg216x_read_reg(state, 0x0007, &val);
380 val |= (onoff) ? 0x40 : 0x00;
382 ret = lg216x_write_reg(state, 0x0007, val);
388 static int lg216x_set_parade(struct lg216x_state *state, int id)
392 ret = lg216x_write_reg(state, 0x013e, id & 0x7f);
396 state->parade_id = id & 0x7f;
401 static int lg216x_set_ensemble(struct lg216x_state *state, int id)
407 switch (state->cfg->lg_chip) {
417 ret = lg216x_read_reg(state, reg, &val);
422 val |= (id) ? 0x01 : 0x00;
424 ret = lg216x_write_reg(state, reg, val);
430 static int lg2160_set_spi_clock(struct lg216x_state *state)
435 ret = lg216x_read_reg(state, 0x0014, &val);
440 val |= (state->cfg->spi_clock << 2);
442 ret = lg216x_write_reg(state, 0x0014, val);
448 static int lg2161_set_output_interface(struct lg216x_state *state)
453 ret = lg216x_read_reg(state, 0x0014, &val);
458 val |= state->cfg->output_if; /* FIXME: needs sanity check */
460 ret = lg216x_write_reg(state, 0x0014, val);
466 static int lg216x_enable_fic(struct lg216x_state *state, int onoff)
470 ret = lg216x_write_reg(state, 0x0017, 0x23);
474 ret = lg216x_write_reg(state, 0x0016, 0xfc);
478 switch (state->cfg->lg_chip) {
480 ret = lg216x_write_reg(state, 0x0016,
481 0xfc | ((onoff) ? 0x02 : 0x00));
484 ret = lg216x_write_reg(state, 0x0016, (onoff) ? 0x10 : 0x00);
490 ret = lg216x_initialize(state);
495 ret = lg216x_write_reg(state, 0x0017, 0x03);
502 /* ------------------------------------------------------------------------ */
504 static int lg216x_get_fic_version(struct lg216x_state *state, u8 *ficver)
509 *ficver = 0xff; /* invalid value */
511 ret = lg216x_read_reg(state, 0x0128, &val);
515 *ficver = (val >> 3) & 0x1f;
521 static int lg2160_get_parade_id(struct lg216x_state *state, u8 *id)
526 *id = 0xff; /* invalid value */
528 ret = lg216x_read_reg(state, 0x0123, &val);
538 static int lg216x_get_nog(struct lg216x_state *state, u8 *nog)
543 *nog = 0xff; /* invalid value */
545 ret = lg216x_read_reg(state, 0x0124, &val);
549 *nog = ((val >> 4) & 0x07) + 1;
554 static int lg216x_get_tnog(struct lg216x_state *state, u8 *tnog)
559 *tnog = 0xff; /* invalid value */
561 ret = lg216x_read_reg(state, 0x0125, &val);
570 static int lg216x_get_sgn(struct lg216x_state *state, u8 *sgn)
575 *sgn = 0xff; /* invalid value */
577 ret = lg216x_read_reg(state, 0x0124, &val);
586 static int lg216x_get_prc(struct lg216x_state *state, u8 *prc)
591 *prc = 0xff; /* invalid value */
593 ret = lg216x_read_reg(state, 0x0125, &val);
597 *prc = ((val >> 5) & 0x07) + 1;
602 /* ------------------------------------------------------------------------ */
604 static int lg216x_get_rs_frame_mode(struct lg216x_state *state,
605 enum atscmh_rs_frame_mode *rs_framemode)
610 switch (state->cfg->lg_chip) {
612 ret = lg216x_read_reg(state, 0x0410, &val);
615 ret = lg216x_read_reg(state, 0x0513, &val);
623 switch ((val >> 4) & 0x03) {
628 *rs_framemode = ATSCMH_RSFRAME_PRI_ONLY;
631 *rs_framemode = ATSCMH_RSFRAME_PRI_SEC;
635 *rs_framemode = ATSCMH_RSFRAME_RES;
644 int lg216x_get_rs_frame_ensemble(struct lg216x_state *state,
645 enum atscmh_rs_frame_ensemble *rs_frame_ens)
650 switch (state->cfg->lg_chip) {
652 ret = lg216x_read_reg(state, 0x0400, &val);
655 ret = lg216x_read_reg(state, 0x0500, &val);
664 *rs_frame_ens = (enum atscmh_rs_frame_ensemble) val;
669 static int lg216x_get_rs_code_mode(struct lg216x_state *state,
670 enum atscmh_rs_code_mode *rs_code_pri,
671 enum atscmh_rs_code_mode *rs_code_sec)
676 switch (state->cfg->lg_chip) {
678 ret = lg216x_read_reg(state, 0x0410, &val);
681 ret = lg216x_read_reg(state, 0x0513, &val);
689 *rs_code_pri = (enum atscmh_rs_code_mode) ((val >> 2) & 0x03);
690 *rs_code_sec = (enum atscmh_rs_code_mode) (val & 0x03);
695 static int lg216x_get_sccc_block_mode(struct lg216x_state *state,
696 enum atscmh_sccc_block_mode *sccc_block)
701 switch (state->cfg->lg_chip) {
703 ret = lg216x_read_reg(state, 0x0315, &val);
706 ret = lg216x_read_reg(state, 0x0511, &val);
714 switch (val & 0x03) {
716 *sccc_block = ATSCMH_SCCC_BLK_SEP;
719 *sccc_block = ATSCMH_SCCC_BLK_COMB;
722 *sccc_block = ATSCMH_SCCC_BLK_RES;
729 static int lg216x_get_sccc_code_mode(struct lg216x_state *state,
730 enum atscmh_sccc_code_mode *mode_a,
731 enum atscmh_sccc_code_mode *mode_b,
732 enum atscmh_sccc_code_mode *mode_c,
733 enum atscmh_sccc_code_mode *mode_d)
738 switch (state->cfg->lg_chip) {
740 ret = lg216x_read_reg(state, 0x0316, &val);
743 ret = lg216x_read_reg(state, 0x0512, &val);
751 switch ((val >> 6) & 0x03) {
753 *mode_a = ATSCMH_SCCC_CODE_HLF;
756 *mode_a = ATSCMH_SCCC_CODE_QTR;
759 *mode_a = ATSCMH_SCCC_CODE_RES;
763 switch ((val >> 4) & 0x03) {
765 *mode_b = ATSCMH_SCCC_CODE_HLF;
768 *mode_b = ATSCMH_SCCC_CODE_QTR;
771 *mode_b = ATSCMH_SCCC_CODE_RES;
775 switch ((val >> 2) & 0x03) {
777 *mode_c = ATSCMH_SCCC_CODE_HLF;
780 *mode_c = ATSCMH_SCCC_CODE_QTR;
783 *mode_c = ATSCMH_SCCC_CODE_RES;
787 switch (val & 0x03) {
789 *mode_d = ATSCMH_SCCC_CODE_HLF;
792 *mode_d = ATSCMH_SCCC_CODE_QTR;
795 *mode_d = ATSCMH_SCCC_CODE_RES;
802 /* ------------------------------------------------------------------------ */
805 static int lg216x_read_fic_err_count(struct lg216x_state *state, u8 *err)
812 switch (state->cfg->lg_chip) {
814 ret = lg216x_read_reg(state, 0x0012, &fic_err);
817 ret = lg216x_read_reg(state, 0x001e, &fic_err);
828 static int lg2160_read_crc_err_count(struct lg216x_state *state, u16 *err)
830 u8 crc_err1, crc_err2;
835 ret = lg216x_read_reg(state, 0x0411, &crc_err1);
839 ret = lg216x_read_reg(state, 0x0412, &crc_err2);
843 *err = (u16)(((crc_err2 & 0x0f) << 8) | crc_err1);
848 static int lg2161_read_crc_err_count(struct lg216x_state *state, u16 *err)
855 ret = lg216x_read_reg(state, 0x0612, &crc_err);
864 static int lg216x_read_crc_err_count(struct lg216x_state *state, u16 *err)
867 switch (state->cfg->lg_chip) {
869 ret = lg2160_read_crc_err_count(state, err);
872 ret = lg2161_read_crc_err_count(state, err);
881 static int lg2160_read_rs_err_count(struct lg216x_state *state, u16 *err)
888 ret = lg216x_read_reg(state, 0x0413, &rs_err1);
892 ret = lg216x_read_reg(state, 0x0414, &rs_err2);
896 *err = (u16)(((rs_err2 & 0x0f) << 8) | rs_err1);
901 static int lg2161_read_rs_err_count(struct lg216x_state *state, u16 *err)
908 ret = lg216x_read_reg(state, 0x0613, &rs_err1);
912 ret = lg216x_read_reg(state, 0x0614, &rs_err2);
916 *err = (u16)((rs_err1 << 8) | rs_err2);
921 static int lg216x_read_rs_err_count(struct lg216x_state *state, u16 *err)
924 switch (state->cfg->lg_chip) {
926 ret = lg2160_read_rs_err_count(state, err);
929 ret = lg2161_read_rs_err_count(state, err);
939 /* ------------------------------------------------------------------------ */
941 static int lg216x_get_frontend(struct dvb_frontend *fe,
942 struct dtv_frontend_properties *c)
944 struct lg216x_state *state = fe->demodulator_priv;
949 c->modulation = VSB_8;
950 c->frequency = state->current_frequency;
951 c->delivery_system = SYS_ATSCMH;
953 ret = lg216x_get_fic_version(state,
957 if (state->fic_ver != c->atscmh_fic_ver) {
958 state->fic_ver = c->atscmh_fic_ver;
961 ret = lg2160_get_parade_id(state,
962 &c->atscmh_parade_id);
966 c->atscmh_parade_id = state->parade_id;
968 ret = lg216x_get_nog(state,
972 ret = lg216x_get_tnog(state,
976 ret = lg216x_get_sgn(state,
980 ret = lg216x_get_prc(state,
985 ret = lg216x_get_rs_frame_mode(state,
986 (enum atscmh_rs_frame_mode *)
987 &c->atscmh_rs_frame_mode);
990 ret = lg216x_get_rs_frame_ensemble(state,
991 (enum atscmh_rs_frame_ensemble *)
992 &c->atscmh_rs_frame_ensemble);
995 ret = lg216x_get_rs_code_mode(state,
996 (enum atscmh_rs_code_mode *)
997 &c->atscmh_rs_code_mode_pri,
998 (enum atscmh_rs_code_mode *)
999 &c->atscmh_rs_code_mode_sec);
1002 ret = lg216x_get_sccc_block_mode(state,
1003 (enum atscmh_sccc_block_mode *)
1004 &c->atscmh_sccc_block_mode);
1007 ret = lg216x_get_sccc_code_mode(state,
1008 (enum atscmh_sccc_code_mode *)
1009 &c->atscmh_sccc_code_mode_a,
1010 (enum atscmh_sccc_code_mode *)
1011 &c->atscmh_sccc_code_mode_b,
1012 (enum atscmh_sccc_code_mode *)
1013 &c->atscmh_sccc_code_mode_c,
1014 (enum atscmh_sccc_code_mode *)
1015 &c->atscmh_sccc_code_mode_d);
1020 ret = lg216x_read_fic_err_count(state,
1021 (u8 *)&c->atscmh_fic_err);
1024 ret = lg216x_read_crc_err_count(state,
1025 &c->atscmh_crc_err);
1028 ret = lg216x_read_rs_err_count(state,
1033 switch (state->cfg->lg_chip) {
1035 if (((c->atscmh_rs_err >= 240) &&
1036 (c->atscmh_crc_err >= 240)) &&
1037 ((jiffies_to_msecs(jiffies) - state->last_reset) > 6000))
1038 ret = lg216x_soft_reset(state);
1041 /* no fix needed here (as far as we know) */
1051 static int lg216x_get_property(struct dvb_frontend *fe,
1052 struct dtv_property *tvp)
1054 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1056 return (DTV_ATSCMH_FIC_VER == tvp->cmd) ?
1057 lg216x_get_frontend(fe, c) : 0;
1061 static int lg2160_set_frontend(struct dvb_frontend *fe)
1063 struct lg216x_state *state = fe->demodulator_priv;
1064 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1067 lg_dbg("(%d)\n", fe->dtv_property_cache.frequency);
1069 if (fe->ops.tuner_ops.set_params) {
1070 ret = fe->ops.tuner_ops.set_params(fe);
1071 if (fe->ops.i2c_gate_ctrl)
1072 fe->ops.i2c_gate_ctrl(fe, 0);
1075 state->current_frequency = fe->dtv_property_cache.frequency;
1078 ret = lg2160_agc_fix(state, 0, 0);
1081 ret = lg2160_agc_polarity(state, 0, 0);
1084 ret = lg2160_tuner_pwr_save_polarity(state, 1);
1087 ret = lg216x_set_if(state);
1090 ret = lg2160_spectrum_polarity(state, state->cfg->spectral_inversion);
1094 /* be tuned before this point */
1095 ret = lg216x_soft_reset(state);
1099 ret = lg2160_tuner_pwr_save(state, 0);
1103 switch (state->cfg->lg_chip) {
1105 ret = lg2160_set_spi_clock(state);
1110 ret = lg2161_set_output_interface(state);
1116 ret = lg216x_set_parade(state, fe->dtv_property_cache.atscmh_parade_id);
1120 ret = lg216x_set_ensemble(state,
1121 fe->dtv_property_cache.atscmh_rs_frame_ensemble);
1125 ret = lg216x_initialize(state);
1129 ret = lg216x_enable_fic(state, 1);
1132 lg216x_get_frontend(fe, c);
1137 /* ------------------------------------------------------------------------ */
1139 static int lg2160_read_lock_status(struct lg216x_state *state,
1140 int *acq_lock, int *sync_lock)
1148 ret = lg216x_read_reg(state, 0x011b, &val);
1152 *sync_lock = (val & 0x20) ? 0 : 1;
1153 *acq_lock = (val & 0x40) ? 0 : 1;
1158 #ifdef USE_LG2161_LOCK_BITS
1159 static int lg2161_read_lock_status(struct lg216x_state *state,
1160 int *acq_lock, int *sync_lock)
1168 ret = lg216x_read_reg(state, 0x0304, &val);
1172 *sync_lock = (val & 0x80) ? 0 : 1;
1174 ret = lg216x_read_reg(state, 0x011b, &val);
1178 *acq_lock = (val & 0x40) ? 0 : 1;
1184 static int lg216x_read_lock_status(struct lg216x_state *state,
1185 int *acq_lock, int *sync_lock)
1187 #ifdef USE_LG2161_LOCK_BITS
1189 switch (state->cfg->lg_chip) {
1191 ret = lg2160_read_lock_status(state, acq_lock, sync_lock);
1194 ret = lg2161_read_lock_status(state, acq_lock, sync_lock);
1202 return lg2160_read_lock_status(state, acq_lock, sync_lock);
1206 static int lg216x_read_status(struct dvb_frontend *fe, enum fe_status *status)
1208 struct lg216x_state *state = fe->demodulator_priv;
1209 int ret, acq_lock, sync_lock;
1213 ret = lg216x_read_lock_status(state, &acq_lock, &sync_lock);
1218 acq_lock ? "SIGNALEXIST " : "",
1219 sync_lock ? "SYNCLOCK" : "");
1222 *status |= FE_HAS_SIGNAL;
1224 *status |= FE_HAS_SYNC;
1227 *status |= FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_LOCK;
1233 /* ------------------------------------------------------------------------ */
1235 static int lg2160_read_snr(struct dvb_frontend *fe, u16 *snr)
1237 struct lg216x_state *state = fe->demodulator_priv;
1243 ret = lg216x_read_reg(state, 0x0202, &snr1);
1247 ret = lg216x_read_reg(state, 0x0203, &snr2);
1251 if ((snr1 == 0xba) || (snr2 == 0xdf))
1255 *snr = ((snr1 >> 4) * 100) + ((snr1 & 0x0f) * 10) + (snr2 >> 4);
1257 *snr = (snr2 | (snr1 << 8));
1263 static int lg2161_read_snr(struct dvb_frontend *fe, u16 *snr)
1265 struct lg216x_state *state = fe->demodulator_priv;
1271 ret = lg216x_read_reg(state, 0x0302, &snr1);
1275 ret = lg216x_read_reg(state, 0x0303, &snr2);
1279 if ((snr1 == 0xba) || (snr2 == 0xfd))
1283 *snr = ((snr1 >> 4) * 100) + ((snr1 & 0x0f) * 10) + (snr2 & 0x0f);
1288 static int lg216x_read_signal_strength(struct dvb_frontend *fe,
1292 /* borrowed from lgdt330x.c
1294 * Calculate strength from SNR up to 35dB
1295 * Even though the SNR can go higher than 35dB,
1296 * there is some comfort factor in having a range of
1297 * strong signals that can show at 100%
1299 struct lg216x_state *state = fe->demodulator_priv;
1305 ret = fe->ops.read_snr(fe, &snr);
1308 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
1309 /* scale the range 0 - 35*2^24 into 0 - 65535 */
1310 if (state->snr >= 8960 * 0x10000)
1313 *strength = state->snr / 8960;
1321 /* ------------------------------------------------------------------------ */
1323 static int lg216x_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1326 struct lg216x_state *state = fe->demodulator_priv;
1329 ret = lg216x_read_rs_err_count(state,
1330 &fe->dtv_property_cache.atscmh_rs_err);
1334 *ucblocks = fe->dtv_property_cache.atscmh_rs_err;
1342 static int lg216x_get_tune_settings(struct dvb_frontend *fe,
1343 struct dvb_frontend_tune_settings
1346 fe_tune_settings->min_delay_ms = 500;
1351 static void lg216x_release(struct dvb_frontend *fe)
1353 struct lg216x_state *state = fe->demodulator_priv;
1358 static const struct dvb_frontend_ops lg2160_ops = {
1359 .delsys = { SYS_ATSCMH },
1361 .name = "LG Electronics LG2160 ATSC/MH Frontend",
1362 .frequency_min = 54000000,
1363 .frequency_max = 858000000,
1364 .frequency_stepsize = 62500,
1366 .i2c_gate_ctrl = lg216x_i2c_gate_ctrl,
1368 .init = lg216x_init,
1369 .sleep = lg216x_sleep,
1371 .get_property = lg216x_get_property,
1373 .set_frontend = lg2160_set_frontend,
1374 .get_frontend = lg216x_get_frontend,
1375 .get_tune_settings = lg216x_get_tune_settings,
1376 .read_status = lg216x_read_status,
1378 .read_ber = lg216x_read_ber,
1380 .read_signal_strength = lg216x_read_signal_strength,
1381 .read_snr = lg2160_read_snr,
1382 .read_ucblocks = lg216x_read_ucblocks,
1383 .release = lg216x_release,
1386 static const struct dvb_frontend_ops lg2161_ops = {
1387 .delsys = { SYS_ATSCMH },
1389 .name = "LG Electronics LG2161 ATSC/MH Frontend",
1390 .frequency_min = 54000000,
1391 .frequency_max = 858000000,
1392 .frequency_stepsize = 62500,
1394 .i2c_gate_ctrl = lg216x_i2c_gate_ctrl,
1396 .init = lg216x_init,
1397 .sleep = lg216x_sleep,
1399 .get_property = lg216x_get_property,
1401 .set_frontend = lg2160_set_frontend,
1402 .get_frontend = lg216x_get_frontend,
1403 .get_tune_settings = lg216x_get_tune_settings,
1404 .read_status = lg216x_read_status,
1406 .read_ber = lg216x_read_ber,
1408 .read_signal_strength = lg216x_read_signal_strength,
1409 .read_snr = lg2161_read_snr,
1410 .read_ucblocks = lg216x_read_ucblocks,
1411 .release = lg216x_release,
1414 struct dvb_frontend *lg2160_attach(const struct lg2160_config *config,
1415 struct i2c_adapter *i2c_adap)
1417 struct lg216x_state *state = NULL;
1419 lg_dbg("(%d-%04x)\n",
1420 i2c_adap ? i2c_adapter_id(i2c_adap) : 0,
1421 config ? config->i2c_addr : 0);
1423 state = kzalloc(sizeof(struct lg216x_state), GFP_KERNEL);
1427 state->cfg = config;
1428 state->i2c_adap = i2c_adap;
1429 state->fic_ver = 0xff;
1430 state->parade_id = 0xff;
1432 switch (config->lg_chip) {
1434 lg_warn("invalid chip requested, defaulting to LG2160");
1437 memcpy(&state->frontend.ops, &lg2160_ops,
1438 sizeof(struct dvb_frontend_ops));
1441 memcpy(&state->frontend.ops, &lg2161_ops,
1442 sizeof(struct dvb_frontend_ops));
1446 state->frontend.demodulator_priv = state;
1447 state->current_frequency = -1;
1448 /* parade 1 by default */
1449 state->frontend.dtv_property_cache.atscmh_parade_id = 1;
1451 return &state->frontend;
1453 EXPORT_SYMBOL(lg2160_attach);
1455 MODULE_DESCRIPTION("LG Electronics LG216x ATSC/MH Demodulator Driver");
1457 MODULE_LICENSE("GPL");
1458 MODULE_VERSION("0.3");