1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Host communication command constants for ChromeOS EC
5 * Copyright (C) 2012 Google, Inc
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
11 /* Host communication command constants for Chrome EC */
13 #ifndef __CROS_EC_COMMANDS_H
14 #define __CROS_EC_COMMANDS_H
19 #define BUILD_ASSERT(_cond)
22 * Current version of this protocol
24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
25 * determined in other ways. Remove this once the kernel code no longer
28 #define EC_PROTO_VERSION 0x00000002
30 /* Command version mask */
31 #define EC_VER_MASK(version) BIT(version)
33 /* I/O addresses for ACPI commands */
34 #define EC_LPC_ADDR_ACPI_DATA 0x62
35 #define EC_LPC_ADDR_ACPI_CMD 0x66
37 /* I/O addresses for host command */
38 #define EC_LPC_ADDR_HOST_DATA 0x200
39 #define EC_LPC_ADDR_HOST_CMD 0x204
41 /* I/O addresses for host command args and params */
42 /* Protocol version 2 */
43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
45 * EC_PROTO2_MAX_PARAM_SIZE
47 /* Protocol version 3 */
48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
53 * and they tell the kernel that so we have to think of it as two parts.
55 #define EC_HOST_CMD_REGION0 0x800
56 #define EC_HOST_CMD_REGION1 0x880
57 #define EC_HOST_CMD_REGION_SIZE 0x80
59 /* EC command register bit functions */
60 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */
61 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
62 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
63 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */
64 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */
65 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */
66 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */
68 #define EC_LPC_ADDR_MEMMAP 0x900
69 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
70 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
72 /* The offset address of each type of data in mapped memory. */
73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
74 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
75 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
76 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
77 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
78 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
79 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
80 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
81 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
82 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
83 /* Unused 0x28 - 0x2f */
84 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
85 /* Unused 0x31 - 0x33 */
86 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */
87 /* Battery values are all 32 bits, unless otherwise noted. */
88 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
89 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
90 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
91 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */
92 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */
93 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */
95 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
96 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
97 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
98 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
99 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
100 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
101 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
102 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
103 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
104 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
105 /* Unused 0x84 - 0x8f */
106 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
108 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
109 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
110 /* 0x94 - 0x99: 1st Accelerometer */
111 /* 0x9a - 0x9f: 2nd Accelerometer */
112 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
113 /* Unused 0xa6 - 0xdf */
116 * ACPI is unable to access memory mapped data at or above this offset due to
117 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
118 * which might be needed by ACPI.
120 #define EC_MEMMAP_NO_ACPI 0xe0
122 /* Define the format of the accelerometer mapped memory status byte. */
123 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
124 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4)
125 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
127 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
128 #define EC_TEMP_SENSOR_ENTRIES 16
130 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
132 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
134 #define EC_TEMP_SENSOR_B_ENTRIES 8
136 /* Special values for mapped temperature sensors */
137 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff
138 #define EC_TEMP_SENSOR_ERROR 0xfe
139 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd
140 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
142 * The offset of temperature value stored in mapped memory. This allows
143 * reporting a temperature range of 200K to 454K = -73C to 181C.
145 #define EC_TEMP_SENSOR_OFFSET 200
148 * Number of ALS readings at EC_MEMMAP_ALS
150 #define EC_ALS_ENTRIES 2
153 * The default value a temperature sensor will return when it is present but
154 * has not been read this boot. This is a reasonable number to avoid
155 * triggering alarms on the host.
157 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
159 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
160 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
161 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
163 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
164 #define EC_BATT_FLAG_AC_PRESENT 0x01
165 #define EC_BATT_FLAG_BATT_PRESENT 0x02
166 #define EC_BATT_FLAG_DISCHARGING 0x04
167 #define EC_BATT_FLAG_CHARGING 0x08
168 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
169 /* Set if some of the static/dynamic data is invalid (or outdated). */
170 #define EC_BATT_FLAG_INVALID_DATA 0x20
172 /* Switch flags at EC_MEMMAP_SWITCHES */
173 #define EC_SWITCH_LID_OPEN 0x01
174 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
175 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
176 /* Was recovery requested via keyboard; now unused. */
177 #define EC_SWITCH_IGNORE1 0x08
178 /* Recovery requested via dedicated signal (from servo board) */
179 #define EC_SWITCH_DEDICATED_RECOVERY 0x10
180 /* Was fake developer mode switch; now unused. Remove in next refactor. */
181 #define EC_SWITCH_IGNORE0 0x20
183 /* Host command interface flags */
184 /* Host command interface supports LPC args (LPC interface only) */
185 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
186 /* Host command interface supports version 3 protocol */
187 #define EC_HOST_CMD_FLAG_VERSION_3 0x02
189 /* Wireless switch flags */
190 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
191 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
192 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
193 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
194 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
196 /*****************************************************************************/
200 * These are valid ONLY on the ACPI command/data port.
204 * ACPI Read Embedded Controller
206 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
208 * Use the following sequence:
210 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
211 * - Wait for EC_LPC_CMDR_PENDING bit to clear
212 * - Write address to EC_LPC_ADDR_ACPI_DATA
213 * - Wait for EC_LPC_CMDR_DATA bit to set
214 * - Read value from EC_LPC_ADDR_ACPI_DATA
216 #define EC_CMD_ACPI_READ 0x0080
219 * ACPI Write Embedded Controller
221 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
223 * Use the following sequence:
225 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
226 * - Wait for EC_LPC_CMDR_PENDING bit to clear
227 * - Write address to EC_LPC_ADDR_ACPI_DATA
228 * - Wait for EC_LPC_CMDR_PENDING bit to clear
229 * - Write value to EC_LPC_ADDR_ACPI_DATA
231 #define EC_CMD_ACPI_WRITE 0x0081
234 * ACPI Burst Enable Embedded Controller
236 * This enables burst mode on the EC to allow the host to issue several
237 * commands back-to-back. While in this mode, writes to mapped multi-byte
238 * data are locked out to ensure data consistency.
240 #define EC_CMD_ACPI_BURST_ENABLE 0x0082
243 * ACPI Burst Disable Embedded Controller
245 * This disables burst mode on the EC and stops preventing EC writes to mapped
248 #define EC_CMD_ACPI_BURST_DISABLE 0x0083
251 * ACPI Query Embedded Controller
253 * This clears the lowest-order bit in the currently pending host events, and
254 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
255 * event 0x80000000 = 32), or 0 if no event was pending.
257 #define EC_CMD_ACPI_QUERY_EVENT 0x0084
259 /* Valid addresses in ACPI memory space, for read/write commands */
261 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
262 #define EC_ACPI_MEM_VERSION 0x00
264 * Test location; writing value here updates test compliment byte to (0xff -
267 #define EC_ACPI_MEM_TEST 0x01
268 /* Test compliment; writes here are ignored. */
269 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
271 /* Keyboard backlight brightness percent (0 - 100) */
272 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
273 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
274 #define EC_ACPI_MEM_FAN_DUTY 0x04
277 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
278 * independent thresholds attached to them. The current value of the ID
279 * register determines which sensor is affected by the THRESHOLD and COMMIT
280 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
281 * as the memory-mapped sensors. The COMMIT register applies those settings.
283 * The spec does not mandate any way to read back the threshold settings
284 * themselves, but when a threshold is crossed the AP needs a way to determine
285 * which sensor(s) are responsible. Each reading of the ID register clears and
286 * returns one sensor ID that has crossed one of its threshold (in either
287 * direction) since the last read. A value of 0xFF means "no new thresholds
288 * have tripped". Setting or enabling the thresholds for a sensor will clear
289 * the unread event count for that sensor.
291 #define EC_ACPI_MEM_TEMP_ID 0x05
292 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
293 #define EC_ACPI_MEM_TEMP_COMMIT 0x07
295 * Here are the bits for the COMMIT register:
296 * bit 0 selects the threshold index for the chosen sensor (0/1)
297 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
298 * Each write to the commit register affects one threshold.
300 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
301 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
305 * Set the thresholds for sensor 2 to 50 C and 60 C:
306 * write 2 to [0x05] -- select temp sensor 2
307 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
308 * write 0x2 to [0x07] -- enable threshold 0 with this value
309 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
310 * write 0x3 to [0x07] -- enable threshold 1 with this value
312 * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
313 * write 2 to [0x05] -- select temp sensor 2
314 * write 0x1 to [0x07] -- disable threshold 1
317 /* DPTF battery charging current limit */
318 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08
320 /* Charging limit is specified in 64 mA steps */
321 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
322 /* Value to disable DPTF battery charging limit */
323 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
326 * Report device orientation
328 * 3:1 Device DPTF Profile Number (DDPN)
329 * 0 = Reserved for backward compatibility (indicates no valid
330 * profile number. Host should fall back to using TBMD).
331 * 1..7 = DPTF Profile number to indicate to host which table needs
333 * 0 Tablet Mode Device Indicator (TBMD)
335 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
336 #define EC_ACPI_MEM_TBMD_SHIFT 0
337 #define EC_ACPI_MEM_TBMD_MASK 0x1
338 #define EC_ACPI_MEM_DDPN_SHIFT 1
339 #define EC_ACPI_MEM_DDPN_MASK 0x7
342 * Report device features. Uses the same format as the host command, except:
344 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
345 * of features", which is of limited interest when the system is already
346 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
347 * these are supported, it defaults to 0.
348 * This allows detecting the presence of this field since older versions of
349 * the EC codebase would simply return 0xff to that unknown address. Check
350 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
353 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
354 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
355 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
356 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
357 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
358 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
359 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
360 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
362 #define EC_ACPI_MEM_BATTERY_INDEX 0x12
365 * USB Port Power. Each bit indicates whether the corresponding USB ports' power
366 * is enabled (1) or disabled (0).
367 * bit 0 USB port ID 0
369 * bit 7 USB port ID 7
371 #define EC_ACPI_MEM_USB_PORT_POWER 0x13
374 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
375 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
377 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20
378 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0
380 /* Current version of ACPI memory address space */
381 #define EC_ACPI_MEM_VERSION_CURRENT 2
385 * This header file is used in coreboot both in C and ACPI code. The ACPI code
386 * is pre-processed to handle constants but the ASL compiler is unable to
387 * handle actual C code so keep it separate.
392 * Attributes for EC request and response packets. Just defining __packed
393 * results in inefficient assembly code on ARM, if the structure is actually
394 * 32-bit aligned, as it should be for all buffers.
396 * Be very careful when adding these to existing structures. They will round
397 * up the structure size to the specified boundary.
399 * Also be very careful to make that if a structure is included in some other
400 * parent structure that the alignment will still be true given the packing of
401 * the parent structure. This is particularly important if the sub-structure
402 * will be passed as a pointer to another function, since that function will
403 * not know about the misaligment caused by the parent structure's packing.
405 * Also be very careful using __packed - particularly when nesting non-packed
406 * structures inside packed ones. In fact, DO NOT use __packed directly;
407 * always use one of these attributes.
409 * Once everything is annotated properly, the following search strings should
410 * not return ANY matches in this file other than right here:
412 * "__packed" - generates inefficient code; all sub-structs must also be packed
414 * "struct [^_]" - all structs should be annotated, except for structs that are
415 * members of other structs/unions (and their original declarations should be
420 * Packed structures make no assumption about alignment, so they do inefficient
423 #define __ec_align1 __packed
424 #define __ec_align2 __packed
425 #define __ec_align4 __packed
426 #define __ec_align_size1 __packed
427 #define __ec_align_offset1 __packed
428 #define __ec_align_offset2 __packed
429 #define __ec_todo_packed __packed
430 #define __ec_todo_unpacked
433 /* LPC command status byte masks */
434 /* EC has written a byte in the data register and host hasn't read it yet */
435 #define EC_LPC_STATUS_TO_HOST 0x01
436 /* Host has written a command/data byte and the EC hasn't read it yet */
437 #define EC_LPC_STATUS_FROM_HOST 0x02
438 /* EC is processing a command */
439 #define EC_LPC_STATUS_PROCESSING 0x04
440 /* Last write to EC was a command, not data */
441 #define EC_LPC_STATUS_LAST_CMD 0x08
442 /* EC is in burst mode */
443 #define EC_LPC_STATUS_BURST_MODE 0x10
444 /* SCI event is pending (requesting SCI query) */
445 #define EC_LPC_STATUS_SCI_PENDING 0x20
446 /* SMI event is pending (requesting SMI query) */
447 #define EC_LPC_STATUS_SMI_PENDING 0x40
449 #define EC_LPC_STATUS_RESERVED 0x80
452 * EC is busy. This covers both the EC processing a command, and the host has
453 * written a new command but the EC hasn't picked it up yet.
455 #define EC_LPC_STATUS_BUSY_MASK \
456 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
459 * Host command response codes (16-bit). Note that response codes should be
460 * stored in a uint16_t rather than directly in a value of this type.
464 EC_RES_INVALID_COMMAND = 1,
466 EC_RES_INVALID_PARAM = 3,
467 EC_RES_ACCESS_DENIED = 4,
468 EC_RES_INVALID_RESPONSE = 5,
469 EC_RES_INVALID_VERSION = 6,
470 EC_RES_INVALID_CHECKSUM = 7,
471 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */
472 EC_RES_UNAVAILABLE = 9, /* No response available */
473 EC_RES_TIMEOUT = 10, /* We got a timeout */
474 EC_RES_OVERFLOW = 11, /* Table / data overflow */
475 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
476 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
477 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */
478 EC_RES_BUS_ERROR = 15, /* Communications bus error */
479 EC_RES_BUSY = 16, /* Up but too busy. Should retry */
480 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */
481 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */
482 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */
483 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */
487 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
488 * EC command uses code 0 to mean "no event pending". We explicitly specify
489 * each value in the enum listing so they won't change if we delete/insert an
490 * item or rearrange the list (it needs to be stable across platforms, not
491 * just within a single compiled instance).
493 enum host_event_code {
494 EC_HOST_EVENT_LID_CLOSED = 1,
495 EC_HOST_EVENT_LID_OPEN = 2,
496 EC_HOST_EVENT_POWER_BUTTON = 3,
497 EC_HOST_EVENT_AC_CONNECTED = 4,
498 EC_HOST_EVENT_AC_DISCONNECTED = 5,
499 EC_HOST_EVENT_BATTERY_LOW = 6,
500 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
501 EC_HOST_EVENT_BATTERY = 8,
502 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
503 /* Event generated by a device attached to the EC */
504 EC_HOST_EVENT_DEVICE = 10,
505 EC_HOST_EVENT_THERMAL = 11,
506 EC_HOST_EVENT_USB_CHARGER = 12,
507 EC_HOST_EVENT_KEY_PRESSED = 13,
509 * EC has finished initializing the host interface. The host can check
510 * for this event following sending a EC_CMD_REBOOT_EC command to
511 * determine when the EC is ready to accept subsequent commands.
513 EC_HOST_EVENT_INTERFACE_READY = 14,
514 /* Keyboard recovery combo has been pressed */
515 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
517 /* Shutdown due to thermal overload */
518 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
519 /* Shutdown due to battery level too low */
520 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
522 /* Suggest that the AP throttle itself */
523 EC_HOST_EVENT_THROTTLE_START = 18,
524 /* Suggest that the AP resume normal speed */
525 EC_HOST_EVENT_THROTTLE_STOP = 19,
527 /* Hang detect logic detected a hang and host event timeout expired */
528 EC_HOST_EVENT_HANG_DETECT = 20,
529 /* Hang detect logic detected a hang and warm rebooted the AP */
530 EC_HOST_EVENT_HANG_REBOOT = 21,
532 /* PD MCU triggering host event */
533 EC_HOST_EVENT_PD_MCU = 22,
535 /* Battery Status flags have changed */
536 EC_HOST_EVENT_BATTERY_STATUS = 23,
538 /* EC encountered a panic, triggering a reset */
539 EC_HOST_EVENT_PANIC = 24,
541 /* Keyboard fastboot combo has been pressed */
542 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
544 /* EC RTC event occurred */
545 EC_HOST_EVENT_RTC = 26,
547 /* Emulate MKBP event */
548 EC_HOST_EVENT_MKBP = 27,
550 /* EC desires to change state of host-controlled USB mux */
551 EC_HOST_EVENT_USB_MUX = 28,
553 /* TABLET/LAPTOP mode or detachable base attach/detach event */
554 EC_HOST_EVENT_MODE_CHANGE = 29,
556 /* Keyboard recovery combo with hardware reinitialization */
557 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
560 EC_HOST_EVENT_WOV = 31,
563 * The high bit of the event mask is not used as a host event code. If
564 * it reads back as set, then the entire event mask should be
565 * considered invalid by the host. This can happen when reading the
566 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
567 * not initialized on the EC, or improperly configured on the host.
569 EC_HOST_EVENT_INVALID = 32
571 /* Host event mask */
572 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)
575 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS
576 * @flags: The host argument flags.
577 * @command_version: Command version.
578 * @data_size: The length of data.
579 * @checksum: Checksum; sum of command + flags + command_version + data_size +
580 * all params/response data bytes.
582 struct ec_lpc_host_args {
584 uint8_t command_version;
589 /* Flags for ec_lpc_host_args.flags */
591 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
594 * If EC gets a command and this flag is not set, this is an old-style command.
595 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
596 * unknown length. EC must respond with an old-style response (that is,
597 * without setting EC_HOST_ARGS_FLAG_TO_HOST).
599 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
601 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
603 * If EC responds to a command and this flag is not set, this is an old-style
604 * response. Command version is 0 and response data from EC is at
605 * EC_LPC_ADDR_OLD_PARAM with unknown length.
607 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02
609 /*****************************************************************************/
611 * Byte codes returned by EC over SPI interface.
613 * These can be used by the AP to debug the EC interface, and to determine
614 * when the EC is not in a state where it will ever get around to responding
617 * Example of sequence of bytes read from EC for a current good transfer:
618 * 1. - - AP asserts chip select (CS#)
619 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
620 * 3. - - EC starts handling CS# interrupt
621 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
622 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
623 * bytes looking for EC_SPI_FRAME_START
624 * 6. - - EC finishes processing and sets up response
625 * 7. EC_SPI_FRAME_START - AP reads frame byte
626 * 8. (response packet) - AP reads response packet
627 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
628 * 10 - - AP deasserts chip select
629 * 11 - - EC processes CS# interrupt and sets up DMA for
632 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
633 * the following byte values:
639 * Then the EC found an error in the request, or was not ready for the request
640 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
641 * because the EC is unable to tell when the AP is done sending its request.
645 * Framing byte which precedes a response packet from the EC. After sending a
646 * request, the AP will clock in bytes until it sees the framing byte, then
647 * clock in the response packet.
649 #define EC_SPI_FRAME_START 0xec
652 * Padding bytes which are clocked out after the end of a response packet.
654 #define EC_SPI_PAST_END 0xed
657 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
658 * that the AP will send a valid packet header (starting with
659 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
661 #define EC_SPI_RX_READY 0xf8
664 * EC has started receiving the request from the AP, but hasn't started
667 #define EC_SPI_RECEIVING 0xf9
669 /* EC has received the entire request from the AP and is processing it. */
670 #define EC_SPI_PROCESSING 0xfa
673 * EC received bad data from the AP, such as a packet header with an invalid
674 * length. EC will ignore all data until chip select deasserts.
676 #define EC_SPI_RX_BAD_DATA 0xfb
679 * EC received data from the AP before it was ready. That is, the AP asserted
680 * chip select and started clocking data before the EC was ready to receive it.
681 * EC will ignore all data until chip select deasserts.
683 #define EC_SPI_NOT_READY 0xfc
686 * EC was ready to receive a request from the AP. EC has treated the byte sent
687 * by the AP as part of a request packet, or (for old-style ECs) is processing
688 * a fully received packet but is not ready to respond yet.
690 #define EC_SPI_OLD_READY 0xfd
692 /*****************************************************************************/
695 * Protocol version 2 for I2C and SPI send a request this way:
697 * 0 EC_CMD_VERSION0 + (command version)
699 * 2 Length of params = N
700 * 3..N+2 Params, if any
701 * N+3 8-bit checksum of bytes 0..N+2
703 * The corresponding response is:
705 * 0 Result code (EC_RES_*)
706 * 1 Length of params = M
707 * 2..M+1 Params, if any
708 * M+2 8-bit checksum of bytes 0..M+1
710 #define EC_PROTO2_REQUEST_HEADER_BYTES 3
711 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
712 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
713 EC_PROTO2_REQUEST_TRAILER_BYTES)
715 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
716 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
717 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
718 EC_PROTO2_RESPONSE_TRAILER_BYTES)
720 /* Parameter length was limited by the LPC interface */
721 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
723 /* Maximum request and response packet sizes for protocol version 2 */
724 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
725 EC_PROTO2_MAX_PARAM_SIZE)
726 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
727 EC_PROTO2_MAX_PARAM_SIZE)
729 /*****************************************************************************/
732 * Value written to legacy command port / prefix byte to indicate protocol
733 * 3+ structs are being used. Usage is bus-dependent.
735 #define EC_COMMAND_PROTOCOL_3 0xda
737 #define EC_HOST_REQUEST_VERSION 3
740 * struct ec_host_request - Version 3 request from host.
741 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it
742 * receives a header with a version it doesn't know how to
744 * @checksum: Checksum of request and data; sum of all bytes including checksum
746 * @command: Command to send (EC_CMD_...)
747 * @command_version: Command version.
748 * @reserved: Unused byte in current protocol version; set to 0.
749 * @data_len: Length of data which follows this header.
751 struct ec_host_request {
752 uint8_t struct_version;
755 uint8_t command_version;
760 #define EC_HOST_RESPONSE_VERSION 3
763 * struct ec_host_response - Version 3 response from EC.
764 * @struct_version: Struct version (=3).
765 * @checksum: Checksum of response and data; sum of all bytes including
766 * checksum should total to 0.
767 * @result: EC's response to the command (separate from communication failure)
768 * @data_len: Length of data which follows this header.
769 * @reserved: Unused bytes in current protocol version; set to 0.
771 struct ec_host_response {
772 uint8_t struct_version;
779 /*****************************************************************************/
782 * Host command protocol V4.
784 * Packets always start with a request or response header. They are followed
785 * by data_len bytes of data. If the data_crc_present flag is set, the data
786 * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1
789 * Host algorithm when sending a request q:
791 * 101) tries_left=(some value, e.g. 3);
794 * 104) Calculate q.header_crc.
795 * 105) Send request q to EC.
796 * 106) Wait for response r. Go to 201 if received or 301 if timeout.
798 * 201) If r.struct_version != 4, go to 301.
799 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301.
800 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301.
801 * 204) If r.seq_num != q.seq_num, go to 301.
802 * 205) If r.seq_dup == q.seq_dup, return success.
803 * 207) If r.seq_dup == 1, go to 301.
806 * 301) If --tries_left <= 0, return error.
807 * 302) If q.seq_dup == 1, go to 105.
811 * EC algorithm when receiving a request q.
812 * EC has response buffer r, error buffer e.
814 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION
816 * 102) If q.header_crc mismatches calculated CRC, set e.result =
817 * EC_RES_INVALID_HEADER_CRC and go to 301
818 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC
819 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC
821 * 104) If q.seq_dup == 0, go to 201.
822 * 105) If q.seq_num != r.seq_num, go to 201.
823 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203.
825 * 201) Process request q into response r.
826 * 202) r.seq_num = q.seq_num
827 * 203) r.seq_dup = q.seq_dup
828 * 204) Calculate r.header_crc
829 * 205) If r.data_len > 0 and data is no longer available, set e.result =
830 * EC_RES_DUP_UNAVAILABLE and go to 301.
831 * 206) Send response r.
833 * 301) e.seq_num = q.seq_num
834 * 302) e.seq_dup = q.seq_dup
835 * 303) Calculate e.header_crc.
836 * 304) Send error response e.
839 /* Version 4 request from host */
840 struct ec_host_request4 {
842 * bits 0-3: struct_version: Structure version (=4)
843 * bit 4: is_response: Is response (=0)
844 * bits 5-6: seq_num: Sequence number
845 * bit 7: seq_dup: Sequence duplicate flag
850 * bits 0-4: command_version: Command version
851 * bits 5-6: Reserved (set 0, ignore on read)
852 * bit 7: data_crc_present: Is data CRC present after data
856 /* Command code (EC_CMD_*) */
859 /* Length of data which follows this header (not including data CRC) */
862 /* Reserved (set 0, ignore on read) */
865 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
869 /* Version 4 response from EC */
870 struct ec_host_response4 {
872 * bits 0-3: struct_version: Structure version (=4)
873 * bit 4: is_response: Is response (=1)
874 * bits 5-6: seq_num: Sequence number
875 * bit 7: seq_dup: Sequence duplicate flag
880 * bits 0-6: Reserved (set 0, ignore on read)
881 * bit 7: data_crc_present: Is data CRC present after data
885 /* Result code (EC_RES_*) */
888 /* Length of data which follows this header (not including data CRC) */
891 /* Reserved (set 0, ignore on read) */
894 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
898 /* Fields in fields0 byte */
899 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f
900 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10
901 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5
902 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60
903 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80
905 /* Fields in fields1 byte */
906 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */
907 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80
909 /*****************************************************************************/
913 * Each command is an 16-bit command value. Commands which take params or
914 * return response data specify structures for that data. If no structure is
915 * specified, the command does not input or output data, respectively.
916 * Parameter/response length is implicit in the structs. Some underlying
917 * communication protocols (I2C, SPI) may add length or checksum headers, but
918 * those are implementation-dependent and not defined here.
920 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
921 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
924 /*****************************************************************************/
925 /* General / test commands */
928 * Get protocol version, used to deal with non-backward compatible protocol
931 #define EC_CMD_PROTO_VERSION 0x0000
934 * struct ec_response_proto_version - Response to the proto version command.
935 * @version: The protocol version.
937 struct ec_response_proto_version {
942 * Hello. This is a simple command to test the EC is responsive to
945 #define EC_CMD_HELLO 0x0001
948 * struct ec_params_hello - Parameters to the hello command.
949 * @in_data: Pass anything here.
951 struct ec_params_hello {
956 * struct ec_response_hello - Response to the hello command.
957 * @out_data: Output will be in_data + 0x01020304.
959 struct ec_response_hello {
963 /* Get version number */
964 #define EC_CMD_GET_VERSION 0x0002
966 enum ec_current_image {
967 EC_IMAGE_UNKNOWN = 0,
973 * struct ec_response_get_version - Response to the get version command.
974 * @version_string_ro: Null-terminated RO firmware version string.
975 * @version_string_rw: Null-terminated RW firmware version string.
976 * @reserved: Unused bytes; was previously RW-B firmware version string.
977 * @current_image: One of ec_current_image.
979 struct ec_response_get_version {
980 char version_string_ro[32];
981 char version_string_rw[32];
983 uint32_t current_image;
987 #define EC_CMD_READ_TEST 0x0003
990 * struct ec_params_read_test - Parameters for the read test command.
991 * @offset: Starting value for read buffer.
992 * @size: Size to read in bytes.
994 struct ec_params_read_test {
1000 * struct ec_response_read_test - Response to the read test command.
1001 * @data: Data returned by the read test command.
1003 struct ec_response_read_test {
1008 * Get build information
1010 * Response is null-terminated string.
1012 #define EC_CMD_GET_BUILD_INFO 0x0004
1015 #define EC_CMD_GET_CHIP_INFO 0x0005
1018 * struct ec_response_get_chip_info - Response to the get chip info command.
1019 * @vendor: Null-terminated string for chip vendor.
1020 * @name: Null-terminated string for chip name.
1021 * @revision: Null-terminated string for chip mask version.
1023 struct ec_response_get_chip_info {
1029 /* Get board HW version */
1030 #define EC_CMD_GET_BOARD_VERSION 0x0006
1033 * struct ec_response_board_version - Response to the board version command.
1034 * @board_version: A monotonously incrementing number.
1036 struct ec_response_board_version {
1037 uint16_t board_version;
1041 * Read memory-mapped data.
1043 * This is an alternate interface to memory-mapped data for bus protocols
1044 * which don't support direct-mapped memory - I2C, SPI, etc.
1046 * Response is params.size bytes of data.
1048 #define EC_CMD_READ_MEMMAP 0x0007
1051 * struct ec_params_read_memmap - Parameters for the read memory map command.
1052 * @offset: Offset in memmap (EC_MEMMAP_*).
1053 * @size: Size to read in bytes.
1055 struct ec_params_read_memmap {
1060 /* Read versions supported for a command */
1061 #define EC_CMD_GET_CMD_VERSIONS 0x0008
1064 * struct ec_params_get_cmd_versions - Parameters for the get command versions.
1065 * @cmd: Command to check.
1067 struct ec_params_get_cmd_versions {
1072 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command
1074 * @cmd: Command to check.
1076 struct ec_params_get_cmd_versions_v1 {
1081 * struct ec_response_get_cmd_version - Response to the get command versions.
1082 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with
1083 * a desired version.
1085 struct ec_response_get_cmd_versions {
1086 uint32_t version_mask;
1090 * Check EC communications status (busy). This is needed on i2c/spi but not
1091 * on lpc since it has its own out-of-band busy indicator.
1093 * lpc must read the status from the command register. Attempting this on
1094 * lpc will overwrite the args/parameter space and corrupt its data.
1096 #define EC_CMD_GET_COMMS_STATUS 0x0009
1098 /* Avoid using ec_status which is for return values */
1099 enum ec_comms_status {
1100 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */
1104 * struct ec_response_get_comms_status - Response to the get comms status
1106 * @flags: Mask of enum ec_comms_status.
1108 struct ec_response_get_comms_status {
1109 uint32_t flags; /* Mask of enum ec_comms_status */
1112 /* Fake a variety of responses, purely for testing purposes. */
1113 #define EC_CMD_TEST_PROTOCOL 0x000A
1115 /* Tell the EC what to send back to us. */
1116 struct ec_params_test_protocol {
1122 /* Here it comes... */
1123 struct ec_response_test_protocol {
1127 /* Get protocol information */
1128 #define EC_CMD_GET_PROTOCOL_INFO 0x000B
1130 /* Flags for ec_response_get_protocol_info.flags */
1131 /* EC_RES_IN_PROGRESS may be returned if a command is slow */
1132 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
1135 * struct ec_response_get_protocol_info - Response to the get protocol info.
1136 * @protocol_versions: Bitmask of protocol versions supported (1 << n means
1138 * @max_request_packet_size: Maximum request packet size in bytes.
1139 * @max_response_packet_size: Maximum response packet size in bytes.
1140 * @flags: see EC_PROTOCOL_INFO_*
1142 struct ec_response_get_protocol_info {
1143 /* Fields which exist if at least protocol version 3 supported */
1144 uint32_t protocol_versions;
1145 uint16_t max_request_packet_size;
1146 uint16_t max_response_packet_size;
1151 /*****************************************************************************/
1152 /* Get/Set miscellaneous values */
1154 /* The upper byte of .flags tells what to do (nothing means "get") */
1155 #define EC_GSV_SET 0x80000000
1158 * The lower three bytes of .flags identifies the parameter, if that has
1159 * meaning for an individual command.
1161 #define EC_GSV_PARAM_MASK 0x00ffffff
1163 struct ec_params_get_set_value {
1168 struct ec_response_get_set_value {
1173 /* More than one command can use these structs to get/set parameters. */
1174 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1176 /*****************************************************************************/
1177 /* List the features supported by the firmware */
1178 #define EC_CMD_GET_FEATURES 0x000D
1180 /* Supported features */
1181 enum ec_feature_code {
1183 * This image contains a limited set of features. Another image
1184 * in RW partition may support more features.
1186 EC_FEATURE_LIMITED = 0,
1188 * Commands for probing/reading/writing/erasing the flash in the
1191 EC_FEATURE_FLASH = 1,
1193 * Can control the fan speed directly.
1195 EC_FEATURE_PWM_FAN = 2,
1197 * Can control the intensity of the keyboard backlight.
1199 EC_FEATURE_PWM_KEYB = 3,
1201 * Support Google lightbar, introduced on Pixel.
1203 EC_FEATURE_LIGHTBAR = 4,
1204 /* Control of LEDs */
1206 /* Exposes an interface to control gyro and sensors.
1207 * The host goes through the EC to access these sensors.
1208 * In addition, the EC may provide composite sensors, like lid angle.
1210 EC_FEATURE_MOTION_SENSE = 6,
1211 /* The keyboard is controlled by the EC */
1212 EC_FEATURE_KEYB = 7,
1213 /* The AP can use part of the EC flash as persistent storage. */
1214 EC_FEATURE_PSTORE = 8,
1215 /* The EC monitors BIOS port 80h, and can return POST codes. */
1216 EC_FEATURE_PORT80 = 9,
1218 * Thermal management: include TMP specific commands.
1219 * Higher level than direct fan control.
1221 EC_FEATURE_THERMAL = 10,
1222 /* Can switch the screen backlight on/off */
1223 EC_FEATURE_BKLIGHT_SWITCH = 11,
1224 /* Can switch the wifi module on/off */
1225 EC_FEATURE_WIFI_SWITCH = 12,
1226 /* Monitor host events, through for example SMI or SCI */
1227 EC_FEATURE_HOST_EVENTS = 13,
1228 /* The EC exposes GPIO commands to control/monitor connected devices. */
1229 EC_FEATURE_GPIO = 14,
1230 /* The EC can send i2c messages to downstream devices. */
1231 EC_FEATURE_I2C = 15,
1232 /* Command to control charger are included */
1233 EC_FEATURE_CHARGER = 16,
1234 /* Simple battery support. */
1235 EC_FEATURE_BATTERY = 17,
1237 * Support Smart battery protocol
1238 * (Common Smart Battery System Interface Specification)
1240 EC_FEATURE_SMART_BATTERY = 18,
1241 /* EC can detect when the host hangs. */
1242 EC_FEATURE_HANG_DETECT = 19,
1243 /* Report power information, for pit only */
1244 EC_FEATURE_PMU = 20,
1245 /* Another Cros EC device is present downstream of this one */
1246 EC_FEATURE_SUB_MCU = 21,
1247 /* Support USB Power delivery (PD) commands */
1248 EC_FEATURE_USB_PD = 22,
1249 /* Control USB multiplexer, for audio through USB port for instance. */
1250 EC_FEATURE_USB_MUX = 23,
1251 /* Motion Sensor code has an internal software FIFO */
1252 EC_FEATURE_MOTION_SENSE_FIFO = 24,
1253 /* Support temporary secure vstore */
1254 EC_FEATURE_VSTORE = 25,
1255 /* EC decides on USB-C SS mux state, muxes configured by host */
1256 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1257 /* EC has RTC feature that can be controlled by host commands */
1258 EC_FEATURE_RTC = 27,
1259 /* The MCU exposes a Fingerprint sensor */
1260 EC_FEATURE_FINGERPRINT = 28,
1261 /* The MCU exposes a Touchpad */
1262 EC_FEATURE_TOUCHPAD = 29,
1263 /* The MCU has RWSIG task enabled */
1264 EC_FEATURE_RWSIG = 30,
1265 /* EC has device events support */
1266 EC_FEATURE_DEVICE_EVENT = 31,
1267 /* EC supports the unified wake masks for LPC/eSPI systems */
1268 EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1269 /* EC supports 64-bit host events */
1270 EC_FEATURE_HOST_EVENT64 = 33,
1271 /* EC runs code in RAM (not in place, a.k.a. XIP) */
1272 EC_FEATURE_EXEC_IN_RAM = 34,
1273 /* EC supports CEC commands */
1274 EC_FEATURE_CEC = 35,
1275 /* EC supports tight sensor timestamping. */
1276 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36,
1278 * EC supports tablet mode detection aligned to Chrome and allows
1279 * setting of threshold by host command using
1280 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
1282 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
1283 /* The MCU is a System Companion Processor (SCP). */
1284 EC_FEATURE_SCP = 39,
1285 /* The MCU is an Integrated Sensor Hub */
1286 EC_FEATURE_ISH = 40,
1287 /* New TCPMv2 TYPEC_ prefaced commands supported */
1288 EC_FEATURE_TYPEC_CMD = 41,
1290 * The EC will wait for direction from the AP to enter Type-C alternate
1293 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42,
1295 * The EC will wait for an acknowledge from the AP after setting the
1298 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
1301 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1302 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1304 struct ec_response_get_features {
1308 /*****************************************************************************/
1309 /* Get the board's SKU ID from EC */
1310 #define EC_CMD_GET_SKU_ID 0x000E
1312 /* Set SKU ID from AP */
1313 #define EC_CMD_SET_SKU_ID 0x000F
1315 struct ec_sku_id_info {
1319 /*****************************************************************************/
1320 /* Flash commands */
1322 /* Get flash info */
1323 #define EC_CMD_FLASH_INFO 0x0010
1324 #define EC_VER_FLASH_INFO 2
1327 * struct ec_response_flash_info - Response to the flash info command.
1328 * @flash_size: Usable flash size in bytes.
1329 * @write_block_size: Write block size. Write offset and size must be a
1331 * @erase_block_size: Erase block size. Erase offset and size must be a
1333 * @protect_block_size: Protection block size. Protection offset and size
1334 * must be a multiple of this.
1336 * Version 0 returns these fields.
1338 struct ec_response_flash_info {
1339 uint32_t flash_size;
1340 uint32_t write_block_size;
1341 uint32_t erase_block_size;
1342 uint32_t protect_block_size;
1346 * Flags for version 1+ flash info command
1347 * EC flash erases bits to 0 instead of 1.
1349 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1352 * Flash must be selected for read/write/erase operations to succeed. This may
1353 * be necessary on a chip where write/erase can be corrupted by other board
1354 * activity, or where the chip needs to enable some sort of programming voltage,
1355 * or where the read/write/erase operations require cleanly suspending other
1356 * chip functionality.
1358 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1361 * struct ec_response_flash_info_1 - Response to the flash info v1 command.
1362 * @flash_size: Usable flash size in bytes.
1363 * @write_block_size: Write block size. Write offset and size must be a
1365 * @erase_block_size: Erase block size. Erase offset and size must be a
1367 * @protect_block_size: Protection block size. Protection offset and size
1368 * must be a multiple of this.
1369 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if
1370 * size is exactly this and offset is a multiple of this.
1371 * For example, an EC may have a write buffer which can do
1372 * half-page operations if data is aligned, and a slower
1373 * word-at-a-time write mode.
1374 * @flags: Flags; see EC_FLASH_INFO_*
1376 * Version 1 returns the same initial fields as version 0, with additional
1379 * gcc anonymous structs don't seem to get along with the __packed directive;
1380 * if they did we'd define the version 0 structure as a sub-structure of this
1383 * Version 2 supports flash banks of different sizes:
1384 * The caller specified the number of banks it has preallocated
1386 * The EC returns the number of banks describing the flash memory.
1387 * It adds banks descriptions up to num_banks_desc.
1389 struct ec_response_flash_info_1 {
1390 /* Version 0 fields; see above for description */
1391 uint32_t flash_size;
1392 uint32_t write_block_size;
1393 uint32_t erase_block_size;
1394 uint32_t protect_block_size;
1396 /* Version 1 adds these fields: */
1397 uint32_t write_ideal_size;
1401 struct ec_params_flash_info_2 {
1402 /* Number of banks to describe */
1403 uint16_t num_banks_desc;
1404 /* Reserved; set 0; ignore on read */
1405 uint8_t reserved[2];
1408 struct ec_flash_bank {
1409 /* Number of sector is in this bank. */
1411 /* Size in power of 2 of each sector (8 --> 256 bytes) */
1413 /* Minimal write size for the sectors in this bank */
1414 uint8_t write_size_exp;
1415 /* Erase size for the sectors in this bank */
1416 uint8_t erase_size_exp;
1417 /* Size for write protection, usually identical to erase size. */
1418 uint8_t protect_size_exp;
1419 /* Reserved; set 0; ignore on read */
1420 uint8_t reserved[2];
1423 struct ec_response_flash_info_2 {
1424 /* Total flash in the EC. */
1425 uint32_t flash_size;
1426 /* Flags; see EC_FLASH_INFO_* */
1428 /* Maximum size to use to send data to write to the EC. */
1429 uint32_t write_ideal_size;
1430 /* Number of banks present in the EC. */
1431 uint16_t num_banks_total;
1432 /* Number of banks described in banks array. */
1433 uint16_t num_banks_desc;
1434 struct ec_flash_bank banks[];
1440 * Response is params.size bytes of data.
1442 #define EC_CMD_FLASH_READ 0x0011
1445 * struct ec_params_flash_read - Parameters for the flash read command.
1446 * @offset: Byte offset to read.
1447 * @size: Size to read in bytes.
1449 struct ec_params_flash_read {
1455 #define EC_CMD_FLASH_WRITE 0x0012
1456 #define EC_VER_FLASH_WRITE 1
1458 /* Version 0 of the flash command supported only 64 bytes of data */
1459 #define EC_FLASH_WRITE_VER0_SIZE 64
1462 * struct ec_params_flash_write - Parameters for the flash write command.
1463 * @offset: Byte offset to write.
1464 * @size: Size to write in bytes.
1466 struct ec_params_flash_write {
1469 /* Followed by data to write */
1473 #define EC_CMD_FLASH_ERASE 0x0013
1476 * struct ec_params_flash_erase - Parameters for the flash erase command, v0.
1477 * @offset: Byte offset to erase.
1478 * @size: Size to erase in bytes.
1480 struct ec_params_flash_erase {
1486 * v1 add async erase:
1487 * subcommands can returns:
1488 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1489 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1490 * EC_RES_ERROR : other errors.
1491 * EC_RES_BUSY : an existing erase operation is in progress.
1492 * EC_RES_ACCESS_DENIED: Trying to erase running image.
1494 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1495 * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1496 * the proper result.
1497 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1498 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1499 * ERASE_GET_RESULT command may timeout on EC where flash access is not
1500 * permitted while erasing. (For instance, STM32F4).
1502 enum ec_flash_erase_cmd {
1503 FLASH_ERASE_SECTOR, /* Erase and wait for result */
1504 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */
1505 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */
1509 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1.
1510 * @cmd: One of ec_flash_erase_cmd.
1511 * @reserved: Pad byte; currently always contains 0.
1512 * @flag: No flags defined yet; set to 0.
1513 * @params: Same as v0 parameters.
1515 struct ec_params_flash_erase_v1 {
1519 struct ec_params_flash_erase params;
1523 * Get/set flash protection.
1525 * If mask!=0, sets/clear the requested bits of flags. Depending on the
1526 * firmware write protect GPIO, not all flags will take effect immediately;
1527 * some flags require a subsequent hard reset to take effect. Check the
1528 * returned flags bits to see what actually happened.
1530 * If mask=0, simply returns the current flags state.
1532 #define EC_CMD_FLASH_PROTECT 0x0015
1533 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
1535 /* Flags for flash protection */
1536 /* RO flash code protected when the EC boots */
1537 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)
1539 * RO flash code protected now. If this bit is set, at-boot status cannot
1542 #define EC_FLASH_PROTECT_RO_NOW BIT(1)
1543 /* Entire flash code protected now, until reboot. */
1544 #define EC_FLASH_PROTECT_ALL_NOW BIT(2)
1545 /* Flash write protect GPIO is asserted now */
1546 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3)
1547 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1548 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4)
1550 * Error - flash protection is in inconsistent state. At least one bank of
1551 * flash which should be protected is not protected. Usually fixed by
1552 * re-requesting the desired flags, or by a hard reset if that fails.
1554 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1555 /* Entire flash code protected when the EC boots */
1556 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6)
1557 /* RW flash code protected when the EC boots */
1558 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7)
1559 /* RW flash code protected now. */
1560 #define EC_FLASH_PROTECT_RW_NOW BIT(8)
1561 /* Rollback information flash region protected when the EC boots */
1562 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)
1563 /* Rollback information flash region protected now */
1564 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
1568 * struct ec_params_flash_protect - Parameters for the flash protect command.
1569 * @mask: Bits in flags to apply.
1570 * @flags: New flags to apply.
1572 struct ec_params_flash_protect {
1578 * struct ec_response_flash_protect - Response to the flash protect command.
1579 * @flags: Current value of flash protect flags.
1580 * @valid_flags: Flags which are valid on this platform. This allows the
1581 * caller to distinguish between flags which aren't set vs. flags
1582 * which can't be set on this platform.
1583 * @writable_flags: Flags which can be changed given the current protection
1586 struct ec_response_flash_protect {
1588 uint32_t valid_flags;
1589 uint32_t writable_flags;
1593 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1594 * write protect. These commands may be reused with version > 0.
1597 /* Get the region offset/size */
1598 #define EC_CMD_FLASH_REGION_INFO 0x0016
1599 #define EC_VER_FLASH_REGION_INFO 1
1601 enum ec_flash_region {
1602 /* Region which holds read-only EC image */
1603 EC_FLASH_REGION_RO = 0,
1605 * Region which holds active RW image. 'Active' is different from
1606 * 'running'. Active means 'scheduled-to-run'. Since RO image always
1607 * scheduled to run, active/non-active applies only to RW images (for
1608 * the same reason 'update' applies only to RW images. It's a state of
1609 * an image on a flash. Running image can be RO, RW_A, RW_B but active
1610 * image can only be RW_A or RW_B. In recovery mode, an active RW image
1611 * doesn't enter 'running' state but it's still active on a flash.
1613 EC_FLASH_REGION_ACTIVE,
1615 * Region which should be write-protected in the factory (a superset of
1616 * EC_FLASH_REGION_RO)
1618 EC_FLASH_REGION_WP_RO,
1619 /* Region which holds updatable (non-active) RW image */
1620 EC_FLASH_REGION_UPDATE,
1621 /* Number of regions */
1622 EC_FLASH_REGION_COUNT,
1625 * 'RW' is vague if there are multiple RW images; we mean the active one,
1626 * so the old constant is deprecated.
1628 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
1631 * struct ec_params_flash_region_info - Parameters for the flash region info
1633 * @region: Flash region; see EC_FLASH_REGION_*
1635 struct ec_params_flash_region_info {
1639 struct ec_response_flash_region_info {
1644 /* Read/write VbNvContext */
1645 #define EC_CMD_VBNV_CONTEXT 0x0017
1646 #define EC_VER_VBNV_CONTEXT 1
1647 #define EC_VBNV_BLOCK_SIZE 16
1649 enum ec_vbnvcontext_op {
1650 EC_VBNV_CONTEXT_OP_READ,
1651 EC_VBNV_CONTEXT_OP_WRITE,
1654 struct ec_params_vbnvcontext {
1656 uint8_t block[EC_VBNV_BLOCK_SIZE];
1659 struct ec_response_vbnvcontext {
1660 uint8_t block[EC_VBNV_BLOCK_SIZE];
1664 /* Get SPI flash information */
1665 #define EC_CMD_FLASH_SPI_INFO 0x0018
1667 struct ec_response_flash_spi_info {
1668 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1671 /* Pad byte; currently always contains 0 */
1674 /* Manufacturer / device ID from command 0x90 */
1675 uint8_t mfr_dev_id[2];
1677 /* Status registers from command 0x05 and 0x35 */
1682 /* Select flash during flash operations */
1683 #define EC_CMD_FLASH_SELECT 0x0019
1686 * struct ec_params_flash_select - Parameters for the flash select command.
1687 * @select: 1 to select flash, 0 to deselect flash
1689 struct ec_params_flash_select {
1694 /*****************************************************************************/
1697 /* Get fan target RPM */
1698 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1700 struct ec_response_pwm_get_fan_rpm {
1704 /* Set target fan RPM */
1705 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1707 /* Version 0 of input params */
1708 struct ec_params_pwm_set_fan_target_rpm_v0 {
1712 /* Version 1 of input params */
1713 struct ec_params_pwm_set_fan_target_rpm_v1 {
1718 /* Get keyboard backlight */
1719 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1720 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1722 struct ec_response_pwm_get_keyboard_backlight {
1727 /* Set keyboard backlight */
1728 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1729 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1731 struct ec_params_pwm_set_keyboard_backlight {
1735 /* Set target fan PWM duty cycle */
1736 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1738 /* Version 0 of input params */
1739 struct ec_params_pwm_set_fan_duty_v0 {
1743 /* Version 1 of input params */
1744 struct ec_params_pwm_set_fan_duty_v1 {
1749 #define EC_CMD_PWM_SET_DUTY 0x0025
1750 /* 16 bit duty cycle, 0xffff = 100% */
1751 #define EC_PWM_MAX_DUTY 0xffff
1754 /* All types, indexed by board-specific enum pwm_channel */
1755 EC_PWM_TYPE_GENERIC = 0,
1756 /* Keyboard backlight */
1757 EC_PWM_TYPE_KB_LIGHT,
1758 /* Display backlight */
1759 EC_PWM_TYPE_DISPLAY_LIGHT,
1763 struct ec_params_pwm_set_duty {
1764 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1765 uint8_t pwm_type; /* ec_pwm_type */
1766 uint8_t index; /* Type-specific index, or 0 if unique */
1769 #define EC_CMD_PWM_GET_DUTY 0x0026
1771 struct ec_params_pwm_get_duty {
1772 uint8_t pwm_type; /* ec_pwm_type */
1773 uint8_t index; /* Type-specific index, or 0 if unique */
1776 struct ec_response_pwm_get_duty {
1777 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1780 /*****************************************************************************/
1782 * Lightbar commands. This looks worse than it is. Since we only use one HOST
1783 * command to say "talk to the lightbar", we put the "and tell it to do X" part
1784 * into a subcommand. We'll make separate structs for subcommands with
1785 * different input args, so that we know how much to expect.
1787 #define EC_CMD_LIGHTBAR_CMD 0x0028
1791 } __ec_todo_unpacked;
1793 #define LB_BATTERY_LEVELS 4
1796 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a
1797 * host command, but the alignment is the same regardless. Keep it that way.
1799 struct lightbar_params_v0 {
1801 int32_t google_ramp_up;
1802 int32_t google_ramp_down;
1803 int32_t s3s0_ramp_up;
1804 int32_t s0_tick_delay[2]; /* AC=0/1 */
1805 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1806 int32_t s0s3_ramp_down;
1807 int32_t s3_sleep_for;
1809 int32_t s3_ramp_down;
1813 uint8_t osc_min[2]; /* AC=0/1 */
1814 uint8_t osc_max[2]; /* AC=0/1 */
1815 uint8_t w_ofs[2]; /* AC=0/1 */
1817 /* Brightness limits based on the backlight and AC. */
1818 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1819 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1820 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1822 /* Battery level thresholds */
1823 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1825 /* Map [AC][battery_level] to color index */
1826 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1827 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1830 struct rgb_s color[8]; /* 0-3 are Google colors */
1833 struct lightbar_params_v1 {
1835 int32_t google_ramp_up;
1836 int32_t google_ramp_down;
1837 int32_t s3s0_ramp_up;
1838 int32_t s0_tick_delay[2]; /* AC=0/1 */
1839 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1840 int32_t s0s3_ramp_down;
1841 int32_t s3_sleep_for;
1843 int32_t s3_ramp_down;
1845 int32_t s5_ramp_down;
1846 int32_t tap_tick_delay;
1847 int32_t tap_gate_delay;
1848 int32_t tap_display_time;
1850 /* Tap-for-battery params */
1851 uint8_t tap_pct_red;
1852 uint8_t tap_pct_green;
1853 uint8_t tap_seg_min_on;
1854 uint8_t tap_seg_max_on;
1855 uint8_t tap_seg_osc;
1859 uint8_t osc_min[2]; /* AC=0/1 */
1860 uint8_t osc_max[2]; /* AC=0/1 */
1861 uint8_t w_ofs[2]; /* AC=0/1 */
1863 /* Brightness limits based on the backlight and AC. */
1864 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1865 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1866 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1868 /* Battery level thresholds */
1869 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1871 /* Map [AC][battery_level] to color index */
1872 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1873 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1875 /* s5: single color pulse on inhibited power-up */
1879 struct rgb_s color[8]; /* 0-3 are Google colors */
1882 /* Lightbar command params v2
1885 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
1886 * logical groups to make it more manageable ( < 120 bytes).
1888 * NOTE: Each of these groups must be less than 120 bytes.
1891 struct lightbar_params_v2_timing {
1893 int32_t google_ramp_up;
1894 int32_t google_ramp_down;
1895 int32_t s3s0_ramp_up;
1896 int32_t s0_tick_delay[2]; /* AC=0/1 */
1897 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1898 int32_t s0s3_ramp_down;
1899 int32_t s3_sleep_for;
1901 int32_t s3_ramp_down;
1903 int32_t s5_ramp_down;
1904 int32_t tap_tick_delay;
1905 int32_t tap_gate_delay;
1906 int32_t tap_display_time;
1909 struct lightbar_params_v2_tap {
1910 /* Tap-for-battery params */
1911 uint8_t tap_pct_red;
1912 uint8_t tap_pct_green;
1913 uint8_t tap_seg_min_on;
1914 uint8_t tap_seg_max_on;
1915 uint8_t tap_seg_osc;
1919 struct lightbar_params_v2_oscillation {
1921 uint8_t osc_min[2]; /* AC=0/1 */
1922 uint8_t osc_max[2]; /* AC=0/1 */
1923 uint8_t w_ofs[2]; /* AC=0/1 */
1926 struct lightbar_params_v2_brightness {
1927 /* Brightness limits based on the backlight and AC. */
1928 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1929 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1930 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1933 struct lightbar_params_v2_thresholds {
1934 /* Battery level thresholds */
1935 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1938 struct lightbar_params_v2_colors {
1939 /* Map [AC][battery_level] to color index */
1940 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1941 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1943 /* s5: single color pulse on inhibited power-up */
1947 struct rgb_s color[8]; /* 0-3 are Google colors */
1950 /* Lightbar program. */
1951 #define EC_LB_PROG_LEN 192
1952 struct lightbar_program {
1954 uint8_t data[EC_LB_PROG_LEN];
1955 } __ec_todo_unpacked;
1957 struct ec_params_lightbar {
1958 uint8_t cmd; /* Command (see enum lightbar_command) */
1961 * The following commands have no args:
1963 * dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1964 * version, get_brightness, get_demo, suspend, resume,
1965 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc,
1966 * get_params_v2_bright, get_params_v2_thlds,
1967 * get_params_v2_colors
1969 * Don't use an empty struct, because C++ hates that.
1972 struct __ec_todo_unpacked {
1974 } set_brightness, seq, demo;
1976 struct __ec_todo_unpacked {
1977 uint8_t ctrl, reg, value;
1980 struct __ec_todo_unpacked {
1981 uint8_t led, red, green, blue;
1984 struct __ec_todo_unpacked {
1988 struct __ec_todo_unpacked {
1990 } manual_suspend_ctrl;
1992 struct lightbar_params_v0 set_params_v0;
1993 struct lightbar_params_v1 set_params_v1;
1995 struct lightbar_params_v2_timing set_v2par_timing;
1996 struct lightbar_params_v2_tap set_v2par_tap;
1997 struct lightbar_params_v2_oscillation set_v2par_osc;
1998 struct lightbar_params_v2_brightness set_v2par_bright;
1999 struct lightbar_params_v2_thresholds set_v2par_thlds;
2000 struct lightbar_params_v2_colors set_v2par_colors;
2002 struct lightbar_program set_program;
2006 struct ec_response_lightbar {
2008 struct __ec_todo_unpacked {
2009 struct __ec_todo_unpacked {
2016 struct __ec_todo_unpacked {
2018 } get_seq, get_brightness, get_demo;
2020 struct lightbar_params_v0 get_params_v0;
2021 struct lightbar_params_v1 get_params_v1;
2024 struct lightbar_params_v2_timing get_params_v2_timing;
2025 struct lightbar_params_v2_tap get_params_v2_tap;
2026 struct lightbar_params_v2_oscillation get_params_v2_osc;
2027 struct lightbar_params_v2_brightness get_params_v2_bright;
2028 struct lightbar_params_v2_thresholds get_params_v2_thlds;
2029 struct lightbar_params_v2_colors get_params_v2_colors;
2031 struct __ec_todo_unpacked {
2036 struct __ec_todo_unpacked {
2037 uint8_t red, green, blue;
2041 * The following commands have no response:
2043 * off, on, init, set_brightness, seq, reg, set_rgb, demo,
2044 * set_params_v0, set_params_v1, set_program,
2045 * manual_suspend_ctrl, suspend, resume, set_v2par_timing,
2046 * set_v2par_tap, set_v2par_osc, set_v2par_bright,
2047 * set_v2par_thlds, set_v2par_colors
2052 /* Lightbar commands */
2053 enum lightbar_command {
2054 LIGHTBAR_CMD_DUMP = 0,
2055 LIGHTBAR_CMD_OFF = 1,
2056 LIGHTBAR_CMD_ON = 2,
2057 LIGHTBAR_CMD_INIT = 3,
2058 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
2059 LIGHTBAR_CMD_SEQ = 5,
2060 LIGHTBAR_CMD_REG = 6,
2061 LIGHTBAR_CMD_SET_RGB = 7,
2062 LIGHTBAR_CMD_GET_SEQ = 8,
2063 LIGHTBAR_CMD_DEMO = 9,
2064 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
2065 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
2066 LIGHTBAR_CMD_VERSION = 12,
2067 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
2068 LIGHTBAR_CMD_GET_RGB = 14,
2069 LIGHTBAR_CMD_GET_DEMO = 15,
2070 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
2071 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
2072 LIGHTBAR_CMD_SET_PROGRAM = 18,
2073 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
2074 LIGHTBAR_CMD_SUSPEND = 20,
2075 LIGHTBAR_CMD_RESUME = 21,
2076 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
2077 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
2078 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
2079 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
2080 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
2081 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
2082 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
2083 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
2084 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
2085 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
2086 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
2087 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
2091 /*****************************************************************************/
2092 /* LED control commands */
2094 #define EC_CMD_LED_CONTROL 0x0029
2097 /* LED to indicate battery state of charge */
2098 EC_LED_ID_BATTERY_LED = 0,
2100 * LED to indicate system power state (on or in suspend).
2101 * May be on power button or on C-panel.
2103 EC_LED_ID_POWER_LED,
2104 /* LED on power adapter or its plug */
2105 EC_LED_ID_ADAPTER_LED,
2106 /* LED to indicate left side */
2108 /* LED to indicate right side */
2109 EC_LED_ID_RIGHT_LED,
2110 /* LED to indicate recovery mode with HW_REINIT */
2111 EC_LED_ID_RECOVERY_HW_REINIT_LED,
2112 /* LED to indicate sysrq debug mode. */
2113 EC_LED_ID_SYSRQ_DEBUG_LED,
2118 /* LED control flags */
2119 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */
2120 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */
2122 enum ec_led_colors {
2123 EC_LED_COLOR_RED = 0,
2126 EC_LED_COLOR_YELLOW,
2133 struct ec_params_led_control {
2134 uint8_t led_id; /* Which LED to control */
2135 uint8_t flags; /* Control flags */
2137 uint8_t brightness[EC_LED_COLOR_COUNT];
2140 struct ec_response_led_control {
2142 * Available brightness value range.
2144 * Range 0 means color channel not present.
2145 * Range 1 means on/off control.
2146 * Other values means the LED is control by PWM.
2148 uint8_t brightness_range[EC_LED_COLOR_COUNT];
2151 /*****************************************************************************/
2152 /* Verified boot commands */
2155 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
2156 * reused for other purposes with version > 0.
2159 /* Verified boot hash command */
2160 #define EC_CMD_VBOOT_HASH 0x002A
2162 struct ec_params_vboot_hash {
2163 uint8_t cmd; /* enum ec_vboot_hash_cmd */
2164 uint8_t hash_type; /* enum ec_vboot_hash_type */
2165 uint8_t nonce_size; /* Nonce size; may be 0 */
2166 uint8_t reserved0; /* Reserved; set 0 */
2167 uint32_t offset; /* Offset in flash to hash */
2168 uint32_t size; /* Number of bytes to hash */
2169 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */
2172 struct ec_response_vboot_hash {
2173 uint8_t status; /* enum ec_vboot_hash_status */
2174 uint8_t hash_type; /* enum ec_vboot_hash_type */
2175 uint8_t digest_size; /* Size of hash digest in bytes */
2176 uint8_t reserved0; /* Ignore; will be 0 */
2177 uint32_t offset; /* Offset in flash which was hashed */
2178 uint32_t size; /* Number of bytes hashed */
2179 uint8_t hash_digest[64]; /* Hash digest data */
2182 enum ec_vboot_hash_cmd {
2183 EC_VBOOT_HASH_GET = 0, /* Get current hash status */
2184 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */
2185 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */
2186 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */
2189 enum ec_vboot_hash_type {
2190 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
2193 enum ec_vboot_hash_status {
2194 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
2195 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
2196 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
2200 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
2201 * If one of these is specified, the EC will automatically update offset and
2202 * size to the correct values for the specified image (RO or RW).
2204 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
2205 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
2206 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
2209 * 'RW' is vague if there are multiple RW images; we mean the active one,
2210 * so the old constant is deprecated.
2212 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2214 /*****************************************************************************/
2216 * Motion sense commands. We'll make separate structs for sub-commands with
2217 * different input args, so that we know how much to expect.
2219 #define EC_CMD_MOTION_SENSE_CMD 0x002B
2221 /* Motion sense commands */
2222 enum motionsense_command {
2224 * Dump command returns all motion sensor data including motion sense
2225 * module flags and individual sensor flags.
2227 MOTIONSENSE_CMD_DUMP = 0,
2230 * Info command returns data describing the details of a given sensor,
2231 * including enum motionsensor_type, enum motionsensor_location, and
2232 * enum motionsensor_chip.
2234 MOTIONSENSE_CMD_INFO = 1,
2237 * EC Rate command is a setter/getter command for the EC sampling rate
2239 * It is per sensor, the EC run sample task at the minimum of all
2241 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
2242 * to collect all the sensor samples.
2243 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
2244 * to process of all motion sensors in milliseconds.
2246 MOTIONSENSE_CMD_EC_RATE = 2,
2249 * Sensor ODR command is a setter/getter command for the output data
2250 * rate of a specific motion sensor in millihertz.
2252 MOTIONSENSE_CMD_SENSOR_ODR = 3,
2255 * Sensor range command is a setter/getter command for the range of
2256 * a specified motion sensor in +/-G's or +/- deg/s.
2258 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
2261 * Setter/getter command for the keyboard wake angle. When the lid
2262 * angle is greater than this value, keyboard wake is disabled in S3,
2263 * and when the lid angle goes less than this value, keyboard wake is
2264 * enabled. Note, the lid angle measurement is an approximate,
2265 * un-calibrated value, hence the wake angle isn't exact.
2267 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
2270 * Returns a single sensor data.
2272 MOTIONSENSE_CMD_DATA = 6,
2275 * Return sensor fifo info.
2277 MOTIONSENSE_CMD_FIFO_INFO = 7,
2280 * Insert a flush element in the fifo and return sensor fifo info.
2281 * The host can use that element to synchronize its operation.
2283 MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2286 * Return a portion of the fifo.
2288 MOTIONSENSE_CMD_FIFO_READ = 9,
2291 * Perform low level calibration.
2292 * On sensors that support it, ask to do offset calibration.
2294 MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2297 * Sensor Offset command is a setter/getter command for the offset
2298 * used for calibration.
2299 * The offsets can be calculated by the host, or via
2300 * PERFORM_CALIB command.
2302 MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2305 * List available activities for a MOTION sensor.
2306 * Indicates if they are enabled or disabled.
2308 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2311 * Activity management
2312 * Enable/Disable activity recognition.
2314 MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2319 MOTIONSENSE_CMD_LID_ANGLE = 14,
2322 * Allow the FIFO to trigger interrupt via MKBP events.
2323 * By default the FIFO does not send interrupt to process the FIFO
2324 * until the AP is ready or it is coming from a wakeup sensor.
2326 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2329 * Spoof the readings of the sensors. The spoofed readings can be set
2330 * to arbitrary values, or will lock to the last read actual values.
2332 MOTIONSENSE_CMD_SPOOF = 16,
2334 /* Set lid angle for tablet mode detection. */
2335 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17,
2338 * Sensor Scale command is a setter/getter command for the calibration
2341 MOTIONSENSE_CMD_SENSOR_SCALE = 18,
2343 /* Number of motionsense sub-commands. */
2344 MOTIONSENSE_NUM_CMDS
2347 /* List of motion sensor types. */
2348 enum motionsensor_type {
2349 MOTIONSENSE_TYPE_ACCEL = 0,
2350 MOTIONSENSE_TYPE_GYRO = 1,
2351 MOTIONSENSE_TYPE_MAG = 2,
2352 MOTIONSENSE_TYPE_PROX = 3,
2353 MOTIONSENSE_TYPE_LIGHT = 4,
2354 MOTIONSENSE_TYPE_ACTIVITY = 5,
2355 MOTIONSENSE_TYPE_BARO = 6,
2356 MOTIONSENSE_TYPE_SYNC = 7,
2357 MOTIONSENSE_TYPE_MAX,
2360 /* List of motion sensor locations. */
2361 enum motionsensor_location {
2362 MOTIONSENSE_LOC_BASE = 0,
2363 MOTIONSENSE_LOC_LID = 1,
2364 MOTIONSENSE_LOC_CAMERA = 2,
2365 MOTIONSENSE_LOC_MAX,
2368 /* List of motion sensor chips. */
2369 enum motionsensor_chip {
2370 MOTIONSENSE_CHIP_KXCJ9 = 0,
2371 MOTIONSENSE_CHIP_LSM6DS0 = 1,
2372 MOTIONSENSE_CHIP_BMI160 = 2,
2373 MOTIONSENSE_CHIP_SI1141 = 3,
2374 MOTIONSENSE_CHIP_SI1142 = 4,
2375 MOTIONSENSE_CHIP_SI1143 = 5,
2376 MOTIONSENSE_CHIP_KX022 = 6,
2377 MOTIONSENSE_CHIP_L3GD20H = 7,
2378 MOTIONSENSE_CHIP_BMA255 = 8,
2379 MOTIONSENSE_CHIP_BMP280 = 9,
2380 MOTIONSENSE_CHIP_OPT3001 = 10,
2381 MOTIONSENSE_CHIP_BH1730 = 11,
2382 MOTIONSENSE_CHIP_GPIO = 12,
2383 MOTIONSENSE_CHIP_LIS2DH = 13,
2384 MOTIONSENSE_CHIP_LSM6DSM = 14,
2385 MOTIONSENSE_CHIP_LIS2DE = 15,
2386 MOTIONSENSE_CHIP_LIS2MDL = 16,
2387 MOTIONSENSE_CHIP_LSM6DS3 = 17,
2388 MOTIONSENSE_CHIP_LSM6DSO = 18,
2389 MOTIONSENSE_CHIP_LNG2DM = 19,
2390 MOTIONSENSE_CHIP_MAX,
2393 /* List of orientation positions */
2394 enum motionsensor_orientation {
2395 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0,
2396 MOTIONSENSE_ORIENTATION_PORTRAIT = 1,
2397 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2,
2398 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3,
2399 MOTIONSENSE_ORIENTATION_UNKNOWN = 4,
2402 struct ec_response_motion_sensor_data {
2403 /* Flags for each sensor. */
2405 /* Sensor number the data comes from. */
2407 /* Each sensor is up to 3-axis. */
2410 struct __ec_todo_packed {
2414 struct __ec_todo_unpacked {
2415 uint8_t activity; /* motionsensor_activity */
2417 int16_t add_info[2];
2422 /* Note: used in ec_response_get_next_data */
2423 struct ec_response_motion_sense_fifo_info {
2424 /* Size of the fifo */
2426 /* Amount of space used in the fifo */
2428 /* Timestamp recorded in us.
2429 * aka accurate timestamp when host event was triggered.
2432 /* Total amount of vector lost */
2433 uint16_t total_lost;
2434 /* Lost events since the last fifo_info, per sensors */
2438 struct ec_response_motion_sense_fifo_data {
2439 uint32_t number_data;
2440 struct ec_response_motion_sensor_data data[];
2443 /* List supported activity recognition */
2444 enum motionsensor_activity {
2445 MOTIONSENSE_ACTIVITY_RESERVED = 0,
2446 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2447 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2448 MOTIONSENSE_ACTIVITY_ORIENTATION = 3,
2451 struct ec_motion_sense_activity {
2453 uint8_t activity; /* one of enum motionsensor_activity */
2454 uint8_t enable; /* 1: enable, 0: disable */
2456 uint16_t parameters[3]; /* activity dependent parameters */
2457 } __ec_todo_unpacked;
2459 /* Module flag masks used for the dump sub-command. */
2460 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2462 /* Sensor flag masks used for the dump sub-command. */
2463 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2466 * Flush entry for synchronization.
2467 * data contains time stamp
2469 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2470 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
2471 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
2472 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
2473 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
2476 * Send this value for the data element to only perform a read. If you
2477 * send any other value, the EC will interpret it as data to set and will
2478 * return the actual value set.
2480 #define EC_MOTION_SENSE_NO_VALUE -1
2482 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2484 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
2485 /* Set Calibration information */
2486 #define MOTION_SENSE_SET_OFFSET BIT(0)
2488 /* Default Scale value, factor 1. */
2489 #define MOTION_SENSE_DEFAULT_SCALE BIT(15)
2491 #define LID_ANGLE_UNRELIABLE 500
2493 enum motionsense_spoof_mode {
2494 /* Disable spoof mode. */
2495 MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2497 /* Enable spoof mode, but use provided component values. */
2498 MOTIONSENSE_SPOOF_MODE_CUSTOM,
2500 /* Enable spoof mode, but use the current sensor values. */
2501 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2503 /* Query the current spoof mode status for the sensor. */
2504 MOTIONSENSE_SPOOF_MODE_QUERY,
2507 struct ec_params_motion_sense {
2510 /* Used for MOTIONSENSE_CMD_DUMP. */
2511 struct __ec_todo_unpacked {
2513 * Maximal number of sensor the host is expecting.
2514 * 0 means the host is only interested in the number
2515 * of sensors controlled by the EC.
2517 uint8_t max_sensor_count;
2521 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
2523 struct __ec_todo_unpacked {
2524 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
2525 * kb_wake_angle: angle to wakup AP.
2531 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
2532 * and MOTIONSENSE_CMD_PERFORM_CALIB.
2534 struct __ec_todo_unpacked {
2536 } info, info_3, data, fifo_flush, perform_calib,
2540 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
2541 * and MOTIONSENSE_CMD_SENSOR_RANGE.
2543 struct __ec_todo_unpacked {
2546 /* Rounding flag, true for round-up, false for down. */
2551 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
2553 } ec_rate, sensor_odr, sensor_range;
2555 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2556 struct __ec_todo_packed {
2560 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2561 * the calibration information in the EC.
2562 * If unset, just retrieve calibration information.
2567 * Temperature at calibration, in units of 0.01 C
2568 * 0x8000: invalid / unknown.
2575 * Offset for calibration.
2577 * Accelerometer: 1/1024 g
2578 * Gyro: 1/1024 deg/s
2584 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2585 struct __ec_todo_packed {
2589 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2590 * the calibration information in the EC.
2591 * If unset, just retrieve calibration information.
2596 * Temperature at calibration, in units of 0.01 C
2597 * 0x8000: invalid / unknown.
2604 * Scale for calibration:
2605 * By default scale is 1, it is encoded on 16bits:
2614 /* Used for MOTIONSENSE_CMD_FIFO_INFO */
2617 /* Used for MOTIONSENSE_CMD_FIFO_READ */
2618 struct __ec_todo_unpacked {
2620 * Number of expected vector to return.
2621 * EC may return less or 0 if none available.
2623 uint32_t max_data_vector;
2626 struct ec_motion_sense_activity set_activity;
2628 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
2631 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
2632 struct __ec_todo_unpacked {
2634 * 1: enable, 0 disable fifo,
2635 * EC_MOTION_SENSE_NO_VALUE return value.
2640 /* Used for MOTIONSENSE_CMD_SPOOF */
2641 struct __ec_todo_packed {
2644 /* See enum motionsense_spoof_mode. */
2645 uint8_t spoof_enable;
2647 /* Ignored, used for alignment. */
2650 /* Individual component values to spoof. */
2651 int16_t components[3];
2654 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2655 struct __ec_todo_unpacked {
2657 * Lid angle threshold for switching between tablet and
2663 * Hysteresis degree to prevent fluctuations between
2664 * clamshell and tablet mode if lid angle keeps
2665 * changing around the threshold. Lid motion driver will
2666 * use lid_angle + hys_degree to trigger tablet mode and
2667 * lid_angle - hys_degree to trigger clamshell mode.
2670 } tablet_mode_threshold;
2674 struct ec_response_motion_sense {
2676 /* Used for MOTIONSENSE_CMD_DUMP */
2677 struct __ec_todo_unpacked {
2678 /* Flags representing the motion sensor module. */
2679 uint8_t module_flags;
2681 /* Number of sensors managed directly by the EC. */
2682 uint8_t sensor_count;
2685 * Sensor data is truncated if response_max is too small
2686 * for holding all the data.
2688 struct ec_response_motion_sensor_data sensor[0];
2691 /* Used for MOTIONSENSE_CMD_INFO. */
2692 struct __ec_todo_unpacked {
2693 /* Should be element of enum motionsensor_type. */
2696 /* Should be element of enum motionsensor_location. */
2699 /* Should be element of enum motionsensor_chip. */
2703 /* Used for MOTIONSENSE_CMD_INFO version 3 */
2704 struct __ec_todo_unpacked {
2705 /* Should be element of enum motionsensor_type. */
2708 /* Should be element of enum motionsensor_location. */
2711 /* Should be element of enum motionsensor_chip. */
2714 /* Minimum sensor sampling frequency */
2715 uint32_t min_frequency;
2717 /* Maximum sensor sampling frequency */
2718 uint32_t max_frequency;
2720 /* Max number of sensor events that could be in fifo */
2721 uint32_t fifo_max_event_count;
2724 /* Used for MOTIONSENSE_CMD_DATA */
2725 struct ec_response_motion_sensor_data data;
2728 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
2729 * MOTIONSENSE_CMD_SENSOR_RANGE,
2730 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
2731 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
2732 * MOTIONSENSE_CMD_SPOOF.
2734 struct __ec_todo_unpacked {
2735 /* Current value of the parameter queried. */
2737 } ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2738 fifo_int_enable, spoof;
2741 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET,
2744 struct __ec_todo_unpacked {
2747 } sensor_offset, perform_calib;
2749 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2750 struct __ec_todo_unpacked {
2755 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2757 struct ec_response_motion_sense_fifo_data fifo_read;
2759 struct __ec_todo_packed {
2765 /* No params for set activity */
2767 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
2768 struct __ec_todo_unpacked {
2770 * Angle between 0 and 360 degree if available,
2771 * LID_ANGLE_UNRELIABLE otherwise.
2776 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2777 struct __ec_todo_unpacked {
2779 * Lid angle threshold for switching between tablet and
2784 /* Hysteresis degree. */
2785 uint16_t hys_degree;
2786 } tablet_mode_threshold;
2791 /*****************************************************************************/
2792 /* Force lid open command */
2794 /* Make lid event always open */
2795 #define EC_CMD_FORCE_LID_OPEN 0x002C
2797 struct ec_params_force_lid_open {
2801 /*****************************************************************************/
2802 /* Configure the behavior of the power button */
2803 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2805 enum ec_config_power_button_flags {
2806 /* Enable/Disable power button pulses for x86 devices */
2807 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0),
2810 struct ec_params_config_power_button {
2811 /* See enum ec_config_power_button_flags */
2815 /*****************************************************************************/
2816 /* USB charging control commands */
2818 /* Set USB port charging mode */
2819 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2821 struct ec_params_usb_charge_set_mode {
2822 uint8_t usb_port_id;
2824 uint8_t inhibit_charge:1;
2827 /*****************************************************************************/
2828 /* Persistent storage for host */
2830 /* Maximum bytes that can be read/written in a single command */
2831 #define EC_PSTORE_SIZE_MAX 64
2833 /* Get persistent storage info */
2834 #define EC_CMD_PSTORE_INFO 0x0040
2836 struct ec_response_pstore_info {
2837 /* Persistent storage size, in bytes */
2838 uint32_t pstore_size;
2839 /* Access size; read/write offset and size must be a multiple of this */
2840 uint32_t access_size;
2844 * Read persistent storage
2846 * Response is params.size bytes of data.
2848 #define EC_CMD_PSTORE_READ 0x0041
2850 struct ec_params_pstore_read {
2851 uint32_t offset; /* Byte offset to read */
2852 uint32_t size; /* Size to read in bytes */
2855 /* Write persistent storage */
2856 #define EC_CMD_PSTORE_WRITE 0x0042
2858 struct ec_params_pstore_write {
2859 uint32_t offset; /* Byte offset to write */
2860 uint32_t size; /* Size to write in bytes */
2861 uint8_t data[EC_PSTORE_SIZE_MAX];
2864 /*****************************************************************************/
2865 /* Real-time clock */
2867 /* RTC params and response structures */
2868 struct ec_params_rtc {
2872 struct ec_response_rtc {
2876 /* These use ec_response_rtc */
2877 #define EC_CMD_RTC_GET_VALUE 0x0044
2878 #define EC_CMD_RTC_GET_ALARM 0x0045
2880 /* These all use ec_params_rtc */
2881 #define EC_CMD_RTC_SET_VALUE 0x0046
2882 #define EC_CMD_RTC_SET_ALARM 0x0047
2884 /* Pass as time param to SET_ALARM to clear the current alarm */
2885 #define EC_RTC_ALARM_CLEAR 0
2887 /*****************************************************************************/
2888 /* Port80 log access */
2890 /* Maximum entries that can be read/written in a single command */
2891 #define EC_PORT80_SIZE_MAX 32
2893 /* Get last port80 code from previous boot */
2894 #define EC_CMD_PORT80_LAST_BOOT 0x0048
2895 #define EC_CMD_PORT80_READ 0x0048
2897 enum ec_port80_subcmd {
2898 EC_PORT80_GET_INFO = 0,
2899 EC_PORT80_READ_BUFFER,
2902 struct ec_params_port80_read {
2905 struct __ec_todo_unpacked {
2907 uint32_t num_entries;
2912 struct ec_response_port80_read {
2914 struct __ec_todo_unpacked {
2916 uint32_t history_size;
2919 struct __ec_todo_unpacked {
2920 uint16_t codes[EC_PORT80_SIZE_MAX];
2925 struct ec_response_port80_last_boot {
2929 /*****************************************************************************/
2930 /* Temporary secure storage for host verified boot use */
2932 /* Number of bytes in a vstore slot */
2933 #define EC_VSTORE_SLOT_SIZE 64
2935 /* Maximum number of vstore slots */
2936 #define EC_VSTORE_SLOT_MAX 32
2938 /* Get persistent storage info */
2939 #define EC_CMD_VSTORE_INFO 0x0049
2940 struct ec_response_vstore_info {
2941 /* Indicates which slots are locked */
2942 uint32_t slot_locked;
2943 /* Total number of slots available */
2948 * Read temporary secure storage
2950 * Response is EC_VSTORE_SLOT_SIZE bytes of data.
2952 #define EC_CMD_VSTORE_READ 0x004A
2954 struct ec_params_vstore_read {
2955 uint8_t slot; /* Slot to read from */
2958 struct ec_response_vstore_read {
2959 uint8_t data[EC_VSTORE_SLOT_SIZE];
2963 * Write temporary secure storage and lock it.
2965 #define EC_CMD_VSTORE_WRITE 0x004B
2967 struct ec_params_vstore_write {
2968 uint8_t slot; /* Slot to write to */
2969 uint8_t data[EC_VSTORE_SLOT_SIZE];
2972 /*****************************************************************************/
2973 /* Thermal engine commands. Note that there are two implementations. We'll
2974 * reuse the command number, but the data and behavior is incompatible.
2975 * Version 0 is what originally shipped on Link.
2976 * Version 1 separates the CPU thermal limits from the fan control.
2979 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2980 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2982 /* The version 0 structs are opaque. You have to know what they are for
2983 * the get/set commands to make any sense.
2986 /* Version 0 - set */
2987 struct ec_params_thermal_set_threshold {
2988 uint8_t sensor_type;
2989 uint8_t threshold_id;
2993 /* Version 0 - get */
2994 struct ec_params_thermal_get_threshold {
2995 uint8_t sensor_type;
2996 uint8_t threshold_id;
2999 struct ec_response_thermal_get_threshold {
3004 /* The version 1 structs are visible. */
3005 enum ec_temp_thresholds {
3006 EC_TEMP_THRESH_WARN = 0,
3007 EC_TEMP_THRESH_HIGH,
3008 EC_TEMP_THRESH_HALT,
3010 EC_TEMP_THRESH_COUNT
3014 * Thermal configuration for one temperature sensor. Temps are in degrees K.
3015 * Zero values will be silently ignored by the thermal task.
3017 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree
3020 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3021 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K
3022 * EC will throttle ap when temperature >= 301 K, and release throttling when
3023 * temperature <= 299 K.
3025 * Set 'temp_host_release' value allows thermal task has a custom hysteresis.
3027 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3028 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K
3029 * EC will throttle ap when temperature >= 301 K, and release throttling when
3030 * temperature <= 294 K.
3032 * Note that this structure is a sub-structure of
3033 * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
3035 struct ec_thermal_config {
3036 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
3037 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */
3038 uint32_t temp_fan_off; /* no active cooling needed */
3039 uint32_t temp_fan_max; /* max active cooling needed */
3042 /* Version 1 - get config for one sensor. */
3043 struct ec_params_thermal_get_threshold_v1 {
3044 uint32_t sensor_num;
3046 /* This returns a struct ec_thermal_config */
3049 * Version 1 - set config for one sensor.
3050 * Use read-modify-write for best results!
3052 struct ec_params_thermal_set_threshold_v1 {
3053 uint32_t sensor_num;
3054 struct ec_thermal_config cfg;
3056 /* This returns no data */
3058 /****************************************************************************/
3060 /* Toggle automatic fan control */
3061 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3063 /* Version 1 of input params */
3064 struct ec_params_auto_fan_ctrl_v1 {
3068 /* Get/Set TMP006 calibration data */
3069 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3070 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3073 * The original TMP006 calibration only needed four params, but now we need
3074 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
3075 * the params opaque. The v1 "get" response will include the algorithm number
3076 * and how many params it requires. That way we can change the EC code without
3077 * needing to update this file. We can also use a different algorithm on each
3081 /* This is the same struct for both v0 and v1. */
3082 struct ec_params_tmp006_get_calibration {
3087 struct ec_response_tmp006_get_calibration_v0 {
3094 struct ec_params_tmp006_set_calibration_v0 {
3096 uint8_t reserved[3];
3104 struct ec_response_tmp006_get_calibration_v1 {
3107 uint8_t reserved[2];
3111 struct ec_params_tmp006_set_calibration_v1 {
3120 /* Read raw TMP006 data */
3121 #define EC_CMD_TMP006_GET_RAW 0x0055
3123 struct ec_params_tmp006_get_raw {
3127 struct ec_response_tmp006_get_raw {
3128 int32_t t; /* In 1/100 K */
3129 int32_t v; /* In nV */
3132 /*****************************************************************************/
3133 /* MKBP - Matrix KeyBoard Protocol */
3138 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
3139 * expected response size.
3141 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish
3142 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
3143 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
3145 #define EC_CMD_MKBP_STATE 0x0060
3148 * Provide information about various MKBP things. See enum ec_mkbp_info_type.
3150 #define EC_CMD_MKBP_INFO 0x0061
3152 struct ec_response_mkbp_info {
3155 /* Formerly "switches", which was 0. */
3159 struct ec_params_mkbp_info {
3164 enum ec_mkbp_info_type {
3166 * Info about the keyboard matrix: number of rows and columns.
3168 * Returns struct ec_response_mkbp_info.
3170 EC_MKBP_INFO_KBD = 0,
3173 * For buttons and switches, info about which specifically are
3174 * supported. event_type must be set to one of the values in enum
3177 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
3178 * bitmask indicating which buttons or switches are present. See the
3179 * bit inidices below.
3181 EC_MKBP_INFO_SUPPORTED = 1,
3184 * Instantaneous state of buttons and switches.
3186 * event_type must be set to one of the values in enum ec_mkbp_event.
3188 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
3189 * indicating the current state of the keyboard matrix.
3191 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
3194 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
3195 * state of supported buttons.
3197 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
3198 * state of supported switches.
3200 EC_MKBP_INFO_CURRENT = 2,
3203 /* Simulate key press */
3204 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3206 struct ec_params_mkbp_simulate_key {
3212 #define EC_CMD_GET_KEYBOARD_ID 0x0063
3214 struct ec_response_keyboard_id {
3215 uint32_t keyboard_id;
3219 KEYBOARD_ID_UNSUPPORTED = 0,
3220 KEYBOARD_ID_UNREADABLE = 0xffffffff,
3223 /* Configure keyboard scanning */
3224 #define EC_CMD_MKBP_SET_CONFIG 0x0064
3225 #define EC_CMD_MKBP_GET_CONFIG 0x0065
3228 enum mkbp_config_flags {
3229 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */
3232 enum mkbp_config_valid {
3233 EC_MKBP_VALID_SCAN_PERIOD = BIT(0),
3234 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1),
3235 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3),
3236 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4),
3237 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5),
3238 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6),
3239 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7),
3243 * Configuration for our key scanning algorithm.
3245 * Note that this is used as a sub-structure of
3246 * ec_{params/response}_mkbp_get_config.
3248 struct ec_mkbp_config {
3249 uint32_t valid_mask; /* valid fields */
3250 uint8_t flags; /* some flags (enum mkbp_config_flags) */
3251 uint8_t valid_flags; /* which flags are valid */
3252 uint16_t scan_period_us; /* period between start of scans */
3253 /* revert to interrupt mode after no activity for this long */
3254 uint32_t poll_timeout_us;
3256 * minimum post-scan relax time. Once we finish a scan we check
3257 * the time until we are due to start the next one. If this time is
3258 * shorter this field, we use this instead.
3260 uint16_t min_post_scan_delay_us;
3261 /* delay between setting up output and waiting for it to settle */
3262 uint16_t output_settle_us;
3263 uint16_t debounce_down_us; /* time for debounce on key down */
3264 uint16_t debounce_up_us; /* time for debounce on key up */
3265 /* maximum depth to allow for fifo (0 = no keyscan output) */
3266 uint8_t fifo_max_depth;
3269 struct ec_params_mkbp_set_config {
3270 struct ec_mkbp_config config;
3273 struct ec_response_mkbp_get_config {
3274 struct ec_mkbp_config config;
3277 /* Run the key scan emulation */
3278 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3280 enum ec_keyscan_seq_cmd {
3281 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */
3282 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */
3283 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */
3284 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */
3285 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */
3288 enum ec_collect_flags {
3290 * Indicates this scan was processed by the EC. Due to timing, some
3291 * scans may be skipped.
3293 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0),
3296 struct ec_collect_item {
3297 uint8_t flags; /* some flags (enum ec_collect_flags) */
3300 struct ec_params_keyscan_seq_ctrl {
3301 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */
3303 struct __ec_align1 {
3304 uint8_t active; /* still active */
3305 uint8_t num_items; /* number of items */
3306 /* Current item being presented */
3309 struct __ec_todo_unpacked {
3311 * Absolute time for this scan, measured from the
3312 * start of the sequence.
3315 uint8_t scan[0]; /* keyscan data */
3317 struct __ec_align1 {
3318 uint8_t start_item; /* First item to return */
3319 uint8_t num_items; /* Number of items to return */
3324 struct ec_result_keyscan_seq_ctrl {
3326 struct __ec_todo_unpacked {
3327 uint8_t num_items; /* Number of items */
3328 /* Data for each item */
3329 struct ec_collect_item item[0];
3335 * Get the next pending MKBP event.
3337 * Returns EC_RES_UNAVAILABLE if there is no event pending.
3339 #define EC_CMD_GET_NEXT_EVENT 0x0067
3341 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3344 * We use the most significant bit of the event type to indicate to the host
3345 * that the EC has more MKBP events available to provide.
3347 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3349 /* The mask to apply to get the raw event type */
3350 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3352 enum ec_mkbp_event {
3353 /* Keyboard matrix changed. The event data is the new matrix state. */
3354 EC_MKBP_EVENT_KEY_MATRIX = 0,
3356 /* New host event. The event data is 4 bytes of host event flags. */
3357 EC_MKBP_EVENT_HOST_EVENT = 1,
3359 /* New Sensor FIFO data. The event data is fifo_info structure. */
3360 EC_MKBP_EVENT_SENSOR_FIFO = 2,
3362 /* The state of the non-matrixed buttons have changed. */
3363 EC_MKBP_EVENT_BUTTON = 3,
3365 /* The state of the switches have changed. */
3366 EC_MKBP_EVENT_SWITCH = 4,
3368 /* New Fingerprint sensor event, the event data is fp_events bitmap. */
3369 EC_MKBP_EVENT_FINGERPRINT = 5,
3372 * Sysrq event: send emulated sysrq. The event data is sysrq,
3373 * corresponding to the key to be pressed.
3375 EC_MKBP_EVENT_SYSRQ = 6,
3378 * New 64-bit host event.
3379 * The event data is 8 bytes of host event flags.
3381 EC_MKBP_EVENT_HOST_EVENT64 = 7,
3383 /* Notify the AP that something happened on CEC */
3384 EC_MKBP_EVENT_CEC_EVENT = 8,
3386 /* Send an incoming CEC message to the AP */
3387 EC_MKBP_EVENT_CEC_MESSAGE = 9,
3389 /* Peripheral device charger event */
3390 EC_MKBP_EVENT_PCHG = 12,
3392 /* Number of MKBP events */
3393 EC_MKBP_EVENT_COUNT,
3395 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK);
3397 union __ec_align_offset1 ec_response_get_next_data {
3398 uint8_t key_matrix[13];
3401 uint32_t host_event;
3402 uint64_t host_event64;
3404 struct __ec_todo_unpacked {
3405 /* For aligning the fifo_info */
3406 uint8_t reserved[3];
3407 struct ec_response_motion_sense_fifo_info info;
3418 /* CEC events from enum mkbp_cec_event */
3419 uint32_t cec_events;
3422 union __ec_align_offset1 ec_response_get_next_data_v1 {
3423 uint8_t key_matrix[16];
3426 uint32_t host_event;
3427 uint64_t host_event64;
3429 struct __ec_todo_unpacked {
3430 /* For aligning the fifo_info */
3431 uint8_t reserved[3];
3432 struct ec_response_motion_sense_fifo_info info;
3443 /* CEC events from enum mkbp_cec_event */
3444 uint32_t cec_events;
3446 uint8_t cec_message[16];
3448 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16);
3450 struct ec_response_get_next_event {
3452 /* Followed by event data if any */
3453 union ec_response_get_next_data data;
3456 struct ec_response_get_next_event_v1 {
3458 /* Followed by event data if any */
3459 union ec_response_get_next_data_v1 data;
3462 /* Bit indices for buttons and switches.*/
3464 #define EC_MKBP_POWER_BUTTON 0
3465 #define EC_MKBP_VOL_UP 1
3466 #define EC_MKBP_VOL_DOWN 2
3467 #define EC_MKBP_RECOVERY 3
3470 #define EC_MKBP_LID_OPEN 0
3471 #define EC_MKBP_TABLET_MODE 1
3472 #define EC_MKBP_BASE_ATTACHED 2
3473 #define EC_MKBP_FRONT_PROXIMITY 3
3475 /* Run keyboard factory test scanning */
3476 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3478 struct ec_response_keyboard_factory_test {
3479 uint16_t shorted; /* Keyboard pins are shorted */
3482 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
3483 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3484 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F)
3485 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
3486 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \
3487 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
3488 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12
3489 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
3490 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \
3491 >> EC_MKBP_FP_MATCH_IDX_OFFSET)
3492 #define EC_MKBP_FP_ENROLL BIT(27)
3493 #define EC_MKBP_FP_MATCH BIT(28)
3494 #define EC_MKBP_FP_FINGER_DOWN BIT(29)
3495 #define EC_MKBP_FP_FINGER_UP BIT(30)
3496 #define EC_MKBP_FP_IMAGE_READY BIT(31)
3497 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */
3498 #define EC_MKBP_FP_ERR_ENROLL_OK 0
3499 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1
3500 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2
3501 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3
3502 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5
3503 /* Can be used to detect if image was usable for enrollment or not. */
3504 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1
3505 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */
3506 #define EC_MKBP_FP_ERR_MATCH_NO 0
3507 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6
3508 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7
3509 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2
3510 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4
3511 #define EC_MKBP_FP_ERR_MATCH_YES 1
3512 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3
3513 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
3516 /*****************************************************************************/
3517 /* Temperature sensor commands */
3519 /* Read temperature sensor info */
3520 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3522 struct ec_params_temp_sensor_get_info {
3526 struct ec_response_temp_sensor_get_info {
3527 char sensor_name[32];
3528 uint8_t sensor_type;
3531 /*****************************************************************************/
3534 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3535 * commands accidentally sent to the wrong interface. See the ACPI section
3539 /*****************************************************************************/
3540 /* Host event commands */
3543 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */
3545 * Host event mask params and response structures, shared by all of the host
3546 * event commands below.
3548 struct ec_params_host_event_mask {
3552 struct ec_response_host_event_mask {
3556 /* These all use ec_response_host_event_mask */
3557 #define EC_CMD_HOST_EVENT_GET_B 0x0087
3558 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
3559 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
3560 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3562 /* These all use ec_params_host_event_mask */
3563 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
3564 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
3565 #define EC_CMD_HOST_EVENT_CLEAR 0x008C
3566 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3567 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
3570 * Unified host event programming interface - Should be used by newer versions
3571 * of BIOS/OS to program host events and masks
3574 struct ec_params_host_event {
3576 /* Action requested by host - one of enum ec_host_event_action. */
3580 * Mask type that the host requested the action on - one of
3581 * enum ec_host_event_mask_type.
3585 /* Set to 0, ignore on read */
3588 /* Value to be used in case of set operations. */
3593 * Response structure returned by EC_CMD_HOST_EVENT.
3594 * Update the value on a GET request. Set to 0 on GET/CLEAR
3597 struct ec_response_host_event {
3599 /* Mask value in case of get operation */
3603 enum ec_host_event_action {
3605 * params.value is ignored. Value of mask_type populated
3610 /* Bits in params.value are set */
3613 /* Bits in params.value are cleared */
3614 EC_HOST_EVENT_CLEAR,
3617 enum ec_host_event_mask_type {
3619 /* Main host event copy */
3622 /* Copy B of host events */
3626 EC_HOST_EVENT_SCI_MASK,
3629 EC_HOST_EVENT_SMI_MASK,
3631 /* Mask of events that should be always reported in hostevents */
3632 EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3634 /* Active wake mask */
3635 EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3637 /* Lazy wake mask for S0ix */
3638 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3640 /* Lazy wake mask for S3 */
3641 EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3643 /* Lazy wake mask for S5 */
3644 EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3647 #define EC_CMD_HOST_EVENT 0x00A4
3649 /*****************************************************************************/
3650 /* Switch commands */
3652 /* Enable/disable LCD backlight */
3653 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3655 struct ec_params_switch_enable_backlight {
3659 /* Enable/disable WLAN/Bluetooth */
3660 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3661 #define EC_VER_SWITCH_ENABLE_WIRELESS 1
3663 /* Version 0 params; no response */
3664 struct ec_params_switch_enable_wireless_v0 {
3668 /* Version 1 params */
3669 struct ec_params_switch_enable_wireless_v1 {
3670 /* Flags to enable now */
3673 /* Which flags to copy from now_flags */
3677 * Flags to leave enabled in S3, if they're on at the S0->S3
3678 * transition. (Other flags will be disabled by the S0->S3
3681 uint8_t suspend_flags;
3683 /* Which flags to copy from suspend_flags */
3684 uint8_t suspend_mask;
3687 /* Version 1 response */
3688 struct ec_response_switch_enable_wireless_v1 {
3689 /* Flags to enable now */
3692 /* Flags to leave enabled in S3 */
3693 uint8_t suspend_flags;
3696 /*****************************************************************************/
3697 /* GPIO commands. Only available on EC if write protect has been disabled. */
3699 /* Set GPIO output value */
3700 #define EC_CMD_GPIO_SET 0x0092
3702 struct ec_params_gpio_set {
3707 /* Get GPIO value */
3708 #define EC_CMD_GPIO_GET 0x0093
3710 /* Version 0 of input params and response */
3711 struct ec_params_gpio_get {
3715 struct ec_response_gpio_get {
3719 /* Version 1 of input params and response */
3720 struct ec_params_gpio_get_v1 {
3723 struct __ec_align1 {
3725 } get_value_by_name;
3726 struct __ec_align1 {
3732 struct ec_response_gpio_get_v1 {
3734 struct __ec_align1 {
3736 } get_value_by_name, get_count;
3737 struct __ec_todo_unpacked {
3745 enum gpio_get_subcmd {
3746 EC_GPIO_GET_BY_NAME = 0,
3747 EC_GPIO_GET_COUNT = 1,
3748 EC_GPIO_GET_INFO = 2,
3751 /*****************************************************************************/
3752 /* I2C commands. Only available when flash write protect is unlocked. */
3755 * CAUTION: These commands are deprecated, and are not supported anymore in EC
3756 * builds >= 8398.0.0 (see crosbug.com/p/23570).
3758 * Use EC_CMD_I2C_PASSTHRU instead.
3762 #define EC_CMD_I2C_READ 0x0094
3764 struct ec_params_i2c_read {
3765 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3766 uint8_t read_size; /* Either 8 or 16. */
3771 struct ec_response_i2c_read {
3776 #define EC_CMD_I2C_WRITE 0x0095
3778 struct ec_params_i2c_write {
3780 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3781 uint8_t write_size; /* Either 8 or 16. */
3786 /*****************************************************************************/
3787 /* Charge state commands. Only available when flash write protect unlocked. */
3789 /* Force charge state machine to stop charging the battery or force it to
3790 * discharge the battery.
3792 #define EC_CMD_CHARGE_CONTROL 0x0096
3793 #define EC_VER_CHARGE_CONTROL 1
3795 enum ec_charge_control_mode {
3796 CHARGE_CONTROL_NORMAL = 0,
3797 CHARGE_CONTROL_IDLE,
3798 CHARGE_CONTROL_DISCHARGE,
3801 struct ec_params_charge_control {
3802 uint32_t mode; /* enum charge_control_mode */
3805 /*****************************************************************************/
3807 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
3808 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3811 * Read data from the saved snapshot. If the subcmd parameter is
3812 * CONSOLE_READ_NEXT, this will return data starting from the beginning of
3813 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
3814 * end of the previous snapshot.
3816 * The params are only looked at in version >= 1 of this command. Prior
3817 * versions will just default to CONSOLE_READ_NEXT behavior.
3819 * Response is null-terminated string. Empty string, if there is no more
3822 #define EC_CMD_CONSOLE_READ 0x0098
3824 enum ec_console_read_subcmd {
3825 CONSOLE_READ_NEXT = 0,
3829 struct ec_params_console_read_v1 {
3830 uint8_t subcmd; /* enum ec_console_read_subcmd */
3833 /*****************************************************************************/
3836 * Cut off battery power immediately or after the host has shut down.
3838 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
3839 * EC_RES_SUCCESS if the command was successful.
3840 * EC_RES_ERROR if the cut off command failed.
3842 #define EC_CMD_BATTERY_CUT_OFF 0x0099
3844 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)
3846 struct ec_params_battery_cutoff {
3850 /*****************************************************************************/
3851 /* USB port mux control. */
3854 * Switch USB mux or return to automatic switching.
3856 #define EC_CMD_USB_MUX 0x009A
3858 struct ec_params_usb_mux {
3862 /*****************************************************************************/
3863 /* LDOs / FETs control. */
3866 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
3867 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */
3871 * Switch on/off a LDO.
3873 #define EC_CMD_LDO_SET 0x009B
3875 struct ec_params_ldo_set {
3883 #define EC_CMD_LDO_GET 0x009C
3885 struct ec_params_ldo_get {
3889 struct ec_response_ldo_get {
3893 /*****************************************************************************/
3899 #define EC_CMD_POWER_INFO 0x009D
3901 struct ec_response_power_info {
3902 uint32_t usb_dev_type;
3903 uint16_t voltage_ac;
3904 uint16_t voltage_system;
3905 uint16_t current_system;
3906 uint16_t usb_current_limit;
3909 /*****************************************************************************/
3910 /* I2C passthru command */
3912 #define EC_CMD_I2C_PASSTHRU 0x009E
3914 /* Read data; if not present, message is a write */
3915 #define EC_I2C_FLAG_READ BIT(15)
3917 /* Mask for address */
3918 #define EC_I2C_ADDR_MASK 0x3ff
3920 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */
3921 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */
3924 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3926 struct ec_params_i2c_passthru_msg {
3927 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */
3928 uint16_t len; /* Number of bytes to read or write */
3931 struct ec_params_i2c_passthru {
3932 uint8_t port; /* I2C port number */
3933 uint8_t num_msgs; /* Number of messages */
3934 struct ec_params_i2c_passthru_msg msg[];
3935 /* Data to write for all messages is concatenated here */
3938 struct ec_response_i2c_passthru {
3939 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */
3940 uint8_t num_msgs; /* Number of messages processed */
3941 uint8_t data[]; /* Data read by messages concatenated here */
3944 /*****************************************************************************/
3945 /* Power button hang detect */
3947 #define EC_CMD_HANG_DETECT 0x009F
3949 /* Reasons to start hang detection timer */
3950 /* Power button pressed */
3951 #define EC_HANG_START_ON_POWER_PRESS BIT(0)
3954 #define EC_HANG_START_ON_LID_CLOSE BIT(1)
3957 #define EC_HANG_START_ON_LID_OPEN BIT(2)
3959 /* Start of AP S3->S0 transition (booting or resuming from suspend) */
3960 #define EC_HANG_START_ON_RESUME BIT(3)
3962 /* Reasons to cancel hang detection */
3964 /* Power button released */
3965 #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8)
3967 /* Any host command from AP received */
3968 #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9)
3970 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */
3971 #define EC_HANG_STOP_ON_SUSPEND BIT(10)
3974 * If this flag is set, all the other fields are ignored, and the hang detect
3975 * timer is started. This provides the AP a way to start the hang timer
3976 * without reconfiguring any of the other hang detect settings. Note that
3977 * you must previously have configured the timeouts.
3979 #define EC_HANG_START_NOW BIT(30)
3982 * If this flag is set, all the other fields are ignored (including
3983 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer
3984 * without reconfiguring any of the other hang detect settings.
3986 #define EC_HANG_STOP_NOW BIT(31)
3988 struct ec_params_hang_detect {
3989 /* Flags; see EC_HANG_* */
3992 /* Timeout in msec before generating host event, if enabled */
3993 uint16_t host_event_timeout_msec;
3995 /* Timeout in msec before generating warm reboot, if enabled */
3996 uint16_t warm_reboot_timeout_msec;
3999 /*****************************************************************************/
4000 /* Commands for battery charging */
4003 * This is the single catch-all host command to exchange data regarding the
4004 * charge state machine (v2 and up).
4006 #define EC_CMD_CHARGE_STATE 0x00A0
4008 /* Subcommands for this host command */
4009 enum charge_state_command {
4010 CHARGE_STATE_CMD_GET_STATE,
4011 CHARGE_STATE_CMD_GET_PARAM,
4012 CHARGE_STATE_CMD_SET_PARAM,
4013 CHARGE_STATE_NUM_CMDS
4017 * Known param numbers are defined here. Ranges are reserved for board-specific
4018 * params, which are handled by the particular implementations.
4020 enum charge_state_params {
4021 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */
4022 CS_PARAM_CHG_CURRENT, /* charger current limit */
4023 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */
4024 CS_PARAM_CHG_STATUS, /* charger-specific status */
4025 CS_PARAM_CHG_OPTION, /* charger-specific options */
4026 CS_PARAM_LIMIT_POWER, /*
4027 * Check if power is limited due to
4028 * low battery and / or a weak external
4029 * charger. READ ONLY.
4031 /* How many so far? */
4034 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
4035 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
4036 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
4038 /* Range for CONFIG_CHARGE_STATE_DEBUG params */
4039 CS_PARAM_DEBUG_MIN = 0x20000,
4040 CS_PARAM_DEBUG_CTL_MODE = 0x20000,
4041 CS_PARAM_DEBUG_MANUAL_MODE,
4042 CS_PARAM_DEBUG_SEEMS_DEAD,
4043 CS_PARAM_DEBUG_SEEMS_DISCONNECTED,
4044 CS_PARAM_DEBUG_BATT_REMOVED,
4045 CS_PARAM_DEBUG_MANUAL_CURRENT,
4046 CS_PARAM_DEBUG_MANUAL_VOLTAGE,
4047 CS_PARAM_DEBUG_MAX = 0x2ffff,
4049 /* Other custom param ranges go here... */
4052 struct ec_params_charge_state {
4053 uint8_t cmd; /* enum charge_state_command */
4055 /* get_state has no args */
4057 struct __ec_todo_unpacked {
4058 uint32_t param; /* enum charge_state_param */
4061 struct __ec_todo_unpacked {
4062 uint32_t param; /* param to set */
4063 uint32_t value; /* value to set */
4068 struct ec_response_charge_state {
4070 struct __ec_align4 {
4074 int chg_input_current;
4075 int batt_state_of_charge;
4078 struct __ec_align4 {
4082 /* set_param returns no args */
4088 * Set maximum battery charging current.
4090 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4092 struct ec_params_current_limit {
4093 uint32_t limit; /* in mA */
4097 * Set maximum external voltage / current.
4099 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4101 /* Command v0 is used only on Spring and is obsolete + unsupported */
4102 struct ec_params_external_power_limit_v1 {
4103 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
4104 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
4107 #define EC_POWER_LIMIT_NONE 0xffff
4110 * Set maximum voltage & current of a dedicated charge port
4112 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4114 struct ec_params_dedicated_charger_limit {
4115 uint16_t current_lim; /* in mA */
4116 uint16_t voltage_lim; /* in mV */
4119 /*****************************************************************************/
4120 /* Hibernate/Deep Sleep Commands */
4122 /* Set the delay before going into hibernation. */
4123 #define EC_CMD_HIBERNATION_DELAY 0x00A8
4125 struct ec_params_hibernation_delay {
4127 * Seconds to wait in G3 before hibernate. Pass in 0 to read the
4128 * current settings without changing them.
4133 struct ec_response_hibernation_delay {
4135 * The current time in seconds in which the system has been in the G3
4136 * state. This value is reset if the EC transitions out of G3.
4141 * The current time remaining in seconds until the EC should hibernate.
4142 * This value is also reset if the EC transitions out of G3.
4144 uint32_t time_remaining;
4147 * The current time in seconds that the EC should wait in G3 before
4150 uint32_t hibernate_delay;
4153 /* Inform the EC when entering a sleep state */
4154 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4156 enum host_sleep_event {
4157 HOST_SLEEP_EVENT_S3_SUSPEND = 1,
4158 HOST_SLEEP_EVENT_S3_RESUME = 2,
4159 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
4160 HOST_SLEEP_EVENT_S0IX_RESUME = 4,
4161 /* S3 suspend with additional enabled wake sources */
4162 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5,
4165 struct ec_params_host_sleep_event {
4166 uint8_t sleep_event;
4170 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep
4171 * transition failures
4173 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4175 /* Disable timeout detection for this sleep transition */
4176 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4178 struct ec_params_host_sleep_event_v1 {
4179 /* The type of sleep being entered or exited. */
4180 uint8_t sleep_event;
4185 /* Parameters that apply for suspend messages. */
4188 * The timeout in milliseconds between when this message
4189 * is received and when the EC will declare sleep
4190 * transition failure if the sleep signal is not
4193 uint16_t sleep_timeout_ms;
4196 /* No parameters for non-suspend messages. */
4200 /* A timeout occurred when this bit is set */
4201 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4204 * The mask defining which bits correspond to the number of sleep transitions,
4205 * as well as the maximum number of suspend line transitions that will be
4206 * reported back to the host.
4208 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4210 struct ec_response_host_sleep_event_v1 {
4212 /* Response fields that apply for resume messages. */
4215 * The number of sleep power signal transitions that
4216 * occurred since the suspend message. The high bit
4217 * indicates a timeout occurred.
4219 uint32_t sleep_transitions;
4222 /* No response fields for non-resume messages. */
4226 /*****************************************************************************/
4228 #define EC_CMD_DEVICE_EVENT 0x00AA
4230 enum ec_device_event {
4231 EC_DEVICE_EVENT_TRACKPAD,
4232 EC_DEVICE_EVENT_DSP,
4233 EC_DEVICE_EVENT_WIFI,
4234 EC_DEVICE_EVENT_WLC,
4237 enum ec_device_event_param {
4238 /* Get and clear pending device events */
4239 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
4240 /* Get device event mask */
4241 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
4242 /* Set device event mask */
4243 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
4246 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
4248 struct ec_params_device_event {
4249 uint32_t event_mask;
4253 struct ec_response_device_event {
4254 uint32_t event_mask;
4257 /*****************************************************************************/
4258 /* Smart battery pass-through */
4260 /* Get / Set 16-bit smart battery registers */
4261 #define EC_CMD_SB_READ_WORD 0x00B0
4262 #define EC_CMD_SB_WRITE_WORD 0x00B1
4264 /* Get / Set string smart battery parameters
4265 * formatted as SMBUS "block".
4267 #define EC_CMD_SB_READ_BLOCK 0x00B2
4268 #define EC_CMD_SB_WRITE_BLOCK 0x00B3
4270 struct ec_params_sb_rd {
4274 struct ec_response_sb_rd_word {
4278 struct ec_params_sb_wr_word {
4283 struct ec_response_sb_rd_block {
4287 struct ec_params_sb_wr_block {
4292 /*****************************************************************************/
4293 /* Battery vendor parameters
4295 * Get or set vendor-specific parameters in the battery. Implementations may
4296 * differ between boards or batteries. On a set operation, the response
4297 * contains the actual value set, which may be rounded or clipped from the
4301 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
4303 enum ec_battery_vendor_param_mode {
4304 BATTERY_VENDOR_PARAM_MODE_GET = 0,
4305 BATTERY_VENDOR_PARAM_MODE_SET,
4308 struct ec_params_battery_vendor_param {
4314 struct ec_response_battery_vendor_param {
4318 /*****************************************************************************/
4320 * Smart Battery Firmware Update Commands
4322 #define EC_CMD_SB_FW_UPDATE 0x00B5
4324 enum ec_sb_fw_update_subcmd {
4325 EC_SB_FW_UPDATE_PREPARE = 0x0,
4326 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */
4327 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */
4328 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */
4329 EC_SB_FW_UPDATE_END = 0x4,
4330 EC_SB_FW_UPDATE_STATUS = 0x5,
4331 EC_SB_FW_UPDATE_PROTECT = 0x6,
4332 EC_SB_FW_UPDATE_MAX = 0x7,
4335 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
4336 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2
4337 #define SB_FW_UPDATE_CMD_INFO_SIZE 8
4339 struct ec_sb_fw_update_header {
4340 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */
4341 uint16_t fw_id; /* firmware id */
4344 struct ec_params_sb_fw_update {
4345 struct ec_sb_fw_update_header hdr;
4347 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */
4348 /* EC_SB_FW_UPDATE_INFO = 0x1 */
4349 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */
4350 /* EC_SB_FW_UPDATE_END = 0x4 */
4351 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
4352 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */
4353 /* Those have no args */
4355 /* EC_SB_FW_UPDATE_WRITE = 0x3 */
4356 struct __ec_align4 {
4357 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
4362 struct ec_response_sb_fw_update {
4364 /* EC_SB_FW_UPDATE_INFO = 0x1 */
4365 struct __ec_align1 {
4366 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
4369 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
4370 struct __ec_align1 {
4371 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
4377 * Entering Verified Boot Mode Command
4378 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
4379 * Valid Modes are: normal, developer, and recovery.
4381 #define EC_CMD_ENTERING_MODE 0x00B6
4383 struct ec_params_entering_mode {
4387 #define VBOOT_MODE_NORMAL 0
4388 #define VBOOT_MODE_DEVELOPER 1
4389 #define VBOOT_MODE_RECOVERY 2
4391 /*****************************************************************************/
4393 * I2C passthru protection command: Protects I2C tunnels against access on
4394 * certain addresses (board-specific).
4396 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
4398 enum ec_i2c_passthru_protect_subcmd {
4399 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
4400 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
4403 struct ec_params_i2c_passthru_protect {
4405 uint8_t port; /* I2C port number */
4408 struct ec_response_i2c_passthru_protect {
4409 uint8_t status; /* Status flags (0: unlocked, 1: locked) */
4413 /*****************************************************************************/
4417 * These commands are for sending and receiving message via HDMI CEC
4420 #define MAX_CEC_MSG_LEN 16
4422 /* CEC message from the AP to be written on the CEC bus */
4423 #define EC_CMD_CEC_WRITE_MSG 0x00B8
4426 * struct ec_params_cec_write - Message to write to the CEC bus
4427 * @msg: message content to write to the CEC bus
4429 struct ec_params_cec_write {
4430 uint8_t msg[MAX_CEC_MSG_LEN];
4433 /* Set various CEC parameters */
4434 #define EC_CMD_CEC_SET 0x00BA
4437 * struct ec_params_cec_set - CEC parameters set
4438 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4439 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
4440 * or 1 to enable CEC functionality, in case cmd is
4441 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical
4442 * address between 0 and 15 or 0xff to unregister
4444 struct ec_params_cec_set {
4445 uint8_t cmd; /* enum cec_command */
4449 /* Read various CEC parameters */
4450 #define EC_CMD_CEC_GET 0x00BB
4453 * struct ec_params_cec_get - CEC parameters get
4454 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4456 struct ec_params_cec_get {
4457 uint8_t cmd; /* enum cec_command */
4461 * struct ec_response_cec_get - CEC parameters get response
4462 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
4463 * disabled or 1 if CEC functionality is enabled,
4464 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the
4465 * configured logical address between 0 and 15 or 0xff if unregistered
4467 struct ec_response_cec_get {
4471 /* CEC parameters command */
4473 /* CEC reading, writing and events enable */
4475 /* CEC logical address */
4476 CEC_CMD_LOGICAL_ADDRESS,
4479 /* Events from CEC to AP */
4480 enum mkbp_cec_event {
4481 /* Outgoing message was acknowledged by a follower */
4482 EC_MKBP_CEC_SEND_OK = BIT(0),
4483 /* Outgoing message was not acknowledged */
4484 EC_MKBP_CEC_SEND_FAILED = BIT(1),
4487 /*****************************************************************************/
4489 /* Commands for audio codec. */
4490 #define EC_CMD_EC_CODEC 0x00BC
4492 enum ec_codec_subcmd {
4493 EC_CODEC_GET_CAPABILITIES = 0x0,
4494 EC_CODEC_GET_SHM_ADDR = 0x1,
4495 EC_CODEC_SET_SHM_ADDR = 0x2,
4496 EC_CODEC_SUBCMD_COUNT,
4500 EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
4501 EC_CODEC_CAP_WOV_LANG_SHM = 1,
4502 EC_CODEC_CAP_LAST = 32,
4505 enum ec_codec_shm_id {
4506 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
4507 EC_CODEC_SHM_ID_WOV_LANG = 0x1,
4508 EC_CODEC_SHM_ID_LAST,
4511 enum ec_codec_shm_type {
4512 EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
4513 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
4516 struct __ec_align1 ec_param_ec_codec_get_shm_addr {
4518 uint8_t reserved[3];
4521 struct __ec_align4 ec_param_ec_codec_set_shm_addr {
4525 uint8_t reserved[3];
4528 struct __ec_align4 ec_param_ec_codec {
4529 uint8_t cmd; /* enum ec_codec_subcmd */
4530 uint8_t reserved[3];
4533 struct ec_param_ec_codec_get_shm_addr
4535 struct ec_param_ec_codec_set_shm_addr
4540 struct __ec_align4 ec_response_ec_codec_get_capabilities {
4541 uint32_t capabilities;
4544 struct __ec_align4 ec_response_ec_codec_get_shm_addr {
4548 uint8_t reserved[3];
4551 /*****************************************************************************/
4553 /* Commands for DMIC on audio codec. */
4554 #define EC_CMD_EC_CODEC_DMIC 0x00BD
4556 enum ec_codec_dmic_subcmd {
4557 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
4558 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
4559 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
4560 EC_CODEC_DMIC_SUBCMD_COUNT,
4563 enum ec_codec_dmic_channel {
4564 EC_CODEC_DMIC_CHANNEL_0 = 0x0,
4565 EC_CODEC_DMIC_CHANNEL_1 = 0x1,
4566 EC_CODEC_DMIC_CHANNEL_2 = 0x2,
4567 EC_CODEC_DMIC_CHANNEL_3 = 0x3,
4568 EC_CODEC_DMIC_CHANNEL_4 = 0x4,
4569 EC_CODEC_DMIC_CHANNEL_5 = 0x5,
4570 EC_CODEC_DMIC_CHANNEL_6 = 0x6,
4571 EC_CODEC_DMIC_CHANNEL_7 = 0x7,
4572 EC_CODEC_DMIC_CHANNEL_COUNT,
4575 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
4576 uint8_t channel; /* enum ec_codec_dmic_channel */
4578 uint8_t reserved[2];
4581 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
4582 uint8_t channel; /* enum ec_codec_dmic_channel */
4583 uint8_t reserved[3];
4586 struct __ec_align4 ec_param_ec_codec_dmic {
4587 uint8_t cmd; /* enum ec_codec_dmic_subcmd */
4588 uint8_t reserved[3];
4591 struct ec_param_ec_codec_dmic_set_gain_idx
4593 struct ec_param_ec_codec_dmic_get_gain_idx
4598 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
4602 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
4606 /*****************************************************************************/
4608 /* Commands for I2S RX on audio codec. */
4610 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE
4612 enum ec_codec_i2s_rx_subcmd {
4613 EC_CODEC_I2S_RX_ENABLE = 0x0,
4614 EC_CODEC_I2S_RX_DISABLE = 0x1,
4615 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
4616 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
4617 EC_CODEC_I2S_RX_SET_BCLK = 0x4,
4618 EC_CODEC_I2S_RX_RESET = 0x5,
4619 EC_CODEC_I2S_RX_SUBCMD_COUNT,
4622 enum ec_codec_i2s_rx_sample_depth {
4623 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
4624 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
4625 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
4628 enum ec_codec_i2s_rx_daifmt {
4629 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
4630 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
4631 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
4632 EC_CODEC_I2S_RX_DAIFMT_COUNT,
4635 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
4637 uint8_t reserved[3];
4640 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
4643 uint8_t reserved[2];
4646 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
4648 uint8_t reserved[3];
4651 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
4655 struct __ec_align4 ec_param_ec_codec_i2s_rx {
4656 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */
4657 uint8_t reserved[3];
4660 struct ec_param_ec_codec_i2s_rx_set_sample_depth
4661 set_sample_depth_param;
4662 struct ec_param_ec_codec_i2s_rx_set_daifmt
4664 struct ec_param_ec_codec_i2s_rx_set_bclk
4669 /*****************************************************************************/
4670 /* Commands for WoV on audio codec. */
4672 #define EC_CMD_EC_CODEC_WOV 0x00BF
4674 enum ec_codec_wov_subcmd {
4675 EC_CODEC_WOV_SET_LANG = 0x0,
4676 EC_CODEC_WOV_SET_LANG_SHM = 0x1,
4677 EC_CODEC_WOV_GET_LANG = 0x2,
4678 EC_CODEC_WOV_ENABLE = 0x3,
4679 EC_CODEC_WOV_DISABLE = 0x4,
4680 EC_CODEC_WOV_READ_AUDIO = 0x5,
4681 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
4682 EC_CODEC_WOV_SUBCMD_COUNT,
4686 * @hash is SHA256 of the whole language model.
4687 * @total_len indicates the length of whole language model.
4688 * @offset is the cursor from the beginning of the model.
4689 * @buf is the packet buffer.
4690 * @len denotes how many bytes in the buf.
4692 struct __ec_align4 ec_param_ec_codec_wov_set_lang {
4700 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
4705 struct __ec_align4 ec_param_ec_codec_wov {
4706 uint8_t cmd; /* enum ec_codec_wov_subcmd */
4707 uint8_t reserved[3];
4710 struct ec_param_ec_codec_wov_set_lang
4712 struct ec_param_ec_codec_wov_set_lang_shm
4717 struct __ec_align4 ec_response_ec_codec_wov_get_lang {
4721 struct __ec_align4 ec_response_ec_codec_wov_read_audio {
4726 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
4731 /*****************************************************************************/
4732 /* System commands */
4735 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
4736 * necessarily reboot the EC. Rename to "image" or something similar?
4738 #define EC_CMD_REBOOT_EC 0x00D2
4741 enum ec_reboot_cmd {
4742 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */
4743 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */
4744 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */
4745 /* (command 3 was jump to RW-B) */
4746 EC_REBOOT_COLD = 4, /* Cold-reboot */
4747 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */
4748 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */
4749 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */
4750 EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */
4753 /* Flags for ec_params_reboot_ec.reboot_flags */
4754 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */
4755 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */
4756 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */
4758 struct ec_params_reboot_ec {
4759 uint8_t cmd; /* enum ec_reboot_cmd */
4760 uint8_t flags; /* See EC_REBOOT_FLAG_* */
4764 * Get information on last EC panic.
4766 * Returns variable-length platform-dependent panic information. See panic.h
4769 #define EC_CMD_GET_PANIC_INFO 0x00D3
4771 /*****************************************************************************/
4775 * These do not follow the normal rules for commands. See each command for
4782 * This command will work even when the EC LPC interface is busy, because the
4783 * reboot command is processed at interrupt level. Note that when the EC
4784 * reboots, the host will reboot too, so there is no response to this command.
4786 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
4788 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */
4791 * Resend last response (not supported on LPC).
4793 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
4794 * there was no previous command, or the previous command's response was too
4797 #define EC_CMD_RESEND_RESPONSE 0x00DB
4800 * This header byte on a command indicate version 0. Any header byte less
4801 * than this means that we are talking to an old EC which doesn't support
4802 * versioning. In that case, we assume version 0.
4804 * Header bytes greater than this indicate a later version. For example,
4805 * EC_CMD_VERSION0 + 1 means we are using version 1.
4807 * The old EC interface must not use commands 0xdc or higher.
4809 #define EC_CMD_VERSION0 0x00DC
4811 /*****************************************************************************/
4815 * These commands are for PD MCU communication.
4818 /* EC to PD MCU exchange status command */
4819 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100
4820 #define EC_VER_PD_EXCHANGE_STATUS 2
4822 enum pd_charge_state {
4823 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
4824 PD_CHARGE_NONE, /* No charging allowed */
4825 PD_CHARGE_5V, /* 5V charging only */
4826 PD_CHARGE_MAX /* Charge at max voltage */
4829 /* Status of EC being sent to PD */
4830 #define EC_STATUS_HIBERNATING BIT(0)
4832 struct ec_params_pd_status {
4833 uint8_t status; /* EC status */
4834 int8_t batt_soc; /* battery state of charge */
4835 uint8_t charge_state; /* charging state (from enum pd_charge_state) */
4838 /* Status of PD being sent back to EC */
4839 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */
4840 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */
4841 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */
4842 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */
4843 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */
4844 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */
4845 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */
4846 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \
4847 PD_STATUS_TCPC_ALERT_1 | \
4848 PD_STATUS_HOST_EVENT)
4849 struct ec_response_pd_status {
4850 uint32_t curr_lim_ma; /* input current limit */
4851 uint16_t status; /* PD MCU status */
4852 int8_t active_charge_port; /* active charging port */
4855 /* AP to PD MCU host event status command, cleared on read */
4856 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
4858 /* PD MCU host event status bits */
4859 #define PD_EVENT_UPDATE_DEVICE BIT(0)
4860 #define PD_EVENT_POWER_CHANGE BIT(1)
4861 #define PD_EVENT_IDENTITY_RECEIVED BIT(2)
4862 #define PD_EVENT_DATA_SWAP BIT(3)
4863 struct ec_response_host_event_status {
4864 uint32_t status; /* PD MCU host event status */
4867 /* Set USB type-C port role and muxes */
4868 #define EC_CMD_USB_PD_CONTROL 0x0101
4870 enum usb_pd_control_role {
4871 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
4872 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
4873 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
4874 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
4875 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
4876 USB_PD_CTRL_ROLE_FREEZE = 5,
4877 USB_PD_CTRL_ROLE_COUNT
4880 enum usb_pd_control_mux {
4881 USB_PD_CTRL_MUX_NO_CHANGE = 0,
4882 USB_PD_CTRL_MUX_NONE = 1,
4883 USB_PD_CTRL_MUX_USB = 2,
4884 USB_PD_CTRL_MUX_DP = 3,
4885 USB_PD_CTRL_MUX_DOCK = 4,
4886 USB_PD_CTRL_MUX_AUTO = 5,
4887 USB_PD_CTRL_MUX_COUNT
4890 enum usb_pd_control_swap {
4891 USB_PD_CTRL_SWAP_NONE = 0,
4892 USB_PD_CTRL_SWAP_DATA = 1,
4893 USB_PD_CTRL_SWAP_POWER = 2,
4894 USB_PD_CTRL_SWAP_VCONN = 3,
4895 USB_PD_CTRL_SWAP_COUNT
4898 struct ec_params_usb_pd_control {
4905 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */
4906 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */
4907 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */
4909 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */
4910 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */
4911 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */
4912 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */
4913 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */
4914 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */
4915 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */
4917 struct ec_response_usb_pd_control {
4924 struct ec_response_usb_pd_control_v1 {
4931 /* Values representing usbc PD CC state */
4932 #define USBC_PD_CC_NONE 0 /* No accessory connected */
4933 #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */
4934 #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */
4935 #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */
4936 #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */
4937 #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */
4939 /* Active/Passive Cable */
4940 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
4941 /* Optical/Non-optical cable */
4942 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
4943 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
4944 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
4945 /* Active Link Uni-Direction */
4946 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
4948 struct ec_response_usb_pd_control_v2 {
4953 uint8_t cc_state; /* enum pd_cc_states representing cc state */
4954 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
4955 uint8_t reserved; /* Reserved for future use */
4956 uint8_t control_flags; /* USB_PD_CTRL_*flags */
4957 uint8_t cable_speed; /* TBT_SS_* cable speed */
4958 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */
4961 #define EC_CMD_USB_PD_PORTS 0x0102
4963 /* Maximum number of PD ports on a device, num_ports will be <= this */
4964 #define EC_USB_PD_MAX_PORTS 8
4966 struct ec_response_usb_pd_ports {
4970 #define EC_CMD_USB_PD_POWER_INFO 0x0103
4972 #define PD_POWER_CHARGING_PORT 0xff
4973 struct ec_params_usb_pd_power_info {
4981 USB_CHG_TYPE_PROPRIETARY,
4982 USB_CHG_TYPE_BC12_DCP,
4983 USB_CHG_TYPE_BC12_CDP,
4984 USB_CHG_TYPE_BC12_SDP,
4987 USB_CHG_TYPE_UNKNOWN,
4988 USB_CHG_TYPE_DEDICATED,
4990 enum usb_power_roles {
4991 USB_PD_PORT_POWER_DISCONNECTED,
4992 USB_PD_PORT_POWER_SOURCE,
4993 USB_PD_PORT_POWER_SINK,
4994 USB_PD_PORT_POWER_SINK_NOT_CHARGING,
4997 struct usb_chg_measures {
4998 uint16_t voltage_max;
4999 uint16_t voltage_now;
5000 uint16_t current_max;
5001 uint16_t current_lim;
5004 struct ec_response_usb_pd_power_info {
5009 struct usb_chg_measures meas;
5015 * This command will return the number of USB PD charge port + the number
5016 * of dedicated port present.
5017 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports
5019 #define EC_CMD_CHARGE_PORT_COUNT 0x0105
5020 struct ec_response_charge_port_count {
5024 /* Write USB-PD device FW */
5025 #define EC_CMD_USB_PD_FW_UPDATE 0x0110
5027 enum usb_pd_fw_update_cmds {
5029 USB_PD_FW_FLASH_ERASE,
5030 USB_PD_FW_FLASH_WRITE,
5031 USB_PD_FW_ERASE_SIG,
5034 struct ec_params_usb_pd_fw_update {
5038 uint32_t size; /* Size to write in bytes */
5039 /* Followed by data to write */
5042 /* Write USB-PD Accessory RW_HASH table entry */
5043 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5044 /* RW hash is first 20 bytes of SHA-256 of RW section */
5045 #define PD_RW_HASH_SIZE 20
5046 struct ec_params_usb_pd_rw_hash_entry {
5048 uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
5049 uint8_t reserved; /*
5050 * For alignment of current_image
5051 * TODO(rspangler) but it's not aligned!
5052 * Should have been reserved[2].
5054 uint32_t current_image; /* One of ec_current_image */
5057 /* Read USB-PD Accessory info */
5058 #define EC_CMD_USB_PD_DEV_INFO 0x0112
5060 struct ec_params_usb_pd_info_request {
5064 /* Read USB-PD Device discovery info */
5065 #define EC_CMD_USB_PD_DISCOVERY 0x0113
5066 struct ec_params_usb_pd_discovery_entry {
5067 uint16_t vid; /* USB-IF VID */
5068 uint16_t pid; /* USB-IF PID */
5069 uint8_t ptype; /* product type (hub,periph,cable,ama) */
5072 /* Override default charge behavior */
5073 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5075 /* Negative port parameters have special meaning */
5076 enum usb_pd_override_ports {
5077 OVERRIDE_DONT_CHARGE = -2,
5079 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
5082 struct ec_params_charge_port_override {
5083 int16_t override_port; /* Override port# */
5087 * Read (and delete) one entry of PD event log.
5088 * TODO(crbug.com/751742): Make this host command more generic to accommodate
5089 * future non-PD logs that use the same internal EC event_log.
5091 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5093 struct ec_response_pd_log {
5094 uint32_t timestamp; /* relative timestamp in milliseconds */
5095 uint8_t type; /* event type : see PD_EVENT_xx below */
5096 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */
5097 uint16_t data; /* type-defined data payload */
5098 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */
5101 /* The timestamp is the microsecond counter shifted to get about a ms. */
5102 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
5104 #define PD_LOG_SIZE_MASK 0x1f
5105 #define PD_LOG_PORT_MASK 0xe0
5106 #define PD_LOG_PORT_SHIFT 5
5107 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
5108 ((size) & PD_LOG_SIZE_MASK))
5109 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
5110 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
5112 /* PD event log : entry types */
5114 #define PD_EVENT_MCU_BASE 0x00
5115 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
5116 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
5117 /* Reserved for custom board event */
5118 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
5119 /* PD generic accessory events */
5120 #define PD_EVENT_ACC_BASE 0x20
5121 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
5122 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
5123 /* PD power supply events */
5124 #define PD_EVENT_PS_BASE 0x40
5125 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
5126 /* PD video dongles events */
5127 #define PD_EVENT_VIDEO_BASE 0x60
5128 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
5129 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
5130 /* Returned in the "type" field, when there is no entry available */
5131 #define PD_EVENT_NO_ENTRY 0xff
5134 * PD_EVENT_MCU_CHARGE event definition :
5135 * the payload is "struct usb_chg_measures"
5136 * the data field contains the port state flags as defined below :
5138 /* Port partner is a dual role device */
5139 #define CHARGE_FLAGS_DUAL_ROLE BIT(15)
5140 /* Port is the pending override port */
5141 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)
5142 /* Port is the override port */
5143 #define CHARGE_FLAGS_OVERRIDE BIT(13)
5145 #define CHARGE_FLAGS_TYPE_SHIFT 3
5146 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5147 /* Power delivery role */
5148 #define CHARGE_FLAGS_ROLE_MASK (7 << 0)
5151 * PD_EVENT_PS_FAULT data field flags definition :
5153 #define PS_FAULT_OCP 1
5154 #define PS_FAULT_FAST_OCP 2
5155 #define PS_FAULT_OVP 3
5156 #define PS_FAULT_DISCH 4
5159 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
5161 struct mcdp_version {
5170 struct mcdp_version irom;
5171 struct mcdp_version fw;
5174 /* struct mcdp_info field decoding */
5175 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5176 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5178 /* Get/Set USB-PD Alternate mode info */
5179 #define EC_CMD_USB_PD_GET_AMODE 0x0116
5180 struct ec_params_usb_pd_get_mode_request {
5181 uint16_t svid_idx; /* SVID index to get */
5182 uint8_t port; /* port */
5185 struct ec_params_usb_pd_get_mode_response {
5186 uint16_t svid; /* SVID */
5187 uint16_t opos; /* Object Position */
5188 uint32_t vdo[6]; /* Mode VDOs */
5191 #define EC_CMD_USB_PD_SET_AMODE 0x0117
5196 /* Not a command. Do NOT remove. */
5200 struct ec_params_usb_pd_set_mode_request {
5201 uint32_t cmd; /* enum pd_mode_cmd */
5202 uint16_t svid; /* SVID to set */
5203 uint8_t opos; /* Object Position */
5204 uint8_t port; /* port */
5207 /* Ask the PD MCU to record a log of a requested type */
5208 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5210 struct ec_params_pd_write_log_entry {
5211 uint8_t type; /* event type : see PD_EVENT_xx above */
5212 uint8_t port; /* port#, or 0 for events unrelated to a given port */
5216 /* Control USB-PD chip */
5217 #define EC_CMD_PD_CONTROL 0x0119
5219 enum ec_pd_control_cmd {
5220 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */
5221 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */
5222 PD_RESET, /* Force reset the PD chip */
5223 PD_CONTROL_DISABLE, /* Disable further calls to this command */
5224 PD_CHIP_ON, /* Power on the PD chip */
5227 struct ec_params_pd_control {
5228 uint8_t chip; /* chip id */
5232 /* Get info about USB-C SS muxes */
5233 #define EC_CMD_USB_PD_MUX_INFO 0x011A
5235 struct ec_params_usb_pd_mux_info {
5236 uint8_t port; /* USB-C port number */
5239 /* Flags representing mux state */
5240 #define USB_PD_MUX_NONE 0 /* Open switch */
5241 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
5242 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
5243 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
5244 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
5245 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
5246 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
5247 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
5248 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */
5250 struct ec_response_usb_pd_mux_info {
5251 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
5254 #define EC_CMD_PD_CHIP_INFO 0x011B
5256 struct ec_params_pd_chip_info {
5257 uint8_t port; /* USB-C port number */
5258 uint8_t renew; /* Force renewal */
5261 struct ec_response_pd_chip_info {
5263 uint16_t product_id;
5266 uint8_t fw_version_string[8];
5267 uint64_t fw_version_number;
5271 struct ec_response_pd_chip_info_v1 {
5273 uint16_t product_id;
5276 uint8_t fw_version_string[8];
5277 uint64_t fw_version_number;
5280 uint8_t min_req_fw_version_string[8];
5281 uint64_t min_req_fw_version_number;
5285 /* Run RW signature verification and get status */
5286 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C
5288 struct ec_response_rwsig_check_status {
5292 /* For controlling RWSIG task */
5293 #define EC_CMD_RWSIG_ACTION 0x011D
5296 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */
5297 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */
5300 struct ec_params_rwsig_action {
5304 /* Run verification on a slot */
5305 #define EC_CMD_EFS_VERIFY 0x011E
5307 struct ec_params_efs_verify {
5308 uint8_t region; /* enum ec_flash_region */
5312 * Retrieve info from Cros Board Info store. Response is based on the data
5313 * type. Integers return a uint32. Strings return a string, using the response
5314 * size to determine how big it is.
5316 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F
5318 * Write info into Cros Board Info on EEPROM. Write fails if the board has
5319 * hardware write-protect enabled.
5321 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120
5324 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */
5325 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */
5326 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */
5327 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */
5328 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */
5329 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */
5334 * Flags to control read operation
5336 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify
5337 * write was successful without reboot.
5339 #define CBI_GET_RELOAD BIT(0)
5341 struct ec_params_get_cbi {
5342 uint32_t tag; /* enum cbi_data_tag */
5343 uint32_t flag; /* CBI_GET_* */
5347 * Flags to control write behavior.
5349 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
5350 * useful when writing multiple fields in a row.
5351 * INIT: Need to be set when creating a new CBI from scratch. All fields
5352 * will be initialized to zero first.
5354 #define CBI_SET_NO_SYNC BIT(0)
5355 #define CBI_SET_INIT BIT(1)
5357 struct ec_params_set_cbi {
5358 uint32_t tag; /* enum cbi_data_tag */
5359 uint32_t flag; /* CBI_SET_* */
5360 uint32_t size; /* Data size */
5361 uint8_t data[]; /* For string and raw data */
5365 * Information about resets of the AP by the EC and the EC's own uptime.
5367 #define EC_CMD_GET_UPTIME_INFO 0x0121
5369 struct ec_response_uptime_info {
5371 * Number of milliseconds since the last EC boot. Sysjump resets
5372 * typically do not restart the EC's time_since_boot epoch.
5374 * WARNING: The EC's sense of time is much less accurate than the AP's
5375 * sense of time, in both phase and frequency. This timebase is similar
5376 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error.
5378 uint32_t time_since_ec_boot_ms;
5381 * Number of times the AP was reset by the EC since the last EC boot.
5382 * Note that the AP may be held in reset by the EC during the initial
5383 * boot sequence, such that the very first AP boot may count as more
5386 uint32_t ap_resets_since_ec_boot;
5389 * The set of flags which describe the EC's most recent reset. See
5390 * include/system.h RESET_FLAG_* for details.
5392 uint32_t ec_reset_flags;
5394 /* Empty log entries have both the cause and timestamp set to zero. */
5395 struct ap_reset_log_entry {
5397 * See include/chipset.h: enum chipset_{reset,shutdown}_reason
5400 uint16_t reset_cause;
5402 /* Reserved for protocol growth. */
5406 * The time of the reset's assertion, in milliseconds since the
5407 * last EC boot, in the same epoch as time_since_ec_boot_ms.
5408 * Set to zero if the log entry is empty.
5410 uint32_t reset_time_ms;
5411 } recent_ap_reset[4];
5415 * Add entropy to the device secret (stored in the rollback region).
5417 * Depending on the chip, the operation may take a long time (e.g. to erase
5418 * flash), so the commands are asynchronous.
5420 #define EC_CMD_ADD_ENTROPY 0x0122
5422 enum add_entropy_action {
5423 /* Add entropy to the current secret. */
5424 ADD_ENTROPY_ASYNC = 0,
5426 * Add entropy, and also make sure that the previous secret is erased.
5427 * (this can be implemented by adding entropy multiple times until
5428 * all rolback blocks have been overwritten).
5430 ADD_ENTROPY_RESET_ASYNC = 1,
5431 /* Read back result from the previous operation. */
5432 ADD_ENTROPY_GET_RESULT = 2,
5435 struct ec_params_rollback_add_entropy {
5440 * Perform a single read of a given ADC channel.
5442 #define EC_CMD_ADC_READ 0x0123
5444 struct ec_params_adc_read {
5445 uint8_t adc_channel;
5448 struct ec_response_adc_read {
5453 * Read back rollback info
5455 #define EC_CMD_ROLLBACK_INFO 0x0124
5457 struct ec_response_rollback_info {
5458 int32_t id; /* Incrementing number to indicate which region to use. */
5459 int32_t rollback_min_version;
5460 int32_t rw_rollback_version;
5464 /* Issue AP reset */
5465 #define EC_CMD_AP_RESET 0x0125
5468 * Get the number of peripheral charge ports
5470 #define EC_CMD_PCHG_COUNT 0x0134
5472 #define EC_PCHG_MAX_PORTS 8
5474 struct ec_response_pchg_count {
5479 * Get the status of a peripheral charge port
5481 #define EC_CMD_PCHG 0x0135
5483 struct ec_params_pchg {
5487 struct ec_response_pchg {
5488 uint32_t error; /* enum pchg_error */
5489 uint8_t state; /* enum pchg_state state */
5490 uint8_t battery_percentage;
5493 /* Fields added in version 1 */
5494 uint32_t fw_version;
5495 uint32_t dropped_event_count;
5499 /* Charger is reset and not initialized. */
5500 PCHG_STATE_RESET = 0,
5501 /* Charger is initialized or disabled. */
5502 PCHG_STATE_INITIALIZED,
5503 /* Charger is enabled and ready to detect a device. */
5505 /* Device is in proximity. */
5506 PCHG_STATE_DETECTED,
5507 /* Device is being charged. */
5508 PCHG_STATE_CHARGING,
5509 /* Device is fully charged. It implies DETECTED (& not charging). */
5511 /* In download (a.k.a. firmware update) mode */
5512 PCHG_STATE_DOWNLOAD,
5513 /* In download mode. Ready for receiving data. */
5514 PCHG_STATE_DOWNLOADING,
5515 /* Device is ready for data communication. */
5516 PCHG_STATE_CONNECTED,
5517 /* Put no more entry below */
5521 #define EC_PCHG_STATE_TEXT { \
5522 [PCHG_STATE_RESET] = "RESET", \
5523 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \
5524 [PCHG_STATE_ENABLED] = "ENABLED", \
5525 [PCHG_STATE_DETECTED] = "DETECTED", \
5526 [PCHG_STATE_CHARGING] = "CHARGING", \
5527 [PCHG_STATE_FULL] = "FULL", \
5528 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \
5529 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \
5530 [PCHG_STATE_CONNECTED] = "CONNECTED", \
5534 * Update firmware of peripheral chip
5536 #define EC_CMD_PCHG_UPDATE 0x0136
5538 /* Port number is encoded in bit[28:31]. */
5539 #define EC_MKBP_PCHG_PORT_SHIFT 28
5540 /* Utility macro for converting MKBP event to port number. */
5541 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
5542 /* Utility macro for extracting event bits. */
5543 #define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \
5544 & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0))
5546 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0)
5547 #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1)
5548 #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2)
5549 #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3)
5550 #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4)
5552 enum ec_pchg_update_cmd {
5553 /* Reset chip to normal mode. */
5554 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0,
5555 /* Reset and put a chip in update (a.k.a. download) mode. */
5556 EC_PCHG_UPDATE_CMD_OPEN,
5557 /* Write a block of data containing FW image. */
5558 EC_PCHG_UPDATE_CMD_WRITE,
5559 /* Close update session. */
5560 EC_PCHG_UPDATE_CMD_CLOSE,
5561 /* End of commands */
5562 EC_PCHG_UPDATE_CMD_COUNT,
5565 struct ec_params_pchg_update {
5566 /* PCHG port number */
5568 /* enum ec_pchg_update_cmd */
5573 /* Version of new firmware */
5575 /* CRC32 of new firmware */
5577 /* Address in chip memory where <data> is written to */
5579 /* Size of <data> */
5581 /* Partial data of new firmware */
5585 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT
5586 < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8));
5588 struct ec_response_pchg_update {
5590 uint32_t block_size;
5594 /*****************************************************************************/
5595 /* Voltage regulator controls */
5598 * Get basic info of voltage regulator for given index.
5600 * Returns the regulator name and supported voltage list in mV.
5602 #define EC_CMD_REGULATOR_GET_INFO 0x012C
5604 /* Maximum length of regulator name */
5605 #define EC_REGULATOR_NAME_MAX_LEN 16
5607 /* Maximum length of the supported voltage list. */
5608 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16
5610 struct ec_params_regulator_get_info {
5614 struct ec_response_regulator_get_info {
5615 char name[EC_REGULATOR_NAME_MAX_LEN];
5616 uint16_t num_voltages;
5617 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT];
5621 * Configure the regulator as enabled / disabled.
5623 #define EC_CMD_REGULATOR_ENABLE 0x012D
5625 struct ec_params_regulator_enable {
5631 * Query if the regulator is enabled.
5633 * Returns 1 if the regulator is enabled, 0 if not.
5635 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E
5637 struct ec_params_regulator_is_enabled {
5641 struct ec_response_regulator_is_enabled {
5646 * Set voltage for the voltage regulator within the range specified.
5648 * The driver should select the voltage in range closest to min_mv.
5650 * Also note that this might be called before the regulator is enabled, and the
5651 * setting should be in effect after the regulator is enabled.
5653 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
5655 struct ec_params_regulator_set_voltage {
5662 * Get the currently configured voltage for the voltage regulator.
5664 * Note that this might be called before the regulator is enabled, and this
5665 * should return the configured output voltage if the regulator is enabled.
5667 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
5669 struct ec_params_regulator_get_voltage {
5673 struct ec_response_regulator_get_voltage {
5674 uint32_t voltage_mv;
5678 * Gather all discovery information for the given port and partner type.
5680 * Note that if discovery has not yet completed, only the currently completed
5681 * responses will be filled in. If the discovery data structures are changed
5682 * in the process of the command running, BUSY will be returned.
5684 * VDO field sizes are set to the maximum possible number of VDOs a VDM may
5685 * contain, while the number of SVIDs here is selected to fit within the PROTO2
5686 * maximum parameter size.
5688 #define EC_CMD_TYPEC_DISCOVERY 0x0131
5690 enum typec_partner_type {
5691 TYPEC_PARTNER_SOP = 0,
5692 TYPEC_PARTNER_SOP_PRIME = 1,
5695 struct ec_params_typec_discovery {
5697 uint8_t partner_type; /* enum typec_partner_type */
5700 struct svid_mode_info {
5702 uint16_t mode_count; /* Number of modes partner sent */
5703 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5706 struct ec_response_typec_discovery {
5707 uint8_t identity_count; /* Number of identity VDOs partner sent */
5708 uint8_t svid_count; /* Number of SVIDs partner sent */
5710 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5711 struct svid_mode_info svids[];
5714 /* USB Type-C commands for AP-controlled device policy. */
5715 #define EC_CMD_TYPEC_CONTROL 0x0132
5717 enum typec_control_command {
5718 TYPEC_CONTROL_COMMAND_EXIT_MODES,
5719 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS,
5720 TYPEC_CONTROL_COMMAND_ENTER_MODE,
5723 struct ec_params_typec_control {
5725 uint8_t command; /* enum typec_control_command */
5729 * This section will be interpreted based on |command|. Define a
5730 * placeholder structure to avoid having to increase the size and bump
5731 * the command version when adding new sub-commands.
5734 uint32_t clear_events_mask;
5735 uint8_t mode_to_enter; /* enum typec_mode */
5736 uint8_t placeholder[128];
5741 * Gather all status information for a port.
5743 * Note: this covers many of the return fields from the deprecated
5744 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the
5745 * discovery data. The "enum pd_cc_states" is defined with the deprecated
5746 * EC_CMD_USB_PD_CONTROL command.
5748 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags.
5750 #define EC_CMD_TYPEC_STATUS 0x0133
5755 * Note this is also used for PD header creation, and values align to those in
5756 * the Power Delivery Specification Revision 3.0 (See
5757 * 6.2.1.1.4 Port Power Role).
5759 enum pd_power_role {
5767 * Note this is also used for PD header creation, and the first two values
5768 * align to those in the Power Delivery Specification Revision 3.0 (See
5769 * 6.2.1.1.6 Port Data Role).
5774 PD_ROLE_DISCONNECTED = 2,
5777 enum pd_vconn_role {
5778 PD_ROLE_VCONN_OFF = 0,
5779 PD_ROLE_VCONN_SRC = 1,
5783 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,
5784 * regardless of whether a debug accessory is connected.
5786 enum tcpc_cc_polarity {
5788 * _CCx: is used to indicate the polarity while not connected to
5789 * a Debug Accessory. Only one CC line will assert a resistor and
5790 * the other will be open.
5796 * _CCx_DTS is used to indicate the polarity while connected to a
5797 * SRC Debug Accessory. Assert resistors on both lines.
5799 POLARITY_CC1_DTS = 2,
5800 POLARITY_CC2_DTS = 3,
5803 * The current TCPC code relies on these specific POLARITY values.
5804 * Adding in a check to verify if the list grows for any reason
5805 * that this will give a hint that other places need to be
5811 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
5812 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
5813 #define PD_STATUS_EVENT_HARD_RESET BIT(2)
5815 struct ec_params_typec_status {
5819 struct ec_response_typec_status {
5820 uint8_t pd_enabled; /* PD communication enabled - bool */
5821 uint8_t dev_connected; /* Device connected - bool */
5822 uint8_t sop_connected; /* Device is SOP PD capable - bool */
5823 uint8_t source_cap_count; /* Number of Source Cap PDOs */
5825 uint8_t power_role; /* enum pd_power_role */
5826 uint8_t data_role; /* enum pd_data_role */
5827 uint8_t vconn_role; /* enum pd_vconn_role */
5828 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */
5830 uint8_t polarity; /* enum tcpc_cc_polarity */
5831 uint8_t cc_state; /* enum pd_cc_states */
5832 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */
5833 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */
5835 char tc_state[32]; /* TC state name */
5837 uint32_t events; /* PD_STATUS_EVENT bitmask */
5840 * BCD PD revisions for partners
5842 * The format has the PD major reversion in the upper nibble, and PD
5843 * minor version in the next nibble. Following two nibbles are
5845 * ex. PD 3.2 would map to 0x3200
5847 * PD major/minor will be 0 if no PD device is connected.
5849 uint16_t sop_revision;
5850 uint16_t sop_prime_revision;
5852 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */
5854 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */
5857 /*****************************************************************************/
5858 /* The command range 0x200-0x2FF is reserved for Rotor. */
5860 /*****************************************************************************/
5862 * Reserve a range of host commands for the CR51 firmware.
5864 #define EC_CMD_CR51_BASE 0x0300
5865 #define EC_CMD_CR51_LAST 0x03FF
5867 /*****************************************************************************/
5868 /* Fingerprint MCU commands: range 0x0400-0x040x */
5870 /* Fingerprint SPI sensor passthru command: prototyping ONLY */
5871 #define EC_CMD_FP_PASSTHRU 0x0400
5873 #define EC_FP_FLAG_NOT_COMPLETE 0x1
5875 struct ec_params_fp_passthru {
5876 uint16_t len; /* Number of bytes to write then read */
5877 uint16_t flags; /* EC_FP_FLAG_xxx */
5878 uint8_t data[]; /* Data to send */
5881 /* Configure the Fingerprint MCU behavior */
5882 #define EC_CMD_FP_MODE 0x0402
5884 /* Put the sensor in its lowest power mode */
5885 #define FP_MODE_DEEPSLEEP BIT(0)
5886 /* Wait to see a finger on the sensor */
5887 #define FP_MODE_FINGER_DOWN BIT(1)
5888 /* Poll until the finger has left the sensor */
5889 #define FP_MODE_FINGER_UP BIT(2)
5890 /* Capture the current finger image */
5891 #define FP_MODE_CAPTURE BIT(3)
5892 /* Finger enrollment session on-going */
5893 #define FP_MODE_ENROLL_SESSION BIT(4)
5894 /* Enroll the current finger image */
5895 #define FP_MODE_ENROLL_IMAGE BIT(5)
5896 /* Try to match the current finger image */
5897 #define FP_MODE_MATCH BIT(6)
5898 /* Reset and re-initialize the sensor. */
5899 #define FP_MODE_RESET_SENSOR BIT(7)
5900 /* special value: don't change anything just read back current mode */
5901 #define FP_MODE_DONT_CHANGE BIT(31)
5903 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \
5904 FP_MODE_FINGER_DOWN | \
5905 FP_MODE_FINGER_UP | \
5907 FP_MODE_ENROLL_SESSION | \
5908 FP_MODE_ENROLL_IMAGE | \
5910 FP_MODE_RESET_SENSOR | \
5911 FP_MODE_DONT_CHANGE)
5913 /* Capture types defined in bits [30..28] */
5914 #define FP_MODE_CAPTURE_TYPE_SHIFT 28
5915 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
5917 * This enum must remain ordered, if you add new values you must ensure that
5918 * FP_CAPTURE_TYPE_MAX is still the last one.
5920 enum fp_capture_type {
5921 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */
5922 FP_CAPTURE_VENDOR_FORMAT = 0,
5923 /* Simple raw image capture (produces width x height x bpp bits) */
5924 FP_CAPTURE_SIMPLE_IMAGE = 1,
5925 /* Self test pattern (e.g. checkerboard) */
5926 FP_CAPTURE_PATTERN0 = 2,
5927 /* Self test pattern (e.g. inverted checkerboard) */
5928 FP_CAPTURE_PATTERN1 = 3,
5929 /* Capture for Quality test with fixed contrast */
5930 FP_CAPTURE_QUALITY_TEST = 4,
5931 /* Capture for pixel reset value test */
5932 FP_CAPTURE_RESET_TEST = 5,
5933 FP_CAPTURE_TYPE_MAX,
5935 /* Extracts the capture type from the sensor 'mode' word */
5936 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \
5937 >> FP_MODE_CAPTURE_TYPE_SHIFT)
5939 struct ec_params_fp_mode {
5940 uint32_t mode; /* as defined by FP_MODE_ constants */
5943 struct ec_response_fp_mode {
5944 uint32_t mode; /* as defined by FP_MODE_ constants */
5947 /* Retrieve Fingerprint sensor information */
5948 #define EC_CMD_FP_INFO 0x0403
5950 /* Number of dead pixels detected on the last maintenance */
5951 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
5952 /* Unknown number of dead pixels detected on the last maintenance */
5953 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
5954 /* No interrupt from the sensor */
5955 #define FP_ERROR_NO_IRQ BIT(12)
5956 /* SPI communication error */
5957 #define FP_ERROR_SPI_COMM BIT(13)
5958 /* Invalid sensor Hardware ID */
5959 #define FP_ERROR_BAD_HWID BIT(14)
5960 /* Sensor initialization failed */
5961 #define FP_ERROR_INIT_FAIL BIT(15)
5963 struct ec_response_fp_info_v0 {
5964 /* Sensor identification */
5966 uint32_t product_id;
5969 /* Image frame characteristics */
5970 uint32_t frame_size;
5971 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
5975 uint16_t errors; /* see FP_ERROR_ flags above */
5978 struct ec_response_fp_info {
5979 /* Sensor identification */
5981 uint32_t product_id;
5984 /* Image frame characteristics */
5985 uint32_t frame_size;
5986 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
5990 uint16_t errors; /* see FP_ERROR_ flags above */
5991 /* Template/finger current information */
5992 uint32_t template_size; /* max template size in bytes */
5993 uint16_t template_max; /* maximum number of fingers/templates */
5994 uint16_t template_valid; /* number of valid fingers/templates */
5995 uint32_t template_dirty; /* bitmap of templates with MCU side changes */
5996 uint32_t template_version; /* version of the template format */
5999 /* Get the last captured finger frame or a template content */
6000 #define EC_CMD_FP_FRAME 0x0404
6002 /* constants defining the 'offset' field which also contains the frame index */
6003 #define FP_FRAME_INDEX_SHIFT 28
6004 /* Frame buffer where the captured image is stored */
6005 #define FP_FRAME_INDEX_RAW_IMAGE 0
6006 /* First frame buffer holding a template */
6007 #define FP_FRAME_INDEX_TEMPLATE 1
6008 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
6009 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
6011 /* Version of the format of the encrypted templates. */
6012 #define FP_TEMPLATE_FORMAT_VERSION 3
6014 /* Constants for encryption parameters */
6015 #define FP_CONTEXT_NONCE_BYTES 12
6016 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
6017 #define FP_CONTEXT_TAG_BYTES 16
6018 #define FP_CONTEXT_SALT_BYTES 16
6019 #define FP_CONTEXT_TPM_BYTES 32
6021 struct ec_fp_template_encryption_metadata {
6023 * Version of the structure format (N=3).
6025 uint16_t struct_version;
6026 /* Reserved bytes, set to 0. */
6029 * The salt is *only* ever used for key derivation. The nonce is unique,
6030 * a different one is used for every message.
6032 uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
6033 uint8_t salt[FP_CONTEXT_SALT_BYTES];
6034 uint8_t tag[FP_CONTEXT_TAG_BYTES];
6037 struct ec_params_fp_frame {
6039 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE
6040 * in the high nibble, and the real offset within the frame in
6041 * FP_FRAME_OFFSET_MASK.
6047 /* Load a template into the MCU */
6048 #define EC_CMD_FP_TEMPLATE 0x0405
6050 /* Flag in the 'size' field indicating that the full template has been sent */
6051 #define FP_TEMPLATE_COMMIT 0x80000000
6053 struct ec_params_fp_template {
6059 /* Clear the current fingerprint user context and set a new one */
6060 #define EC_CMD_FP_CONTEXT 0x0406
6062 struct ec_params_fp_context {
6063 uint32_t userid[FP_CONTEXT_USERID_WORDS];
6066 #define EC_CMD_FP_STATS 0x0407
6068 #define FPSTATS_CAPTURE_INV BIT(0)
6069 #define FPSTATS_MATCHING_INV BIT(1)
6071 struct ec_response_fp_stats {
6072 uint32_t capture_time_us;
6073 uint32_t matching_time_us;
6074 uint32_t overall_time_us;
6079 uint8_t timestamps_invalid;
6080 int8_t template_matched;
6083 #define EC_CMD_FP_SEED 0x0408
6084 struct ec_params_fp_seed {
6086 * Version of the structure format (N=3).
6088 uint16_t struct_version;
6089 /* Reserved bytes, set to 0. */
6091 /* Seed from the TPM. */
6092 uint8_t seed[FP_CONTEXT_TPM_BYTES];
6095 #define EC_CMD_FP_ENC_STATUS 0x0409
6097 /* FP TPM seed has been set or not */
6098 #define FP_ENC_STATUS_SEED_SET BIT(0)
6100 struct ec_response_fp_encryption_status {
6101 /* Used bits in encryption engine status */
6102 uint32_t valid_flags;
6103 /* Encryption engine status */
6107 /*****************************************************************************/
6108 /* Touchpad MCU commands: range 0x0500-0x05FF */
6110 /* Perform touchpad self test */
6111 #define EC_CMD_TP_SELF_TEST 0x0500
6113 /* Get number of frame types, and the size of each type */
6114 #define EC_CMD_TP_FRAME_INFO 0x0501
6116 struct ec_response_tp_frame_info {
6118 uint32_t frame_sizes[];
6121 /* Create a snapshot of current frame readings */
6122 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
6124 /* Read the frame */
6125 #define EC_CMD_TP_FRAME_GET 0x0503
6127 struct ec_params_tp_frame_get {
6128 uint32_t frame_index;
6133 /*****************************************************************************/
6134 /* EC-EC communication commands: range 0x0600-0x06FF */
6136 #define EC_COMM_TEXT_MAX 8
6139 * Get battery static information, i.e. information that never changes, or
6140 * very infrequently.
6142 #define EC_CMD_BATTERY_GET_STATIC 0x0600
6145 * struct ec_params_battery_static_info - Battery static info parameters
6146 * @index: Battery index.
6148 struct ec_params_battery_static_info {
6153 * struct ec_response_battery_static_info - Battery static info response
6154 * @design_capacity: Battery Design Capacity (mAh)
6155 * @design_voltage: Battery Design Voltage (mV)
6156 * @manufacturer: Battery Manufacturer String
6157 * @model: Battery Model Number String
6158 * @serial: Battery Serial Number String
6159 * @type: Battery Type String
6160 * @cycle_count: Battery Cycle Count
6162 struct ec_response_battery_static_info {
6163 uint16_t design_capacity;
6164 uint16_t design_voltage;
6165 char manufacturer[EC_COMM_TEXT_MAX];
6166 char model[EC_COMM_TEXT_MAX];
6167 char serial[EC_COMM_TEXT_MAX];
6168 char type[EC_COMM_TEXT_MAX];
6169 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */
6170 uint32_t cycle_count;
6174 * Get battery dynamic information, i.e. information that is likely to change
6175 * every time it is read.
6177 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
6180 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters
6181 * @index: Battery index.
6183 struct ec_params_battery_dynamic_info {
6188 * struct ec_response_battery_dynamic_info - Battery dynamic info response
6189 * @actual_voltage: Battery voltage (mV)
6190 * @actual_current: Battery current (mA); negative=discharging
6191 * @remaining_capacity: Remaining capacity (mAh)
6192 * @full_capacity: Capacity (mAh, might change occasionally)
6193 * @flags: Flags, see EC_BATT_FLAG_*
6194 * @desired_voltage: Charging voltage desired by battery (mV)
6195 * @desired_current: Charging current desired by battery (mA)
6197 struct ec_response_battery_dynamic_info {
6198 int16_t actual_voltage;
6199 int16_t actual_current;
6200 int16_t remaining_capacity;
6201 int16_t full_capacity;
6203 int16_t desired_voltage;
6204 int16_t desired_current;
6208 * Control charger chip. Used to control charger chip on the slave.
6210 #define EC_CMD_CHARGER_CONTROL 0x0602
6213 * struct ec_params_charger_control - Charger control parameters
6214 * @max_current: Charger current (mA). Positive to allow base to draw up to
6215 * max_current and (possibly) charge battery, negative to request current
6217 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is
6219 * @allow_charging: Allow base battery charging (only makes sense if
6222 struct ec_params_charger_control {
6223 int16_t max_current;
6224 uint16_t otg_voltage;
6225 uint8_t allow_charging;
6228 /* Get ACK from the USB-C SS muxes */
6229 #define EC_CMD_USB_PD_MUX_ACK 0x0603
6231 struct ec_params_usb_pd_mux_ack {
6232 uint8_t port; /* USB-C port number */
6235 /*****************************************************************************/
6237 * Reserve a range of host commands for board-specific, experimental, or
6238 * special purpose features. These can be (re)used without updating this file.
6240 * CAUTION: Don't go nuts with this. Shipping products should document ALL
6241 * their EC commands for easier development, testing, debugging, and support.
6243 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
6244 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
6246 * In your experimental code, you may want to do something like this:
6248 * #define EC_CMD_MAGIC_FOO 0x0000
6249 * #define EC_CMD_MAGIC_BAR 0x0001
6250 * #define EC_CMD_MAGIC_HEY 0x0002
6252 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
6255 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
6258 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
6261 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
6262 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
6265 * Given the private host command offset, calculate the true private host
6268 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
6269 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
6271 /*****************************************************************************/
6275 * Some platforms have sub-processors chained to each other. For example.
6277 * AP <--> EC <--> PD MCU
6279 * The top 2 bits of the command number are used to indicate which device the
6280 * command is intended for. Device 0 is always the device receiving the
6281 * command; other device mapping is board-specific.
6283 * When a device receives a command to be passed to a sub-processor, it passes
6284 * it on with the device number set back to 0. This allows the sub-processor
6285 * to remain blissfully unaware of whether the command originated on the next
6286 * device up the chain, or was passed through from the AP.
6288 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
6289 * AP sends command 0x4002 to the EC
6290 * EC sends command 0x0002 to the PD MCU
6291 * EC forwards PD MCU response back to the AP
6294 /* Offset and max command number for sub-device n */
6295 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
6296 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
6298 /*****************************************************************************/
6300 * Deprecated constants. These constants have been renamed for clarity. The
6301 * meaning and size has not changed. Programs that use the old names should
6302 * switch to the new names soon, as the old names may not be carried forward
6305 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
6306 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
6307 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
6311 #endif /* __CROS_EC_COMMANDS_H */