2 * Maxim MAX77620 Regulator driver
4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
14 #include <linux/init.h>
15 #include <linux/mfd/max77620.h>
16 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/driver.h>
21 #include <linux/regulator/machine.h>
22 #include <linux/regulator/of_regulator.h>
24 #define max77620_rails(_name) "max77620-"#_name
27 #define MAX77620_POWER_MODE_NORMAL 3
28 #define MAX77620_POWER_MODE_LPM 2
29 #define MAX77620_POWER_MODE_GLPM 1
30 #define MAX77620_POWER_MODE_DISABLE 0
33 #define MAX77620_SD_SR_13_75 0
34 #define MAX77620_SD_SR_27_5 1
35 #define MAX77620_SD_SR_55 2
36 #define MAX77620_SD_SR_100 3
38 enum max77620_regulators {
39 MAX77620_REGULATOR_ID_SD0,
40 MAX77620_REGULATOR_ID_SD1,
41 MAX77620_REGULATOR_ID_SD2,
42 MAX77620_REGULATOR_ID_SD3,
43 MAX77620_REGULATOR_ID_SD4,
44 MAX77620_REGULATOR_ID_LDO0,
45 MAX77620_REGULATOR_ID_LDO1,
46 MAX77620_REGULATOR_ID_LDO2,
47 MAX77620_REGULATOR_ID_LDO3,
48 MAX77620_REGULATOR_ID_LDO4,
49 MAX77620_REGULATOR_ID_LDO5,
50 MAX77620_REGULATOR_ID_LDO6,
51 MAX77620_REGULATOR_ID_LDO7,
52 MAX77620_REGULATOR_ID_LDO8,
57 enum max77620_regulator_type {
58 MAX77620_REGULATOR_TYPE_SD,
59 MAX77620_REGULATOR_TYPE_LDO_N,
60 MAX77620_REGULATOR_TYPE_LDO_P,
63 struct max77620_regulator_info {
72 struct regulator_desc desc;
75 struct max77620_regulator_pdata {
76 struct regulator_init_data *reg_idata;
78 int active_fps_pd_slot;
79 int active_fps_pu_slot;
81 int suspend_fps_pd_slot;
82 int suspend_fps_pu_slot;
86 struct max77620_regulator {
89 struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
90 struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
91 int enable_power_mode[MAX77620_NUM_REGS];
92 int current_power_mode[MAX77620_NUM_REGS];
93 int active_fps_src[MAX77620_NUM_REGS];
96 #define fps_src_name(fps_src) \
97 (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \
98 fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \
99 fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
101 static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic,
104 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
108 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
110 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
111 rinfo->fps_addr, ret);
115 return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
118 static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic,
121 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
126 case MAX77620_FPS_SRC_0:
127 case MAX77620_FPS_SRC_1:
128 case MAX77620_FPS_SRC_2:
129 case MAX77620_FPS_SRC_NONE:
132 case MAX77620_FPS_SRC_DEF:
133 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
135 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
136 rinfo->fps_addr, ret);
139 ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
140 pmic->active_fps_src[id] = ret;
144 dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n",
149 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
150 MAX77620_FPS_SRC_MASK,
151 fps_src << MAX77620_FPS_SRC_SHIFT);
153 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
154 rinfo->fps_addr, ret);
157 pmic->active_fps_src[id] = fps_src;
162 static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic,
163 int id, bool is_suspend)
165 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
166 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
167 unsigned int val = 0;
168 unsigned int mask = 0;
169 int pu = rpdata->active_fps_pu_slot;
170 int pd = rpdata->active_fps_pd_slot;
174 pu = rpdata->suspend_fps_pu_slot;
175 pd = rpdata->suspend_fps_pd_slot;
178 /* FPS power up period setting */
180 val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);
181 mask |= MAX77620_FPS_PU_PERIOD_MASK;
184 /* FPS power down period setting */
186 val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);
187 mask |= MAX77620_FPS_PD_PERIOD_MASK;
191 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
194 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
195 rinfo->fps_addr, ret);
203 static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic,
204 int power_mode, int id)
206 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
207 u8 mask = rinfo->power_mode_mask;
208 u8 shift = rinfo->power_mode_shift;
212 switch (rinfo->type) {
213 case MAX77620_REGULATOR_TYPE_SD:
214 addr = rinfo->cfg_addr;
217 addr = rinfo->volt_addr;
221 ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift);
223 dev_err(pmic->dev, "Regulator %d mode set failed: %d\n",
227 pmic->current_power_mode[id] = power_mode;
232 static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic,
235 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
236 unsigned int val, addr;
237 u8 mask = rinfo->power_mode_mask;
238 u8 shift = rinfo->power_mode_shift;
241 switch (rinfo->type) {
242 case MAX77620_REGULATOR_TYPE_SD:
243 addr = rinfo->cfg_addr;
246 addr = rinfo->volt_addr;
250 ret = regmap_read(pmic->rmap, addr, &val);
252 dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n",
257 return (val & mask) >> shift;
260 static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id)
262 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
267 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval);
269 dev_err(pmic->dev, "Register 0x%02x read failed: %d\n",
270 rinfo->cfg_addr, ret);
274 switch (rinfo->type) {
275 case MAX77620_REGULATOR_TYPE_SD:
276 slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3;
291 rinfo->desc.ramp_delay = slew_rate;
294 slew_rate = rval & 0x1;
303 rinfo->desc.ramp_delay = slew_rate;
310 static int max77620_init_pmic(struct max77620_regulator *pmic, int id)
312 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
315 /* Update power mode */
316 ret = max77620_regulator_get_power_mode(pmic, id);
320 pmic->current_power_mode[id] = ret;
321 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
323 if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) {
324 ret = max77620_regulator_get_fps_src(pmic, id);
327 rpdata->active_fps_src = ret;
330 /* If rails are externally control of FPS then enable it always. */
331 if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) {
332 ret = max77620_regulator_set_power_mode(pmic,
333 pmic->enable_power_mode[id], id);
337 if (pmic->current_power_mode[id] !=
338 pmic->enable_power_mode[id]) {
339 ret = max77620_regulator_set_power_mode(pmic,
340 pmic->enable_power_mode[id], id);
346 ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id);
350 ret = max77620_regulator_set_fps_slots(pmic, id, false);
357 static int max77620_regulator_enable(struct regulator_dev *rdev)
359 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
360 int id = rdev_get_id(rdev);
362 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
365 return max77620_regulator_set_power_mode(pmic,
366 pmic->enable_power_mode[id], id);
369 static int max77620_regulator_disable(struct regulator_dev *rdev)
371 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
372 int id = rdev_get_id(rdev);
374 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
377 return max77620_regulator_set_power_mode(pmic,
378 MAX77620_POWER_MODE_DISABLE, id);
381 static int max77620_regulator_is_enabled(struct regulator_dev *rdev)
383 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
384 int id = rdev_get_id(rdev);
387 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
390 ret = max77620_regulator_get_power_mode(pmic, id);
394 if (ret != MAX77620_POWER_MODE_DISABLE)
400 static int max77620_regulator_set_mode(struct regulator_dev *rdev,
403 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
404 int id = rdev_get_id(rdev);
405 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
406 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
413 case REGULATOR_MODE_FAST:
415 power_mode = MAX77620_POWER_MODE_NORMAL;
418 case REGULATOR_MODE_NORMAL:
419 power_mode = MAX77620_POWER_MODE_NORMAL;
422 case REGULATOR_MODE_IDLE:
423 power_mode = MAX77620_POWER_MODE_LPM;
427 dev_err(pmic->dev, "Regulator %d mode %d is invalid\n",
432 if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)
435 val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0;
436 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
437 MAX77620_SD_FPWM_MASK, val);
439 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
440 rinfo->cfg_addr, ret);
443 rpdata->current_mode = mode;
446 ret = max77620_regulator_set_power_mode(pmic, power_mode, id);
450 pmic->enable_power_mode[id] = power_mode;
455 static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)
457 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
458 int id = rdev_get_id(rdev);
459 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
462 int pm_mode, reg_mode;
465 ret = max77620_regulator_get_power_mode(pmic, id);
471 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
472 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val);
474 dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n",
475 rinfo->cfg_addr, ret);
478 fpwm = !!(val & MAX77620_SD_FPWM_MASK);
482 case MAX77620_POWER_MODE_NORMAL:
483 case MAX77620_POWER_MODE_DISABLE:
485 reg_mode = REGULATOR_MODE_FAST;
487 reg_mode = REGULATOR_MODE_NORMAL;
489 case MAX77620_POWER_MODE_LPM:
490 case MAX77620_POWER_MODE_GLPM:
491 reg_mode = REGULATOR_MODE_IDLE;
500 static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,
503 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
504 int id = rdev_get_id(rdev);
505 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
509 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
510 if (ramp_delay <= 13750)
512 else if (ramp_delay <= 27500)
514 else if (ramp_delay <= 55000)
518 val <<= MAX77620_SD_SR_SHIFT;
519 mask = MAX77620_SD_SR_MASK;
521 if (ramp_delay <= 5000)
525 mask = MAX77620_LDO_SLEW_RATE_MASK;
528 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val);
530 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
531 rinfo->cfg_addr, ret);
536 static int max77620_of_parse_cb(struct device_node *np,
537 const struct regulator_desc *desc,
538 struct regulator_config *config)
540 struct max77620_regulator *pmic = config->driver_data;
541 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id];
545 ret = of_property_read_u32(np, "maxim,active-fps-source", &pval);
546 rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF;
548 ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval);
549 rpdata->active_fps_pu_slot = (!ret) ? pval : -1;
551 ret = of_property_read_u32(
552 np, "maxim,active-fps-power-down-slot", &pval);
553 rpdata->active_fps_pd_slot = (!ret) ? pval : -1;
555 ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval);
556 rpdata->suspend_fps_src = (!ret) ? pval : -1;
558 ret = of_property_read_u32(
559 np, "maxim,suspend-fps-power-up-slot", &pval);
560 rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1;
562 ret = of_property_read_u32(
563 np, "maxim,suspend-fps-power-down-slot", &pval);
564 rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;
566 return max77620_init_pmic(pmic, desc->id);
569 static struct regulator_ops max77620_regulator_ops = {
570 .is_enabled = max77620_regulator_is_enabled,
571 .enable = max77620_regulator_enable,
572 .disable = max77620_regulator_disable,
573 .list_voltage = regulator_list_voltage_linear,
574 .map_voltage = regulator_map_voltage_linear,
575 .get_voltage_sel = regulator_get_voltage_sel_regmap,
576 .set_voltage_sel = regulator_set_voltage_sel_regmap,
577 .set_mode = max77620_regulator_set_mode,
578 .get_mode = max77620_regulator_get_mode,
579 .set_ramp_delay = max77620_regulator_set_ramp_delay,
580 .set_voltage_time_sel = regulator_set_voltage_time_sel,
581 .set_active_discharge = regulator_set_active_discharge_regmap,
584 #define MAX77620_SD_CNF2_ROVS_EN_NONE 0
585 #define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \
586 _step_uV, _rs_add, _rs_mask) \
587 [MAX77620_REGULATOR_ID_##_id] = { \
588 .type = MAX77620_REGULATOR_TYPE_SD, \
589 .volt_addr = MAX77620_REG_##_id, \
590 .cfg_addr = MAX77620_REG_##_id##_CFG, \
591 .fps_addr = MAX77620_REG_FPS_##_id, \
592 .remote_sense_addr = _rs_add, \
593 .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \
594 .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \
595 .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \
597 .name = max77620_rails(_name), \
598 .of_match = of_match_ptr(#_name), \
599 .regulators_node = of_match_ptr("regulators"), \
600 .of_parse_cb = max77620_of_parse_cb, \
601 .supply_name = _sname, \
602 .id = MAX77620_REGULATOR_ID_##_id, \
603 .ops = &max77620_regulator_ops, \
604 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
606 .uV_step = _step_uV, \
607 .enable_time = 500, \
608 .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \
609 .vsel_reg = MAX77620_REG_##_id, \
610 .active_discharge_off = 0, \
611 .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \
612 .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \
613 .active_discharge_reg = MAX77620_REG_##_id##_CFG, \
614 .type = REGULATOR_VOLTAGE, \
618 #define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \
619 [MAX77620_REGULATOR_ID_##_id] = { \
620 .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \
621 .volt_addr = MAX77620_REG_##_id##_CFG, \
622 .cfg_addr = MAX77620_REG_##_id##_CFG2, \
623 .fps_addr = MAX77620_REG_FPS_##_id, \
624 .remote_sense_addr = 0xFF, \
625 .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \
626 .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \
628 .name = max77620_rails(_name), \
629 .of_match = of_match_ptr(#_name), \
630 .regulators_node = of_match_ptr("regulators"), \
631 .of_parse_cb = max77620_of_parse_cb, \
632 .supply_name = _sname, \
633 .id = MAX77620_REGULATOR_ID_##_id, \
634 .ops = &max77620_regulator_ops, \
635 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
637 .uV_step = _step_uV, \
638 .enable_time = 500, \
639 .vsel_mask = MAX77620_LDO_VOLT_MASK, \
640 .vsel_reg = MAX77620_REG_##_id##_CFG, \
641 .active_discharge_off = 0, \
642 .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \
643 .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \
644 .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \
645 .type = REGULATOR_VOLTAGE, \
649 static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
650 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
651 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
652 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
653 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
654 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
656 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
657 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
658 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
659 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
660 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
661 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
662 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
663 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
664 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
667 static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {
668 RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
669 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),
670 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
671 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
672 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
674 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
675 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
676 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
677 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
678 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
679 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
680 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
681 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
682 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
685 static int max77620_regulator_probe(struct platform_device *pdev)
687 struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);
688 struct max77620_regulator_info *rinfo;
689 struct device *dev = &pdev->dev;
690 struct regulator_config config = { };
691 struct max77620_regulator *pmic;
695 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
699 platform_set_drvdata(pdev, pmic);
701 pmic->rmap = max77620_chip->rmap;
703 dev->of_node = pdev->dev.parent->of_node;
705 switch (max77620_chip->chip_id) {
707 rinfo = max77620_regs_info;
710 rinfo = max20024_regs_info;
714 config.regmap = pmic->rmap;
716 config.driver_data = pmic;
718 for (id = 0; id < MAX77620_NUM_REGS; id++) {
719 struct regulator_dev *rdev;
720 struct regulator_desc *rdesc;
722 if ((max77620_chip->chip_id == MAX77620) &&
723 (id == MAX77620_REGULATOR_ID_SD4))
726 rdesc = &rinfo[id].desc;
727 pmic->rinfo[id] = &max77620_regs_info[id];
728 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
730 ret = max77620_read_slew_rate(pmic, id);
734 rdev = devm_regulator_register(dev, rdesc, &config);
737 dev_err(dev, "Regulator registration %s failed: %d\n",
746 #ifdef CONFIG_PM_SLEEP
747 static int max77620_regulator_suspend(struct device *dev)
749 struct max77620_regulator *pmic = dev_get_drvdata(dev);
750 struct max77620_regulator_pdata *reg_pdata;
753 for (id = 0; id < MAX77620_NUM_REGS; id++) {
754 reg_pdata = &pmic->reg_pdata[id];
756 max77620_regulator_set_fps_slots(pmic, id, true);
757 if (reg_pdata->suspend_fps_src < 0)
760 max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src,
767 static int max77620_regulator_resume(struct device *dev)
769 struct max77620_regulator *pmic = dev_get_drvdata(dev);
770 struct max77620_regulator_pdata *reg_pdata;
773 for (id = 0; id < MAX77620_NUM_REGS; id++) {
774 reg_pdata = &pmic->reg_pdata[id];
776 max77620_regulator_set_fps_slots(pmic, id, false);
777 if (reg_pdata->active_fps_src < 0)
779 max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src,
787 static const struct dev_pm_ops max77620_regulator_pm_ops = {
788 SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,
789 max77620_regulator_resume)
792 static const struct platform_device_id max77620_regulator_devtype[] = {
793 { .name = "max77620-pmic", },
794 { .name = "max20024-pmic", },
797 MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype);
799 static struct platform_driver max77620_regulator_driver = {
800 .probe = max77620_regulator_probe,
801 .id_table = max77620_regulator_devtype,
803 .name = "max77620-pmic",
804 .pm = &max77620_regulator_pm_ops,
808 module_platform_driver(max77620_regulator_driver);
810 MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");
813 MODULE_LICENSE("GPL v2");