1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
8 * Purpose: driver entry for initial, open, close, tx and rx.
16 * vt6655_probe - module initial (insmod) driver entry
17 * vt6655_remove - module remove entry
18 * device_free_info - device structure resource free function
19 * device_print_info - print out resource
20 * device_rx_srv - rx service function
21 * device_alloc_rx_buf - rx buffer pre-allocated function
22 * device_free_tx_buf - free tx buffer function
23 * device_init_rd0_ring- initial rd dma0 ring
24 * device_init_rd1_ring- initial rd dma1 ring
25 * device_init_td0_ring- initial tx dma0 ring buffer
26 * device_init_td1_ring- initial tx dma1 ring buffer
27 * device_init_registers- initial MAC & BBP & RF internal registers.
28 * device_init_rings- initial tx/rx ring buffer
29 * device_free_rings- free all allocated ring buffer
30 * device_tx_srv- tx interrupt service function
36 #include <linux/file.h>
46 #include <linux/delay.h>
47 #include <linux/kthread.h>
48 #include <linux/slab.h>
50 /*--------------------- Static Definitions -------------------------*/
52 * Define module options
55 MODULE_LICENSE("GPL");
56 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
58 #define DEVICE_PARAM(N, D)
60 #define RX_DESC_MIN0 16
61 #define RX_DESC_MAX0 128
62 #define RX_DESC_DEF0 32
63 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
65 #define RX_DESC_MIN1 16
66 #define RX_DESC_MAX1 128
67 #define RX_DESC_DEF1 32
68 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
70 #define TX_DESC_MIN0 16
71 #define TX_DESC_MAX0 128
72 #define TX_DESC_DEF0 32
73 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
75 #define TX_DESC_MIN1 16
76 #define TX_DESC_MAX1 128
77 #define TX_DESC_DEF1 64
78 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
80 #define INT_WORKS_DEF 20
81 #define INT_WORKS_MIN 10
82 #define INT_WORKS_MAX 64
84 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
86 #define RTS_THRESH_DEF 2347
88 #define FRAG_THRESH_DEF 2346
90 #define SHORT_RETRY_MIN 0
91 #define SHORT_RETRY_MAX 31
92 #define SHORT_RETRY_DEF 8
94 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
96 #define LONG_RETRY_MIN 0
97 #define LONG_RETRY_MAX 15
98 #define LONG_RETRY_DEF 4
100 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
102 /* BasebandType[] baseband type selected
103 * 0: indicate 802.11a type
104 * 1: indicate 802.11b type
105 * 2: indicate 802.11g type
107 #define BBP_TYPE_MIN 0
108 #define BBP_TYPE_MAX 2
109 #define BBP_TYPE_DEF 2
111 DEVICE_PARAM(BasebandType, "baseband type");
114 * Static vars definitions
116 static const struct pci_device_id vt6655_pci_id_table[] = {
117 { PCI_VDEVICE(VIA, 0x3253) },
121 /*--------------------- Static Functions --------------------------*/
123 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
124 static void device_free_info(struct vnt_private *priv);
125 static void device_print_info(struct vnt_private *priv);
127 static void device_init_rd0_ring(struct vnt_private *priv);
128 static void device_init_rd1_ring(struct vnt_private *priv);
129 static void device_init_td0_ring(struct vnt_private *priv);
130 static void device_init_td1_ring(struct vnt_private *priv);
132 static int device_rx_srv(struct vnt_private *priv, unsigned int idx);
133 static int device_tx_srv(struct vnt_private *priv, unsigned int idx);
134 static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *);
135 static void device_init_registers(struct vnt_private *priv);
136 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
137 static void device_free_td0_ring(struct vnt_private *priv);
138 static void device_free_td1_ring(struct vnt_private *priv);
139 static void device_free_rd0_ring(struct vnt_private *priv);
140 static void device_free_rd1_ring(struct vnt_private *priv);
141 static void device_free_rings(struct vnt_private *priv);
143 /*--------------------- Export Variables --------------------------*/
145 /*--------------------- Export Functions --------------------------*/
147 static void vt6655_remove(struct pci_dev *pcid)
149 struct vnt_private *priv = pci_get_drvdata(pcid);
153 device_free_info(priv);
156 static void device_get_options(struct vnt_private *priv)
158 struct vnt_options *opts = &priv->opts;
160 opts->rx_descs0 = RX_DESC_DEF0;
161 opts->rx_descs1 = RX_DESC_DEF1;
162 opts->tx_descs[0] = TX_DESC_DEF0;
163 opts->tx_descs[1] = TX_DESC_DEF1;
164 opts->int_works = INT_WORKS_DEF;
166 opts->short_retry = SHORT_RETRY_DEF;
167 opts->long_retry = LONG_RETRY_DEF;
168 opts->bbp_type = BBP_TYPE_DEF;
172 device_set_options(struct vnt_private *priv)
174 priv->byShortRetryLimit = priv->opts.short_retry;
175 priv->byLongRetryLimit = priv->opts.long_retry;
176 priv->byBBType = priv->opts.bbp_type;
177 priv->byPacketType = priv->byBBType;
178 priv->byAutoFBCtrl = AUTO_FB_0;
179 priv->bUpdateBBVGA = true;
180 priv->byPreambleType = 0;
182 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit);
183 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit);
184 pr_debug(" byPreambleType= %d\n", (int)priv->byPreambleType);
185 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble);
186 pr_debug(" byBBType= %d\n", (int)priv->byBBType);
190 * Initialisation of MAC & BBP registers
193 static void device_init_registers(struct vnt_private *priv)
197 unsigned char byValue;
198 unsigned char byCCKPwrdBm = 0;
199 unsigned char byOFDMPwrdBm = 0;
202 BBvSoftwareReset(priv);
204 /* Do MACbSoftwareReset in MACvInitialize */
205 MACbSoftwareReset(priv);
209 /* Only used in 11g type, sync with ERP IE */
210 priv->bProtectMode = false;
212 priv->bNonERPPresent = false;
213 priv->bBarkerPreambleMd = false;
214 priv->wCurrentRate = RATE_1M;
215 priv->byTopOFDMBasicRate = RATE_24M;
216 priv->byTopCCKBasicRate = RATE_1M;
219 MACvInitialize(priv);
222 VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID);
224 spin_lock_irqsave(&priv->lock, flags);
226 SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM);
228 spin_unlock_irqrestore(&priv->lock, flags);
230 /* Get Channel range */
231 priv->byMinChannel = 1;
232 priv->byMaxChannel = CB_MAX_CHANNEL;
235 byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA);
236 if (byValue & EEP_ANTINV)
237 priv->bTxRxAntInv = true;
239 priv->bTxRxAntInv = false;
241 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
242 /* if not set default is All */
244 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
246 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
247 priv->byAntennaCount = 2;
248 priv->byTxAntennaMode = ANT_B;
249 priv->dwTxAntennaSel = 1;
250 priv->dwRxAntennaSel = 1;
252 if (priv->bTxRxAntInv)
253 priv->byRxAntennaMode = ANT_A;
255 priv->byRxAntennaMode = ANT_B;
257 priv->byAntennaCount = 1;
258 priv->dwTxAntennaSel = 0;
259 priv->dwRxAntennaSel = 0;
261 if (byValue & EEP_ANTENNA_AUX) {
262 priv->byTxAntennaMode = ANT_A;
264 if (priv->bTxRxAntInv)
265 priv->byRxAntennaMode = ANT_B;
267 priv->byRxAntennaMode = ANT_A;
269 priv->byTxAntennaMode = ANT_B;
271 if (priv->bTxRxAntInv)
272 priv->byRxAntennaMode = ANT_A;
274 priv->byRxAntennaMode = ANT_B;
278 /* Set initial antenna mode */
279 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
280 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
282 /* zonetype initial */
283 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
285 if (!priv->bZoneRegExist)
286 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
288 pr_debug("priv->byZoneType = %x\n", priv->byZoneType);
293 /* Get Desire Power Value */
294 priv->byCurPwr = 0xFF;
295 priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK);
296 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_OFDMG);
298 /* Load power Table */
299 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
300 priv->abyCCKPwrTbl[ii + 1] =
301 SROMbyReadEmbedded(priv->PortOffset,
302 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
303 if (priv->abyCCKPwrTbl[ii + 1] == 0)
304 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr;
306 priv->abyOFDMPwrTbl[ii + 1] =
307 SROMbyReadEmbedded(priv->PortOffset,
308 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
309 if (priv->abyOFDMPwrTbl[ii + 1] == 0)
310 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG;
312 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
313 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
316 /* recover 12,13 ,14channel for EUROPE by 11 channel */
317 for (ii = 11; ii < 14; ii++) {
318 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10];
319 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10];
322 /* Load OFDM A Power Table */
323 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
324 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
325 SROMbyReadEmbedded(priv->PortOffset,
326 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
328 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
329 SROMbyReadEmbedded(priv->PortOffset,
330 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
333 if (priv->byLocalID > REV_ID_VT3253_B1) {
334 MACvSelectPage1(priv->PortOffset);
336 VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1,
337 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
339 MACvSelectPage0(priv->PortOffset);
342 /* use relative tx timeout and 802.11i D4 */
343 MACvWordRegBitsOn(priv->PortOffset,
344 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
346 /* set performance parameter by registry */
347 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
348 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit);
350 /* reset TSF counter */
351 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
352 /* enable TSF counter */
353 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
355 /* initialize BBP registers */
358 if (priv->bUpdateBBVGA) {
359 priv->byBBVGACurrent = priv->abyBBVGA[0];
360 priv->byBBVGANew = priv->byBBVGACurrent;
361 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
364 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
365 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
367 /* Set BB and packet type at the same time. */
368 /* Set Short Slot Time, xIFS, and RSPINF. */
369 priv->wCurrentRate = RATE_54M;
371 priv->bRadioOff = false;
373 priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset,
375 priv->bHWRadioOff = false;
377 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) {
379 MACvGPIOIn(priv->PortOffset, &priv->byGPIO);
381 if (((priv->byGPIO & GPIO0_DATA) &&
382 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) ||
383 (!(priv->byGPIO & GPIO0_DATA) &&
384 (priv->byRadioCtl & EEP_RADIOCTL_INV)))
385 priv->bHWRadioOff = true;
388 if (priv->bHWRadioOff || priv->bRadioControlOff)
389 CARDbRadioPowerOff(priv);
391 /* get Permanent network address */
392 SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
393 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr);
395 /* reset Tx pointer */
396 CARDvSafeResetRx(priv);
397 /* reset Rx pointer */
398 CARDvSafeResetTx(priv);
400 if (priv->byLocalID <= REV_ID_VT3253_A1)
401 MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR);
404 MACvReceive0(priv->PortOffset);
405 MACvReceive1(priv->PortOffset);
407 /* start the adapter */
408 MACvStart(priv->PortOffset);
411 static void device_print_info(struct vnt_private *priv)
413 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
414 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr,
415 (unsigned long)priv->PortOffset, priv->pcid->irq);
418 static void device_free_info(struct vnt_private *priv)
424 ieee80211_unregister_hw(priv->hw);
426 if (priv->PortOffset)
427 iounmap(priv->PortOffset);
430 pci_release_regions(priv->pcid);
433 ieee80211_free_hw(priv->hw);
436 static bool device_init_rings(struct vnt_private *priv)
440 /*allocate all RD/TD rings a single pool*/
441 vir_pool = dma_zalloc_coherent(&priv->pcid->dev,
442 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
443 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
444 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
445 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
446 &priv->pool_dma, GFP_ATOMIC);
448 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n");
452 priv->aRD0Ring = vir_pool;
453 priv->aRD1Ring = vir_pool +
454 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
456 priv->rd0_pool_dma = priv->pool_dma;
457 priv->rd1_pool_dma = priv->rd0_pool_dma +
458 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
460 priv->tx0_bufs = dma_zalloc_coherent(&priv->pcid->dev,
461 priv->opts.tx_descs[0] * PKT_BUF_SZ +
462 priv->opts.tx_descs[1] * PKT_BUF_SZ +
467 if (!priv->tx0_bufs) {
468 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n");
470 dma_free_coherent(&priv->pcid->dev,
471 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
472 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
473 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
474 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
475 vir_pool, priv->pool_dma);
479 priv->td0_pool_dma = priv->rd1_pool_dma +
480 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
482 priv->td1_pool_dma = priv->td0_pool_dma +
483 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
485 /* vir_pool: pvoid type */
486 priv->apTD0Rings = vir_pool
487 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
488 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
490 priv->apTD1Rings = vir_pool
491 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
492 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc)
493 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
495 priv->tx1_bufs = priv->tx0_bufs +
496 priv->opts.tx_descs[0] * PKT_BUF_SZ;
498 priv->tx_beacon_bufs = priv->tx1_bufs +
499 priv->opts.tx_descs[1] * PKT_BUF_SZ;
501 priv->pbyTmpBuff = priv->tx_beacon_bufs +
504 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 +
505 priv->opts.tx_descs[0] * PKT_BUF_SZ;
507 priv->tx_beacon_dma = priv->tx_bufs_dma1 +
508 priv->opts.tx_descs[1] * PKT_BUF_SZ;
513 static void device_free_rings(struct vnt_private *priv)
515 dma_free_coherent(&priv->pcid->dev,
516 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
517 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
518 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
519 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
520 priv->aRD0Ring, priv->pool_dma);
523 dma_free_coherent(&priv->pcid->dev,
524 priv->opts.tx_descs[0] * PKT_BUF_SZ +
525 priv->opts.tx_descs[1] * PKT_BUF_SZ +
528 priv->tx0_bufs, priv->tx_bufs_dma0);
531 static void device_init_rd0_ring(struct vnt_private *priv)
534 dma_addr_t curr = priv->rd0_pool_dma;
535 struct vnt_rx_desc *desc;
537 /* Init the RD0 ring entries */
538 for (i = 0; i < priv->opts.rx_descs0;
539 i ++, curr += sizeof(struct vnt_rx_desc)) {
540 desc = &priv->aRD0Ring[i];
541 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
543 if (!device_alloc_rx_buf(priv, desc))
544 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
546 desc->next = &priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0];
547 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
551 priv->aRD0Ring[i-1].next_desc = cpu_to_le32(priv->rd0_pool_dma);
552 priv->pCurrRD[0] = &priv->aRD0Ring[0];
555 static void device_init_rd1_ring(struct vnt_private *priv)
558 dma_addr_t curr = priv->rd1_pool_dma;
559 struct vnt_rx_desc *desc;
561 /* Init the RD1 ring entries */
562 for (i = 0; i < priv->opts.rx_descs1;
563 i ++, curr += sizeof(struct vnt_rx_desc)) {
564 desc = &priv->aRD1Ring[i];
565 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
567 if (!device_alloc_rx_buf(priv, desc))
568 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
570 desc->next = &priv->aRD1Ring[(i+1) % priv->opts.rx_descs1];
571 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
575 priv->aRD1Ring[i-1].next_desc = cpu_to_le32(priv->rd1_pool_dma);
576 priv->pCurrRD[1] = &priv->aRD1Ring[0];
579 static void device_free_rd0_ring(struct vnt_private *priv)
583 for (i = 0; i < priv->opts.rx_descs0; i++) {
584 struct vnt_rx_desc *desc = &priv->aRD0Ring[i];
585 struct vnt_rd_info *rd_info = desc->rd_info;
587 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
588 priv->rx_buf_sz, DMA_FROM_DEVICE);
590 dev_kfree_skb(rd_info->skb);
592 kfree(desc->rd_info);
596 static void device_free_rd1_ring(struct vnt_private *priv)
600 for (i = 0; i < priv->opts.rx_descs1; i++) {
601 struct vnt_rx_desc *desc = &priv->aRD1Ring[i];
602 struct vnt_rd_info *rd_info = desc->rd_info;
604 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
605 priv->rx_buf_sz, DMA_FROM_DEVICE);
607 dev_kfree_skb(rd_info->skb);
609 kfree(desc->rd_info);
613 static void device_init_td0_ring(struct vnt_private *priv)
617 struct vnt_tx_desc *desc;
619 curr = priv->td0_pool_dma;
620 for (i = 0; i < priv->opts.tx_descs[0];
621 i++, curr += sizeof(struct vnt_tx_desc)) {
622 desc = &priv->apTD0Rings[i];
623 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
625 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ;
626 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ;
628 desc->next = &(priv->apTD0Rings[(i+1) % priv->opts.tx_descs[0]]);
629 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
633 priv->apTD0Rings[i-1].next_desc = cpu_to_le32(priv->td0_pool_dma);
634 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0];
637 static void device_init_td1_ring(struct vnt_private *priv)
641 struct vnt_tx_desc *desc;
643 /* Init the TD ring entries */
644 curr = priv->td1_pool_dma;
645 for (i = 0; i < priv->opts.tx_descs[1];
646 i++, curr += sizeof(struct vnt_tx_desc)) {
647 desc = &priv->apTD1Rings[i];
648 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
650 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ;
651 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ;
653 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]);
654 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
658 priv->apTD1Rings[i-1].next_desc = cpu_to_le32(priv->td1_pool_dma);
659 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0];
662 static void device_free_td0_ring(struct vnt_private *priv)
666 for (i = 0; i < priv->opts.tx_descs[0]; i++) {
667 struct vnt_tx_desc *desc = &priv->apTD0Rings[i];
668 struct vnt_td_info *td_info = desc->td_info;
670 dev_kfree_skb(td_info->skb);
671 kfree(desc->td_info);
675 static void device_free_td1_ring(struct vnt_private *priv)
679 for (i = 0; i < priv->opts.tx_descs[1]; i++) {
680 struct vnt_tx_desc *desc = &priv->apTD1Rings[i];
681 struct vnt_td_info *td_info = desc->td_info;
683 dev_kfree_skb(td_info->skb);
684 kfree(desc->td_info);
688 /*-----------------------------------------------------------------*/
690 static int device_rx_srv(struct vnt_private *priv, unsigned int idx)
692 struct vnt_rx_desc *rd;
695 for (rd = priv->pCurrRD[idx];
696 rd->rd0.owner == OWNED_BY_HOST;
701 if (!rd->rd_info->skb)
704 if (vnt_receive_frame(priv, rd)) {
705 if (!device_alloc_rx_buf(priv, rd)) {
706 dev_err(&priv->pcid->dev,
707 "can not allocate rx buf\n");
711 rd->rd0.owner = OWNED_BY_NIC;
714 priv->pCurrRD[idx] = rd;
719 static bool device_alloc_rx_buf(struct vnt_private *priv,
720 struct vnt_rx_desc *rd)
722 struct vnt_rd_info *rd_info = rd->rd_info;
724 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz);
729 dma_map_single(&priv->pcid->dev,
730 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)),
731 priv->rx_buf_sz, DMA_FROM_DEVICE);
732 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) {
733 dev_kfree_skb(rd_info->skb);
738 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */
740 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
741 rd->rd0.owner = OWNED_BY_NIC;
742 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
743 rd->buff_addr = cpu_to_le32(rd_info->skb_dma);
748 static const u8 fallback_rate0[5][5] = {
749 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
750 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
751 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
752 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
753 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
756 static const u8 fallback_rate1[5][5] = {
757 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
758 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
759 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
760 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
761 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
764 static int vnt_int_report_rate(struct vnt_private *priv,
765 struct vnt_td_info *context, u8 tsr0, u8 tsr1)
767 struct vnt_tx_fifo_head *fifo_head;
768 struct ieee80211_tx_info *info;
769 struct ieee80211_rate *rate;
771 u8 tx_retry = (tsr0 & TSR0_NCR);
780 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
781 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
782 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
784 info = IEEE80211_SKB_CB(context->skb);
785 idx = info->control.rates[0].idx;
787 if (fb_option && !(tsr1 & TSR1_TERR)) {
791 rate = ieee80211_get_tx_rate(priv->hw, info);
792 tx_rate = rate->hw_value - RATE_18M;
797 if (fb_option & FIFOCTL_AUTO_FB_0)
798 tx_rate = fallback_rate0[tx_rate][retry];
799 else if (fb_option & FIFOCTL_AUTO_FB_1)
800 tx_rate = fallback_rate1[tx_rate][retry];
802 if (info->band == NL80211_BAND_5GHZ)
803 idx = tx_rate - RATE_6M;
808 ieee80211_tx_info_clear_status(info);
810 info->status.rates[0].count = tx_retry;
812 if (!(tsr1 & TSR1_TERR)) {
813 info->status.rates[0].idx = idx;
815 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
816 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
818 info->flags |= IEEE80211_TX_STAT_ACK;
824 static int device_tx_srv(struct vnt_private *priv, unsigned int idx)
826 struct vnt_tx_desc *desc;
828 unsigned char byTsr0;
829 unsigned char byTsr1;
831 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) {
832 if (desc->td0.owner == OWNED_BY_NIC)
837 byTsr0 = desc->td0.tsr0;
838 byTsr1 = desc->td0.tsr1;
840 /* Only the status of first TD in the chain is correct */
841 if (desc->td1.tcr & TCR_STP) {
842 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
843 if (!(byTsr1 & TSR1_TERR)) {
845 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
850 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
851 (int)idx, byTsr1, byTsr0);
855 if (byTsr1 & TSR1_TERR) {
856 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
857 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
858 (int)idx, byTsr1, byTsr0);
862 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1);
864 device_free_tx_buf(priv, desc);
865 priv->iTDUsed[idx]--;
869 priv->apTailTD[idx] = desc;
874 static void device_error(struct vnt_private *priv, unsigned short status)
876 if (status & ISR_FETALERR) {
877 dev_err(&priv->pcid->dev, "Hardware fatal error\n");
884 static void device_free_tx_buf(struct vnt_private *priv,
885 struct vnt_tx_desc *desc)
887 struct vnt_td_info *td_info = desc->td_info;
888 struct sk_buff *skb = td_info->skb;
891 ieee80211_tx_status_irqsafe(priv->hw, skb);
897 static void vnt_check_bb_vga(struct vnt_private *priv)
902 if (!priv->bUpdateBBVGA)
905 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
908 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
911 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
913 for (i = 0; i < BB_VGA_LEVEL; i++) {
914 if (dbm < priv->ldBmThreshold[i]) {
915 priv->byBBVGANew = priv->abyBBVGA[i];
920 if (priv->byBBVGANew == priv->byBBVGACurrent) {
921 priv->uBBVGADiffCount = 1;
925 priv->uBBVGADiffCount++;
927 if (priv->uBBVGADiffCount == 1) {
928 /* first VGA diff gain */
929 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
931 dev_dbg(&priv->pcid->dev,
932 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
933 (int)dbm, priv->byBBVGANew,
934 priv->byBBVGACurrent,
935 (int)priv->uBBVGADiffCount);
938 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
939 dev_dbg(&priv->pcid->dev,
940 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
941 (int)dbm, priv->byBBVGANew,
942 priv->byBBVGACurrent,
943 (int)priv->uBBVGADiffCount);
945 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
949 static void vnt_interrupt_process(struct vnt_private *priv)
951 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
957 MACvReadISR(priv->PortOffset, &isr);
962 if (isr == 0xffffffff) {
963 pr_debug("isr = 0xffff\n");
967 MACvIntDisable(priv->PortOffset);
969 spin_lock_irqsave(&priv->lock, flags);
971 /* Read low level stats */
972 MACvReadMIBCounter(priv->PortOffset, &mib_counter);
974 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
975 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
976 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
977 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
981 * Must do this after doing rx/tx, cause ISR bit is slow
982 * than RD/TD write back
985 while (isr && priv->vif) {
986 MACvWriteISR(priv->PortOffset, isr);
988 if (isr & ISR_FETALERR) {
989 pr_debug(" ISR_FETALERR\n");
990 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
991 VNSvOutPortW(priv->PortOffset +
992 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
993 device_error(priv, isr);
996 if (isr & ISR_TBTT) {
997 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
998 vnt_check_bb_vga(priv);
1000 priv->bBeaconSent = false;
1001 if (priv->bEnablePSMode)
1002 PSbIsNextTBTTWakeUp((void *)priv);
1004 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1005 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1006 priv->vif->bss_conf.enable_beacon) {
1007 MACvOneShotTimer1MicroSec(priv,
1008 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
1011 /* TODO: adhoc PS mode */
1014 if (isr & ISR_BNTX) {
1015 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1016 priv->bIsBeaconBufReadySet = false;
1017 priv->cbBeaconBufReadySetCnt = 0;
1020 priv->bBeaconSent = true;
1023 if (isr & ISR_RXDMA0)
1024 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1026 if (isr & ISR_RXDMA1)
1027 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1029 if (isr & ISR_TXDMA0)
1030 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1032 if (isr & ISR_AC0DMA)
1033 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1035 if (isr & ISR_SOFTTIMER1) {
1036 if (priv->vif->bss_conf.enable_beacon)
1037 vnt_beacon_make(priv, priv->vif);
1040 /* If both buffers available wake the queue */
1041 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1042 AVAIL_TD(priv, TYPE_AC0DMA) &&
1043 ieee80211_queue_stopped(priv->hw, 0))
1044 ieee80211_wake_queues(priv->hw);
1046 MACvReadISR(priv->PortOffset, &isr);
1048 MACvReceive0(priv->PortOffset);
1049 MACvReceive1(priv->PortOffset);
1051 if (max_count > priv->opts.int_works)
1055 spin_unlock_irqrestore(&priv->lock, flags);
1057 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1060 static void vnt_interrupt_work(struct work_struct *work)
1062 struct vnt_private *priv =
1063 container_of(work, struct vnt_private, interrupt_work);
1066 vnt_interrupt_process(priv);
1069 static irqreturn_t vnt_interrupt(int irq, void *arg)
1071 struct vnt_private *priv = arg;
1074 schedule_work(&priv->interrupt_work);
1079 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1081 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1082 struct vnt_tx_desc *head_td;
1084 unsigned long flags;
1086 spin_lock_irqsave(&priv->lock, flags);
1088 if (ieee80211_is_data(hdr->frame_control))
1089 dma_idx = TYPE_AC0DMA;
1091 dma_idx = TYPE_TXDMA0;
1093 if (AVAIL_TD(priv, dma_idx) < 1) {
1094 spin_unlock_irqrestore(&priv->lock, flags);
1095 ieee80211_stop_queues(priv->hw);
1099 head_td = priv->apCurrTD[dma_idx];
1101 head_td->td1.tcr = 0;
1103 head_td->td_info->skb = skb;
1105 if (dma_idx == TYPE_AC0DMA)
1106 head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
1108 priv->apCurrTD[dma_idx] = head_td->next;
1110 spin_unlock_irqrestore(&priv->lock, flags);
1112 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1114 spin_lock_irqsave(&priv->lock, flags);
1116 priv->bPWBitOn = false;
1118 /* Set TSR1 & ReqCount in TxDescHead */
1119 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
1120 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
1122 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
1124 /* Poll Transmit the adapter */
1126 head_td->td0.owner = OWNED_BY_NIC;
1127 wmb(); /* second memory barrier */
1129 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
1130 MACvTransmitAC0(priv->PortOffset);
1132 MACvTransmit0(priv->PortOffset);
1134 priv->iTDUsed[dma_idx]++;
1136 spin_unlock_irqrestore(&priv->lock, flags);
1141 static void vnt_tx_80211(struct ieee80211_hw *hw,
1142 struct ieee80211_tx_control *control,
1143 struct sk_buff *skb)
1145 struct vnt_private *priv = hw->priv;
1147 if (vnt_tx_packet(priv, skb))
1148 ieee80211_free_txskb(hw, skb);
1151 static int vnt_start(struct ieee80211_hw *hw)
1153 struct vnt_private *priv = hw->priv;
1156 priv->rx_buf_sz = PKT_BUF_SZ;
1157 if (!device_init_rings(priv))
1160 ret = request_irq(priv->pcid->irq, vnt_interrupt,
1161 IRQF_SHARED, "vt6655", priv);
1163 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1167 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1168 device_init_rd0_ring(priv);
1169 device_init_rd1_ring(priv);
1170 device_init_td0_ring(priv);
1171 device_init_td1_ring(priv);
1173 device_init_registers(priv);
1175 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1176 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1178 ieee80211_wake_queues(hw);
1183 static void vnt_stop(struct ieee80211_hw *hw)
1185 struct vnt_private *priv = hw->priv;
1187 ieee80211_stop_queues(hw);
1189 cancel_work_sync(&priv->interrupt_work);
1192 MACbSoftwareReset(priv);
1193 CARDbRadioPowerOff(priv);
1195 device_free_td0_ring(priv);
1196 device_free_td1_ring(priv);
1197 device_free_rd0_ring(priv);
1198 device_free_rd1_ring(priv);
1199 device_free_rings(priv);
1201 free_irq(priv->pcid->irq, priv);
1204 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1206 struct vnt_private *priv = hw->priv;
1210 switch (vif->type) {
1211 case NL80211_IFTYPE_STATION:
1213 case NL80211_IFTYPE_ADHOC:
1214 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1216 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1219 case NL80211_IFTYPE_AP:
1220 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1222 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1229 priv->op_mode = vif->type;
1234 static void vnt_remove_interface(struct ieee80211_hw *hw,
1235 struct ieee80211_vif *vif)
1237 struct vnt_private *priv = hw->priv;
1239 switch (vif->type) {
1240 case NL80211_IFTYPE_STATION:
1242 case NL80211_IFTYPE_ADHOC:
1243 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1244 MACvRegBitsOff(priv->PortOffset,
1245 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1246 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1248 case NL80211_IFTYPE_AP:
1249 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1250 MACvRegBitsOff(priv->PortOffset,
1251 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1252 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1258 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1261 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1263 struct vnt_private *priv = hw->priv;
1264 struct ieee80211_conf *conf = &hw->conf;
1267 if (changed & IEEE80211_CONF_CHANGE_PS) {
1268 if (conf->flags & IEEE80211_CONF_PS)
1269 PSvEnablePowerSaving(priv, conf->listen_interval);
1271 PSvDisablePowerSaving(priv);
1274 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1275 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1276 set_channel(priv, conf->chandef.chan);
1278 if (conf->chandef.chan->band == NL80211_BAND_5GHZ)
1279 bb_type = BB_TYPE_11A;
1281 bb_type = BB_TYPE_11G;
1283 if (priv->byBBType != bb_type) {
1284 priv->byBBType = bb_type;
1286 CARDbSetPhyParameter(priv, priv->byBBType);
1290 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1291 if (priv->byBBType == BB_TYPE_11B)
1292 priv->wCurrentRate = RATE_1M;
1294 priv->wCurrentRate = RATE_54M;
1296 RFbSetPower(priv, priv->wCurrentRate,
1297 conf->chandef.chan->hw_value);
1303 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1304 struct ieee80211_vif *vif,
1305 struct ieee80211_bss_conf *conf, u32 changed)
1307 struct vnt_private *priv = hw->priv;
1309 priv->current_aid = conf->aid;
1311 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1312 unsigned long flags;
1314 spin_lock_irqsave(&priv->lock, flags);
1316 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1318 spin_unlock_irqrestore(&priv->lock, flags);
1321 if (changed & BSS_CHANGED_BASIC_RATES) {
1322 priv->basic_rates = conf->basic_rates;
1324 CARDvUpdateBasicTopRate(priv);
1326 dev_dbg(&priv->pcid->dev,
1327 "basic rates %x\n", conf->basic_rates);
1330 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1331 if (conf->use_short_preamble) {
1332 MACvEnableBarkerPreambleMd(priv->PortOffset);
1333 priv->byPreambleType = true;
1335 MACvDisableBarkerPreambleMd(priv->PortOffset);
1336 priv->byPreambleType = false;
1340 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1341 if (conf->use_cts_prot)
1342 MACvEnableProtectMD(priv->PortOffset);
1344 MACvDisableProtectMD(priv->PortOffset);
1347 if (changed & BSS_CHANGED_ERP_SLOT) {
1348 if (conf->use_short_slot)
1349 priv->bShortSlotTime = true;
1351 priv->bShortSlotTime = false;
1353 CARDbSetPhyParameter(priv, priv->byBBType);
1354 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1357 if (changed & BSS_CHANGED_TXPOWER)
1358 RFbSetPower(priv, priv->wCurrentRate,
1359 conf->chandef.chan->hw_value);
1361 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1362 dev_dbg(&priv->pcid->dev,
1363 "Beacon enable %d\n", conf->enable_beacon);
1365 if (conf->enable_beacon) {
1366 vnt_beacon_enable(priv, vif, conf);
1368 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1371 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1376 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1377 priv->op_mode != NL80211_IFTYPE_AP) {
1378 if (conf->assoc && conf->beacon_rate) {
1379 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1382 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1384 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1386 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1388 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1394 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1395 struct netdev_hw_addr_list *mc_list)
1397 struct vnt_private *priv = hw->priv;
1398 struct netdev_hw_addr *ha;
1402 netdev_hw_addr_list_for_each(ha, mc_list) {
1403 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1405 mc_filter |= 1ULL << (bit_nr & 0x3f);
1408 priv->mc_list_count = mc_list->count;
1413 static void vnt_configure(struct ieee80211_hw *hw,
1414 unsigned int changed_flags,
1415 unsigned int *total_flags, u64 multicast)
1417 struct vnt_private *priv = hw->priv;
1420 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1422 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1424 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1426 if (changed_flags & FIF_ALLMULTI) {
1427 if (*total_flags & FIF_ALLMULTI) {
1428 unsigned long flags;
1430 spin_lock_irqsave(&priv->lock, flags);
1432 if (priv->mc_list_count > 2) {
1433 MACvSelectPage1(priv->PortOffset);
1435 VNSvOutPortD(priv->PortOffset +
1436 MAC_REG_MAR0, 0xffffffff);
1437 VNSvOutPortD(priv->PortOffset +
1438 MAC_REG_MAR0 + 4, 0xffffffff);
1440 MACvSelectPage0(priv->PortOffset);
1442 MACvSelectPage1(priv->PortOffset);
1444 VNSvOutPortD(priv->PortOffset +
1445 MAC_REG_MAR0, (u32)multicast);
1446 VNSvOutPortD(priv->PortOffset +
1448 (u32)(multicast >> 32));
1450 MACvSelectPage0(priv->PortOffset);
1453 spin_unlock_irqrestore(&priv->lock, flags);
1455 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1457 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1461 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1462 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1464 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1465 rx_mode &= ~RCR_BSSID;
1467 rx_mode |= RCR_BSSID;
1470 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1472 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1475 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1476 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1477 struct ieee80211_key_conf *key)
1479 struct vnt_private *priv = hw->priv;
1483 if (vnt_set_keys(hw, sta, vif, key))
1487 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1488 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1496 static int vnt_get_stats(struct ieee80211_hw *hw,
1497 struct ieee80211_low_level_stats *stats)
1499 struct vnt_private *priv = hw->priv;
1501 memcpy(stats, &priv->low_stats, sizeof(*stats));
1506 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1508 struct vnt_private *priv = hw->priv;
1511 CARDbGetCurrentTSF(priv, &tsf);
1516 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1519 struct vnt_private *priv = hw->priv;
1521 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1524 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1526 struct vnt_private *priv = hw->priv;
1528 /* reset TSF counter */
1529 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1532 static const struct ieee80211_ops vnt_mac_ops = {
1536 .add_interface = vnt_add_interface,
1537 .remove_interface = vnt_remove_interface,
1538 .config = vnt_config,
1539 .bss_info_changed = vnt_bss_info_changed,
1540 .prepare_multicast = vnt_prepare_multicast,
1541 .configure_filter = vnt_configure,
1542 .set_key = vnt_set_key,
1543 .get_stats = vnt_get_stats,
1544 .get_tsf = vnt_get_tsf,
1545 .set_tsf = vnt_set_tsf,
1546 .reset_tsf = vnt_reset_tsf,
1549 static int vnt_init(struct vnt_private *priv)
1551 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1553 vnt_init_bands(priv);
1555 if (ieee80211_register_hw(priv->hw))
1558 priv->mac_hw = true;
1560 CARDbRadioPowerOff(priv);
1566 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1568 struct vnt_private *priv;
1569 struct ieee80211_hw *hw;
1570 struct wiphy *wiphy;
1573 dev_notice(&pcid->dev,
1574 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1576 dev_notice(&pcid->dev,
1577 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1579 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1581 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1588 spin_lock_init(&priv->lock);
1592 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1594 if (pci_enable_device(pcid)) {
1595 device_free_info(priv);
1600 "Before get pci_info memaddr is %x\n", priv->memaddr);
1602 pci_set_master(pcid);
1604 priv->memaddr = pci_resource_start(pcid, 0);
1605 priv->ioaddr = pci_resource_start(pcid, 1);
1606 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1608 if (!priv->PortOffset) {
1609 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1610 device_free_info(priv);
1614 rc = pci_request_regions(pcid, DEVICE_NAME);
1616 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1617 device_free_info(priv);
1621 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
1622 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
1623 device_free_info(priv);
1627 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1630 if (!MACbSoftwareReset(priv)) {
1631 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1632 device_free_info(priv);
1635 /* initial to reload eeprom */
1636 MACvInitialize(priv);
1637 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1640 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1641 priv->byRFType &= RF_MASK;
1643 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1645 device_get_options(priv);
1646 device_set_options(priv);
1648 wiphy = priv->hw->wiphy;
1650 wiphy->frag_threshold = FRAG_THRESH_DEF;
1651 wiphy->rts_threshold = RTS_THRESH_DEF;
1652 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1653 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1655 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1656 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1657 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1658 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1659 ieee80211_hw_set(priv->hw, SUPPORTS_PS);
1661 priv->hw->max_signal = 100;
1666 device_print_info(priv);
1667 pci_set_drvdata(pcid, priv);
1672 /*------------------------------------------------------------------*/
1675 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1677 struct vnt_private *priv = pci_get_drvdata(pcid);
1678 unsigned long flags;
1680 spin_lock_irqsave(&priv->lock, flags);
1682 pci_save_state(pcid);
1686 pci_disable_device(pcid);
1688 spin_unlock_irqrestore(&priv->lock, flags);
1690 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1695 static int vt6655_resume(struct pci_dev *pcid)
1697 pci_set_power_state(pcid, PCI_D0);
1698 pci_enable_wake(pcid, PCI_D0, 0);
1699 pci_restore_state(pcid);
1705 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1707 static struct pci_driver device_driver = {
1708 .name = DEVICE_NAME,
1709 .id_table = vt6655_pci_id_table,
1710 .probe = vt6655_probe,
1711 .remove = vt6655_remove,
1713 .suspend = vt6655_suspend,
1714 .resume = vt6655_resume,
1718 module_pci_driver(device_driver);