1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Express I/O Virtualization (IOV) support
4 * Address Translation Service 1.0
9 * Copyright (C) 2011 Advanced Micro Devices,
12 #include <linux/export.h>
13 #include <linux/pci-ats.h>
14 #include <linux/pci.h>
15 #include <linux/slab.h>
19 void pci_ats_init(struct pci_dev *dev)
23 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
31 * pci_enable_ats - enable the ATS capability
32 * @dev: the PCI device
33 * @ps: the IOMMU page shift
35 * Returns 0 on success, or negative on failure.
37 int pci_enable_ats(struct pci_dev *dev, int ps)
45 if (WARN_ON(dev->ats_enabled))
48 if (ps < PCI_ATS_MIN_STU)
52 * Note that enabling ATS on a VF fails unless it's already enabled
53 * with the same STU on the PF.
55 ctrl = PCI_ATS_CTRL_ENABLE;
57 pdev = pci_physfn(dev);
58 if (pdev->ats_stu != ps)
61 atomic_inc(&pdev->ats_ref_cnt); /* count enabled VFs */
64 ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
66 pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
71 EXPORT_SYMBOL_GPL(pci_enable_ats);
74 * pci_disable_ats - disable the ATS capability
75 * @dev: the PCI device
77 void pci_disable_ats(struct pci_dev *dev)
82 if (WARN_ON(!dev->ats_enabled))
85 if (atomic_read(&dev->ats_ref_cnt))
86 return; /* VFs still enabled */
89 pdev = pci_physfn(dev);
90 atomic_dec(&pdev->ats_ref_cnt);
93 pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, &ctrl);
94 ctrl &= ~PCI_ATS_CTRL_ENABLE;
95 pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
99 EXPORT_SYMBOL_GPL(pci_disable_ats);
101 void pci_restore_ats_state(struct pci_dev *dev)
105 if (!dev->ats_enabled)
108 ctrl = PCI_ATS_CTRL_ENABLE;
110 ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
111 pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
113 EXPORT_SYMBOL_GPL(pci_restore_ats_state);
116 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
117 * @dev: the PCI device
119 * Returns the queue depth on success, or negative on failure.
121 * The ATS spec uses 0 in the Invalidate Queue Depth field to
122 * indicate that the function can accept 32 Invalidate Request.
123 * But here we use the `real' values (i.e. 1~32) for the Queue
124 * Depth; and 0 indicates the function shares the Queue with
125 * other functions (doesn't exclusively own a Queue).
127 int pci_ats_queue_depth(struct pci_dev *dev)
137 pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CAP, &cap);
138 return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) : PCI_ATS_MAX_QDEP;
140 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
142 #ifdef CONFIG_PCI_PRI
144 * pci_enable_pri - Enable PRI capability
145 * @ pdev: PCI device structure
147 * Returns 0 on success, negative value on error
149 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
155 if (WARN_ON(pdev->pri_enabled))
158 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
162 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
163 if (!(status & PCI_PRI_STATUS_STOPPED))
166 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
167 reqs = min(max_requests, reqs);
168 pdev->pri_reqs_alloc = reqs;
169 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
171 control = PCI_PRI_CTRL_ENABLE;
172 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
174 pdev->pri_enabled = 1;
178 EXPORT_SYMBOL_GPL(pci_enable_pri);
181 * pci_disable_pri - Disable PRI capability
182 * @pdev: PCI device structure
184 * Only clears the enabled-bit, regardless of its former value
186 void pci_disable_pri(struct pci_dev *pdev)
191 if (WARN_ON(!pdev->pri_enabled))
194 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
198 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
199 control &= ~PCI_PRI_CTRL_ENABLE;
200 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
202 pdev->pri_enabled = 0;
204 EXPORT_SYMBOL_GPL(pci_disable_pri);
207 * pci_restore_pri_state - Restore PRI
208 * @pdev: PCI device structure
210 void pci_restore_pri_state(struct pci_dev *pdev)
212 u16 control = PCI_PRI_CTRL_ENABLE;
213 u32 reqs = pdev->pri_reqs_alloc;
216 if (!pdev->pri_enabled)
219 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
223 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
224 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
226 EXPORT_SYMBOL_GPL(pci_restore_pri_state);
229 * pci_reset_pri - Resets device's PRI state
230 * @pdev: PCI device structure
232 * The PRI capability must be disabled before this function is called.
233 * Returns 0 on success, negative value on error.
235 int pci_reset_pri(struct pci_dev *pdev)
240 if (WARN_ON(pdev->pri_enabled))
243 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
247 control = PCI_PRI_CTRL_RESET;
248 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
252 EXPORT_SYMBOL_GPL(pci_reset_pri);
253 #endif /* CONFIG_PCI_PRI */
255 #ifdef CONFIG_PCI_PASID
257 * pci_enable_pasid - Enable the PASID capability
258 * @pdev: PCI device structure
259 * @features: Features to enable
261 * Returns 0 on success, negative value on error. This function checks
262 * whether the features are actually supported by the device and returns
265 int pci_enable_pasid(struct pci_dev *pdev, int features)
267 u16 control, supported;
270 if (WARN_ON(pdev->pasid_enabled))
273 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
277 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
278 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
280 /* User wants to enable anything unsupported? */
281 if ((supported & features) != features)
284 control = PCI_PASID_CTRL_ENABLE | features;
285 pdev->pasid_features = features;
287 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
289 pdev->pasid_enabled = 1;
293 EXPORT_SYMBOL_GPL(pci_enable_pasid);
296 * pci_disable_pasid - Disable the PASID capability
297 * @pdev: PCI device structure
299 void pci_disable_pasid(struct pci_dev *pdev)
304 if (WARN_ON(!pdev->pasid_enabled))
307 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
311 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
313 pdev->pasid_enabled = 0;
315 EXPORT_SYMBOL_GPL(pci_disable_pasid);
318 * pci_restore_pasid_state - Restore PASID capabilities
319 * @pdev: PCI device structure
321 void pci_restore_pasid_state(struct pci_dev *pdev)
326 if (!pdev->pasid_enabled)
329 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
333 control = PCI_PASID_CTRL_ENABLE | pdev->pasid_features;
334 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
336 EXPORT_SYMBOL_GPL(pci_restore_pasid_state);
339 * pci_pasid_features - Check which PASID features are supported
340 * @pdev: PCI device structure
342 * Returns a negative value when no PASI capability is present.
343 * Otherwise is returns a bitmask with supported features. Current
344 * features reported are:
345 * PCI_PASID_CAP_EXEC - Execute permission supported
346 * PCI_PASID_CAP_PRIV - Privileged mode supported
348 int pci_pasid_features(struct pci_dev *pdev)
353 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
357 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
359 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
363 EXPORT_SYMBOL_GPL(pci_pasid_features);
365 #define PASID_NUMBER_SHIFT 8
366 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
368 * pci_max_pasid - Get maximum number of PASIDs supported by device
369 * @pdev: PCI device structure
371 * Returns negative value when PASID capability is not present.
372 * Otherwise it returns the numer of supported PASIDs.
374 int pci_max_pasids(struct pci_dev *pdev)
379 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
383 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
385 supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
387 return (1 << supported);
389 EXPORT_SYMBOL_GPL(pci_max_pasids);
390 #endif /* CONFIG_PCI_PASID */