1 // SPDX-License-Identifier: GPL-2.0+
3 * i2c-algo-bit.c: i2c driver algorithms for bit-shift adapters
5 * Copyright (C) 1995-2000 Simon G. Vogl
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/i2c.h>
17 #include <linux/i2c-algo-bit.h>
20 /* ----- global defines ----------------------------------------------- */
23 #define bit_dbg(level, dev, format, args...) \
25 if (i2c_debug >= level) \
26 dev_dbg(dev, format, ##args); \
29 #define bit_dbg(level, dev, format, args...) \
33 /* ----- global variables --------------------------------------------- */
35 static int bit_test; /* see if the line-setting functions work */
36 module_param(bit_test, int, S_IRUGO);
37 MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
40 static int i2c_debug = 1;
41 module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
42 MODULE_PARM_DESC(i2c_debug,
43 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
46 /* --- setting states on the bus with the right timing: --------------- */
48 #define setsda(adap, val) adap->setsda(adap->data, val)
49 #define setscl(adap, val) adap->setscl(adap->data, val)
50 #define getsda(adap) adap->getsda(adap->data)
51 #define getscl(adap) adap->getscl(adap->data)
53 static inline void sdalo(struct i2c_algo_bit_data *adap)
56 udelay((adap->udelay + 1) / 2);
59 static inline void sdahi(struct i2c_algo_bit_data *adap)
62 udelay((adap->udelay + 1) / 2);
65 static inline void scllo(struct i2c_algo_bit_data *adap)
68 udelay(adap->udelay / 2);
72 * Raise scl line, and do checking for delays. This is necessary for slower
75 static int sclhi(struct i2c_algo_bit_data *adap)
81 /* Not all adapters have scl sense line... */
86 while (!getscl(adap)) {
87 /* This hw knows how to read the clock line, so we wait
88 * until it actually gets high. This is safer as some
89 * chips may hold it low ("clock stretching") while they
90 * are processing data internally.
92 if (time_after(jiffies, start + adap->timeout)) {
93 /* Test one last time, as we may have been preempted
94 * between last check and timeout test.
103 if (jiffies != start && i2c_debug >= 3)
104 pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n",
109 udelay(adap->udelay);
114 /* --- other auxiliary functions -------------------------------------- */
115 static void i2c_start(struct i2c_algo_bit_data *adap)
117 /* assert: scl, sda are high */
119 udelay(adap->udelay);
123 static void i2c_repstart(struct i2c_algo_bit_data *adap)
125 /* assert: scl is low */
129 udelay(adap->udelay);
134 static void i2c_stop(struct i2c_algo_bit_data *adap)
136 /* assert: scl is low */
140 udelay(adap->udelay);
145 /* send a byte without start cond., look for arbitration,
146 check ackn. from slave */
148 * 1 if the device acknowledged
149 * 0 if the device did not ack
150 * -ETIMEDOUT if an error occurred (while raising the scl line)
152 static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
157 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
159 /* assert: scl is low */
160 for (i = 7; i >= 0; i--) {
163 udelay((adap->udelay + 1) / 2);
164 if (sclhi(adap) < 0) { /* timed out */
165 bit_dbg(1, &i2c_adap->dev,
166 "i2c_outb: 0x%02x, timeout at bit #%d\n",
170 /* FIXME do arbitration here:
171 * if (sb && !getsda(adap)) -> ouch! Get out of here.
173 * Report a unique code, so higher level code can retry
174 * the whole (combined) message and *NOT* issue STOP.
179 if (sclhi(adap) < 0) { /* timeout */
180 bit_dbg(1, &i2c_adap->dev,
181 "i2c_outb: 0x%02x, timeout at ack\n", (int)c);
185 /* read ack: SDA should be pulled down by slave, or it may
186 * NAK (usually to report problems with the data we wrote).
188 ack = !getsda(adap); /* ack: sda is pulled low -> success */
189 bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
194 /* assert: scl is low (sda undef) */
198 static int i2c_inb(struct i2c_adapter *i2c_adap)
200 /* read byte via i2c port, without start/stop sequence */
201 /* acknowledge is sent in i2c_read. */
203 unsigned char indata = 0;
204 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
206 /* assert: scl is low */
208 for (i = 0; i < 8; i++) {
209 if (sclhi(adap) < 0) { /* timeout */
210 bit_dbg(1, &i2c_adap->dev,
211 "i2c_inb: timeout at bit #%d\n",
219 udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
221 /* assert: scl is low */
226 * Sanity check for the adapter hardware - check the reaction of
227 * the bus lines only if it seems to be idle.
229 static int test_bus(struct i2c_adapter *i2c_adap)
231 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
232 const char *name = i2c_adap->name;
235 if (adap->pre_xfer) {
236 ret = adap->pre_xfer(i2c_adap);
241 if (adap->getscl == NULL)
242 pr_info("%s: Testing SDA only, SCL is not readable\n", name);
245 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
248 "%s: bus seems to be busy (scl=%d, sda=%d)\n",
255 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
257 printk(KERN_WARNING "%s: SDA stuck high!\n", name);
262 "%s: SCL unexpected low while pulling SDA low!\n",
269 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
271 printk(KERN_WARNING "%s: SDA stuck low!\n", name);
276 "%s: SCL unexpected low while pulling SDA high!\n",
283 scl = (adap->getscl == NULL) ? 0 : getscl(adap);
285 printk(KERN_WARNING "%s: SCL stuck high!\n", name);
290 "%s: SDA unexpected low while pulling SCL low!\n",
297 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
299 printk(KERN_WARNING "%s: SCL stuck low!\n", name);
304 "%s: SDA unexpected low while pulling SCL high!\n",
310 adap->post_xfer(i2c_adap);
312 pr_info("%s: Test OK\n", name);
319 adap->post_xfer(i2c_adap);
324 /* ----- Utility functions
327 /* try_address tries to contact a chip for a number of
328 * times before it gives up.
331 * 0 chip did not answer
332 * -x transmission error
334 static int try_address(struct i2c_adapter *i2c_adap,
335 unsigned char addr, int retries)
337 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
340 for (i = 0; i <= retries; i++) {
341 ret = i2c_outb(i2c_adap, addr);
342 if (ret == 1 || i == retries)
344 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
346 udelay(adap->udelay);
348 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
352 bit_dbg(1, &i2c_adap->dev,
353 "Used %d tries to %s client at 0x%02x: %s\n", i + 1,
354 addr & 1 ? "read from" : "write to", addr >> 1,
355 ret == 1 ? "success" : "failed, timeout?");
359 static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
361 const unsigned char *temp = msg->buf;
362 int count = msg->len;
363 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
368 retval = i2c_outb(i2c_adap, *temp);
370 /* OK/ACK; or ignored NAK */
371 if ((retval > 0) || (nak_ok && (retval == 0))) {
376 /* A slave NAKing the master means the slave didn't like
377 * something about the data it saw. For example, maybe
378 * the SMBus PEC was wrong.
380 } else if (retval == 0) {
381 dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
384 /* Timeout; or (someday) lost arbitration
386 * FIXME Lost ARB implies retrying the transaction from
387 * the first message, after the "winning" master issues
388 * its STOP. As a rule, upper layer code has no reason
389 * to know or care about this ... it is *NOT* an error.
392 dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
400 static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
402 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
404 /* assert: sda is high */
405 if (is_ack) /* send ack */
407 udelay((adap->udelay + 1) / 2);
408 if (sclhi(adap) < 0) { /* timeout */
409 dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
416 static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
419 int rdcount = 0; /* counts bytes read */
420 unsigned char *temp = msg->buf;
421 int count = msg->len;
422 const unsigned flags = msg->flags;
425 inval = i2c_inb(i2c_adap);
429 } else { /* read timed out */
436 /* Some SMBus transactions require that we receive the
437 transaction length as the first read byte. */
438 if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
439 if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
440 if (!(flags & I2C_M_NO_RD_ACK))
442 dev_err(&i2c_adap->dev,
443 "readbytes: invalid block length (%d)\n",
447 /* The original count value accounts for the extra
448 bytes, that is, either 1 for a regular transaction,
449 or 2 for a PEC transaction. */
454 bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
456 (flags & I2C_M_NO_RD_ACK)
458 : (count ? "A" : "NA"));
460 if (!(flags & I2C_M_NO_RD_ACK)) {
461 inval = acknak(i2c_adap, count);
469 /* doAddress initiates the transfer by generating the start condition (in
470 * try_address) and transmits the address in the necessary format to handle
471 * reads, writes as well as 10bit-addresses.
473 * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
474 * -x an error occurred (like: -ENXIO if the device did not answer, or
475 * -ETIMEDOUT, for example if the lines are stuck...)
477 static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
479 unsigned short flags = msg->flags;
480 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
481 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
486 retries = nak_ok ? 0 : i2c_adap->retries;
488 if (flags & I2C_M_TEN) {
489 /* a ten bit address */
490 addr = 0xf0 | ((msg->addr >> 7) & 0x06);
491 bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
492 /* try extended address code...*/
493 ret = try_address(i2c_adap, addr, retries);
494 if ((ret != 1) && !nak_ok) {
495 dev_err(&i2c_adap->dev,
496 "died at extended address code\n");
499 /* the remaining 8 bit address */
500 ret = i2c_outb(i2c_adap, msg->addr & 0xff);
501 if ((ret != 1) && !nak_ok) {
502 /* the chip did not ack / xmission error occurred */
503 dev_err(&i2c_adap->dev, "died at 2nd address code\n");
506 if (flags & I2C_M_RD) {
507 bit_dbg(3, &i2c_adap->dev,
508 "emitting repeated start condition\n");
510 /* okay, now switch into reading mode */
512 ret = try_address(i2c_adap, addr, retries);
513 if ((ret != 1) && !nak_ok) {
514 dev_err(&i2c_adap->dev,
515 "died at repeated address code\n");
519 } else { /* normal 7bit address */
520 addr = i2c_8bit_addr_from_msg(msg);
521 if (flags & I2C_M_REV_DIR_ADDR)
523 ret = try_address(i2c_adap, addr, retries);
524 if ((ret != 1) && !nak_ok)
531 static int bit_xfer(struct i2c_adapter *i2c_adap,
532 struct i2c_msg msgs[], int num)
534 struct i2c_msg *pmsg;
535 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
537 unsigned short nak_ok;
539 if (adap->pre_xfer) {
540 ret = adap->pre_xfer(i2c_adap);
545 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
547 for (i = 0; i < num; i++) {
549 nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
550 if (!(pmsg->flags & I2C_M_NOSTART)) {
552 if (msgs[i - 1].flags & I2C_M_STOP) {
553 bit_dbg(3, &i2c_adap->dev,
554 "emitting enforced stop/start condition\n");
558 bit_dbg(3, &i2c_adap->dev,
559 "emitting repeated start condition\n");
563 ret = bit_doAddress(i2c_adap, pmsg);
564 if ((ret != 0) && !nak_ok) {
565 bit_dbg(1, &i2c_adap->dev,
566 "NAK from device addr 0x%02x msg #%d\n",
571 if (pmsg->flags & I2C_M_RD) {
572 /* read bytes into buffer*/
573 ret = readbytes(i2c_adap, pmsg);
575 bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
576 ret, ret == 1 ? "" : "s");
577 if (ret < pmsg->len) {
583 /* write bytes from buffer */
584 ret = sendbytes(i2c_adap, pmsg);
586 bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
587 ret, ret == 1 ? "" : "s");
588 if (ret < pmsg->len) {
598 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
602 adap->post_xfer(i2c_adap);
607 * We print a warning when we are not flagged to support atomic transfers but
608 * will try anyhow. That's what the I2C core would do as well. Sadly, we can't
609 * modify the algorithm struct at probe time because this struct is exported
612 static int bit_xfer_atomic(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[],
615 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
617 if (!adap->can_do_atomic)
618 dev_warn(&i2c_adap->dev, "not flagged for atomic transfers\n");
620 return bit_xfer(i2c_adap, msgs, num);
623 static u32 bit_func(struct i2c_adapter *adap)
625 return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL_ALL |
626 I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
630 /* -----exported algorithm data: ------------------------------------- */
632 const struct i2c_algorithm i2c_bit_algo = {
633 .master_xfer = bit_xfer,
634 .master_xfer_atomic = bit_xfer_atomic,
635 .functionality = bit_func,
637 EXPORT_SYMBOL(i2c_bit_algo);
639 static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {
640 .flags = I2C_AQ_NO_CLK_STRETCH,
644 * registering functions to load algorithms at runtime
646 static int __i2c_bit_add_bus(struct i2c_adapter *adap,
647 int (*add_adapter)(struct i2c_adapter *))
649 struct i2c_algo_bit_data *bit_adap = adap->algo_data;
653 ret = test_bus(adap);
654 if (bit_test >= 2 && ret < 0)
658 /* register new adapter to i2c module... */
659 adap->algo = &i2c_bit_algo;
661 if (bit_adap->getscl == NULL)
662 adap->quirks = &i2c_bit_quirk_no_clk_stretch;
665 * We tried forcing SCL/SDA to an initial state here. But that caused a
666 * regression, sadly. Check Bugzilla #200045 for details.
669 ret = add_adapter(adap);
673 /* Complain if SCL can't be read */
674 if (bit_adap->getscl == NULL) {
675 dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
676 dev_warn(&adap->dev, "Bus may be unreliable\n");
681 int i2c_bit_add_bus(struct i2c_adapter *adap)
683 return __i2c_bit_add_bus(adap, i2c_add_adapter);
685 EXPORT_SYMBOL(i2c_bit_add_bus);
687 int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
689 return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
691 EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
694 MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
695 MODULE_LICENSE("GPL");