1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP pin controller
5 * Copyright (C) 2020, 2021 Xilinx, Inc.
11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/platform_device.h>
18 #include <linux/firmware/xlnx-zynqmp.h>
20 #include <linux/pinctrl/pinconf-generic.h>
21 #include <linux/pinctrl/pinconf.h>
22 #include <linux/pinctrl/pinctrl.h>
23 #include <linux/pinctrl/pinmux.h>
26 #include "pinctrl-utils.h"
28 #define ZYNQMP_PIN_PREFIX "MIO"
29 #define PINCTRL_GET_FUNC_NAME_RESP_LEN 16
30 #define MAX_FUNC_NAME_LEN 16
31 #define MAX_GROUP_PIN 50
32 #define MAX_PIN_GROUPS 50
33 #define END_OF_FUNCTIONS "END_OF_FUNCTIONS"
34 #define NUM_GROUPS_PER_RESP 6
36 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12
37 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12
38 #define NA_GROUP 0xFFFF
39 #define RESERVED_GROUP 0xFFFE
41 #define DRIVE_STRENGTH_2MA 2
42 #define DRIVE_STRENGTH_4MA 4
43 #define DRIVE_STRENGTH_8MA 8
44 #define DRIVE_STRENGTH_12MA 12
47 * struct zynqmp_pmux_function - a pinmux function
48 * @name: Name of the pin mux function
49 * @groups: List of pin groups for this function
50 * @ngroups: Number of entries in @groups
51 * @node: Firmware node matching with the function
53 * This structure holds information about pin control function
54 * and function group names supporting that function.
56 struct zynqmp_pmux_function {
57 char name[MAX_FUNC_NAME_LEN];
58 const char * const *groups;
63 * struct zynqmp_pinctrl - driver data
64 * @pctrl: Pin control device
66 * @ngroups: Number of @groups
67 * @funcs: Pin mux functions
68 * @nfuncs: Number of @funcs
70 * This struct is stored as driver data and used to retrieve
71 * information regarding pin control functions, groups and
74 struct zynqmp_pinctrl {
75 struct pinctrl_dev *pctrl;
76 const struct zynqmp_pctrl_group *groups;
78 const struct zynqmp_pmux_function *funcs;
83 * struct zynqmp_pctrl_group - Pin control group info
85 * @pins: Group pin numbers
86 * @npins: Number of pins in the group
88 struct zynqmp_pctrl_group {
90 unsigned int pins[MAX_GROUP_PIN];
94 static struct pinctrl_desc zynqmp_desc;
96 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
98 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
100 return pctrl->ngroups;
103 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev,
104 unsigned int selector)
106 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
108 return pctrl->groups[selector].name;
111 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
112 unsigned int selector,
113 const unsigned int **pins,
116 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
118 *pins = pctrl->groups[selector].pins;
119 *npins = pctrl->groups[selector].npins;
124 static const struct pinctrl_ops zynqmp_pctrl_ops = {
125 .get_groups_count = zynqmp_pctrl_get_groups_count,
126 .get_group_name = zynqmp_pctrl_get_group_name,
127 .get_group_pins = zynqmp_pctrl_get_group_pins,
128 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
129 .dt_free_map = pinctrl_utils_free_map,
132 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev,
137 ret = zynqmp_pm_pinctrl_request(pin);
139 dev_err(pctldev->dev, "request failed for pin %u\n", pin);
146 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev)
148 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
150 return pctrl->nfuncs;
153 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev,
154 unsigned int selector)
156 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
158 return pctrl->funcs[selector].name;
162 * zynqmp_pmux_get_function_groups() - Get groups for the function
163 * @pctldev: Pincontrol device pointer.
164 * @selector: Function ID
165 * @groups: Group names.
166 * @num_groups: Number of function groups.
168 * Get function's group count and group names.
172 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev,
173 unsigned int selector,
174 const char * const **groups,
175 unsigned * const num_groups)
177 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
179 *groups = pctrl->funcs[selector].groups;
180 *num_groups = pctrl->funcs[selector].ngroups;
186 * zynqmp_pinmux_set_mux() - Set requested function for the group
187 * @pctldev: Pincontrol device pointer.
188 * @function: Function ID.
191 * Loop through all pins of the group and call firmware API
192 * to set requested function for all pins in the group.
194 * Return: 0 on success else error code.
196 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev,
197 unsigned int function,
200 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
201 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group];
204 for (i = 0; i < pgrp->npins; i++) {
205 unsigned int pin = pgrp->pins[i];
207 ret = zynqmp_pm_pinctrl_set_function(pin, function);
209 dev_err(pctldev->dev, "set mux failed for pin %u\n",
218 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev,
223 ret = zynqmp_pm_pinctrl_release(pin);
225 dev_err(pctldev->dev, "free pin failed for pin %u\n",
233 static const struct pinmux_ops zynqmp_pinmux_ops = {
234 .request = zynqmp_pinmux_request_pin,
235 .get_functions_count = zynqmp_pmux_get_functions_count,
236 .get_function_name = zynqmp_pmux_get_function_name,
237 .get_function_groups = zynqmp_pmux_get_function_groups,
238 .set_mux = zynqmp_pinmux_set_mux,
239 .free = zynqmp_pinmux_release_pin,
243 * zynqmp_pinconf_cfg_get() - get config value for the pin
244 * @pctldev: Pin control device pointer.
246 * @config: Value of config param.
248 * Get value of the requested configuration parameter for the
251 * Return: 0 on success else error code.
253 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev,
255 unsigned long *config)
257 unsigned int arg, param = pinconf_to_config_param(*config);
261 case PIN_CONFIG_SLEW_RATE:
262 param = PM_PINCTRL_CONFIG_SLEW_RATE;
263 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
265 case PIN_CONFIG_BIAS_PULL_UP:
266 param = PM_PINCTRL_CONFIG_PULL_CTRL;
267 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
268 if (arg != PM_PINCTRL_BIAS_PULL_UP)
273 case PIN_CONFIG_BIAS_PULL_DOWN:
274 param = PM_PINCTRL_CONFIG_PULL_CTRL;
275 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
276 if (arg != PM_PINCTRL_BIAS_PULL_DOWN)
281 case PIN_CONFIG_BIAS_DISABLE:
282 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
283 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
284 if (arg != PM_PINCTRL_BIAS_DISABLE)
289 case PIN_CONFIG_POWER_SOURCE:
290 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
291 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
293 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
294 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
295 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
297 case PIN_CONFIG_DRIVE_STRENGTH:
298 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
299 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
301 case PM_PINCTRL_DRIVE_STRENGTH_2MA:
302 arg = DRIVE_STRENGTH_2MA;
304 case PM_PINCTRL_DRIVE_STRENGTH_4MA:
305 arg = DRIVE_STRENGTH_4MA;
307 case PM_PINCTRL_DRIVE_STRENGTH_8MA:
308 arg = DRIVE_STRENGTH_8MA;
310 case PM_PINCTRL_DRIVE_STRENGTH_12MA:
311 arg = DRIVE_STRENGTH_12MA;
314 /* Invalid drive strength */
315 dev_warn(pctldev->dev,
316 "Invalid drive strength for pin %d\n",
329 param = pinconf_to_config_param(*config);
330 *config = pinconf_to_config_packed(param, arg);
336 * zynqmp_pinconf_cfg_set() - Set requested config for the pin
337 * @pctldev: Pincontrol device pointer.
339 * @configs: Configuration to set.
340 * @num_configs: Number of configurations.
342 * Loop through all configurations and call firmware API
343 * to set requested configurations for the pin.
345 * Return: 0 on success else error code.
347 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev,
348 unsigned int pin, unsigned long *configs,
349 unsigned int num_configs)
353 for (i = 0; i < num_configs; i++) {
354 unsigned int param = pinconf_to_config_param(configs[i]);
355 unsigned int arg = pinconf_to_config_argument(configs[i]);
359 case PIN_CONFIG_SLEW_RATE:
360 param = PM_PINCTRL_CONFIG_SLEW_RATE;
361 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
363 case PIN_CONFIG_BIAS_PULL_UP:
364 param = PM_PINCTRL_CONFIG_PULL_CTRL;
365 arg = PM_PINCTRL_BIAS_PULL_UP;
366 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
368 case PIN_CONFIG_BIAS_PULL_DOWN:
369 param = PM_PINCTRL_CONFIG_PULL_CTRL;
370 arg = PM_PINCTRL_BIAS_PULL_DOWN;
371 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
373 case PIN_CONFIG_BIAS_DISABLE:
374 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
375 arg = PM_PINCTRL_BIAS_DISABLE;
376 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
378 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
379 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
380 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
382 case PIN_CONFIG_DRIVE_STRENGTH:
384 case DRIVE_STRENGTH_2MA:
385 value = PM_PINCTRL_DRIVE_STRENGTH_2MA;
387 case DRIVE_STRENGTH_4MA:
388 value = PM_PINCTRL_DRIVE_STRENGTH_4MA;
390 case DRIVE_STRENGTH_8MA:
391 value = PM_PINCTRL_DRIVE_STRENGTH_8MA;
393 case DRIVE_STRENGTH_12MA:
394 value = PM_PINCTRL_DRIVE_STRENGTH_12MA;
397 /* Invalid drive strength */
398 dev_warn(pctldev->dev,
399 "Invalid drive strength for pin %d\n",
404 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
405 ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
407 case PIN_CONFIG_POWER_SOURCE:
408 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
409 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
412 dev_warn(pctldev->dev,
413 "Invalid IO Standard requested for pin %d\n",
417 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
418 case PIN_CONFIG_MODE_LOW_POWER:
420 * These cases are mentioned in dts but configurable
421 * registers are unknown. So falling through to ignore
422 * boot time warnings as of now.
427 dev_warn(pctldev->dev,
428 "unsupported configuration parameter '%u'\n",
434 param = pinconf_to_config_param(configs[i]);
435 arg = pinconf_to_config_argument(configs[i]);
437 dev_warn(pctldev->dev,
438 "failed to set: pin %u param %u value %u\n",
446 * zynqmp_pinconf_group_set() - Set requested config for the group
447 * @pctldev: Pincontrol device pointer.
448 * @selector: Group ID.
449 * @configs: Configuration to set.
450 * @num_configs: Number of configurations.
452 * Call function to set configs for each pin in the group.
454 * Return: 0 on success else error code.
456 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev,
457 unsigned int selector,
458 unsigned long *configs,
459 unsigned int num_configs)
462 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
463 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector];
465 for (i = 0; i < pgrp->npins; i++) {
466 ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs,
475 static const struct pinconf_ops zynqmp_pinconf_ops = {
477 .pin_config_get = zynqmp_pinconf_cfg_get,
478 .pin_config_set = zynqmp_pinconf_cfg_set,
479 .pin_config_group_set = zynqmp_pinconf_group_set,
482 static struct pinctrl_desc zynqmp_desc = {
483 .name = "zynqmp_pinctrl",
484 .owner = THIS_MODULE,
485 .pctlops = &zynqmp_pctrl_ops,
486 .pmxops = &zynqmp_pinmux_ops,
487 .confops = &zynqmp_pinconf_ops,
490 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups)
492 struct zynqmp_pm_query_data qdata = {0};
493 u32 payload[PAYLOAD_ARG_CNT];
496 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS;
500 ret = zynqmp_pm_query_data(qdata, payload);
504 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN);
509 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups)
511 struct zynqmp_pm_query_data qdata = {0};
512 u32 payload[PAYLOAD_ARG_CNT];
515 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS;
518 ret = zynqmp_pm_query_data(qdata, payload);
522 *ngroups = payload[1];
528 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data
529 * @dev: Device pointer.
531 * @func: Function data.
532 * @groups: Groups data.
534 * Query firmware to get group IDs for each function. Firmware returns
535 * group IDs. Based on the group index for the function, group names in
536 * the function are stored. For example, the first group in "eth0" function
537 * is named as "eth0_0" and the second group as "eth0_1" and so on.
539 * Based on the group ID received from the firmware, function stores name of
540 * the group for that group ID. For example, if "eth0" first group ID
541 * is x, groups[x] name will be stored as "eth0_0".
543 * Once done for each function, each function would have its group names
544 * and each group would also have their names.
546 * Return: 0 on success else error code.
548 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid,
549 struct zynqmp_pmux_function *func,
550 struct zynqmp_pctrl_group *groups)
552 u16 resp[NUM_GROUPS_PER_RESP] = {0};
553 const char **fgroups;
556 fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL);
560 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) {
561 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp);
565 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
566 if (resp[i] == NA_GROUP)
569 if (resp[i] == RESERVED_GROUP)
572 fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL,
576 if (!fgroups[index + i])
579 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL,
583 if (!groups[resp[i]].name)
588 func->groups = fgroups;
593 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name)
595 struct zynqmp_pm_query_data qdata = {0};
596 u32 payload[PAYLOAD_ARG_CNT];
598 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME;
602 * Name of the function is maximum 16 bytes and cannot
603 * accommodate the return value in SMC buffers, hence ignoring
604 * the return value for this specific qid.
606 zynqmp_pm_query_data(qdata, payload);
607 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN);
610 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs)
612 struct zynqmp_pm_query_data qdata = {0};
613 u32 payload[PAYLOAD_ARG_CNT];
616 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS;
618 ret = zynqmp_pm_query_data(qdata, payload);
622 *nfuncs = payload[1];
627 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups)
629 struct zynqmp_pm_query_data qdata = {0};
630 u32 payload[PAYLOAD_ARG_CNT];
633 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS;
637 ret = zynqmp_pm_query_data(qdata, payload);
641 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN);
646 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group,
649 group->pins[group->npins++] = pin;
653 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups
654 * @dev: Device pointer.
655 * @groups: Groups data.
658 * Query firmware to get groups available for the given pin.
659 * Based on the firmware response(group IDs for the pin), add
660 * pin number to the respective group's pin array.
662 * Once all pins are queries, each group would have its number
663 * of pins and pin numbers data.
665 * Return: 0 on success else error code.
667 static int zynqmp_pinctrl_create_pin_groups(struct device *dev,
668 struct zynqmp_pctrl_group *groups,
671 u16 resp[NUM_GROUPS_PER_RESP] = {0};
672 int ret, i, index = 0;
675 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp);
679 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
680 if (resp[i] == NA_GROUP)
683 if (resp[i] == RESERVED_GROUP)
686 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin);
688 index += NUM_GROUPS_PER_RESP;
689 } while (index <= MAX_PIN_GROUPS);
695 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data
696 * @dev: Device pointer.
697 * @groups: Groups data.
698 * @ngroups: Number of groups.
700 * Prepare pin number and number of pins data for each pins.
702 * Return: 0 on success else error code.
704 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev,
705 struct zynqmp_pctrl_group *groups,
706 unsigned int ngroups)
711 for (pin = 0; pin < zynqmp_desc.npins; pin++) {
712 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin);
721 * zynqmp_pinctrl_prepare_function_info() - prepare function info
722 * @dev: Device pointer.
723 * @pctrl: Pin control driver data.
725 * Query firmware for functions, groups and pin information and
726 * prepare pin control driver data.
728 * Query number of functions and number of function groups (number
729 * of groups in the given function) to allocate required memory buffers
730 * for functions and groups. Once buffers are allocated to store
731 * functions and groups data, query and store required information
732 * (number of groups and group names for each function, number of
733 * pins and pin numbers for each group).
735 * Return: 0 on success else error code.
737 static int zynqmp_pinctrl_prepare_function_info(struct device *dev,
738 struct zynqmp_pinctrl *pctrl)
740 struct zynqmp_pmux_function *funcs;
741 struct zynqmp_pctrl_group *groups;
744 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs);
748 funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL);
752 for (i = 0; i < pctrl->nfuncs; i++) {
753 zynqmp_pinctrl_get_function_name(i, funcs[i].name);
755 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups);
759 pctrl->ngroups += funcs[i].ngroups;
762 groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL);
766 for (i = 0; i < pctrl->nfuncs; i++) {
767 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i],
773 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups);
777 pctrl->funcs = funcs;
778 pctrl->groups = groups;
783 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins)
785 struct zynqmp_pm_query_data qdata = {0};
786 u32 payload[PAYLOAD_ARG_CNT];
789 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS;
791 ret = zynqmp_pm_query_data(qdata, payload);
801 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info
802 * @dev: Device pointer.
803 * @zynqmp_pins: Pin information.
804 * @npins: Number of pins.
806 * Query number of pins information from firmware and prepare pin
807 * description containing pin number and pin name.
809 * Return: 0 on success else error code.
811 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev,
812 const struct pinctrl_pin_desc
816 struct pinctrl_pin_desc *pins, *pin;
820 ret = zynqmp_pinctrl_get_num_pins(npins);
824 pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL);
828 for (i = 0; i < *npins; i++) {
831 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
832 ZYNQMP_PIN_PREFIX, i);
842 static int zynqmp_pinctrl_probe(struct platform_device *pdev)
844 struct zynqmp_pinctrl *pctrl;
847 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
851 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev,
855 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret);
859 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl);
861 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret);
865 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl);
866 if (IS_ERR(pctrl->pctrl))
867 return PTR_ERR(pctrl->pctrl);
869 platform_set_drvdata(pdev, pctrl);
874 static const struct of_device_id zynqmp_pinctrl_of_match[] = {
875 { .compatible = "xlnx,zynqmp-pinctrl" },
878 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match);
880 static struct platform_driver zynqmp_pinctrl_driver = {
882 .name = "zynqmp-pinctrl",
883 .of_match_table = zynqmp_pinctrl_of_match,
885 .probe = zynqmp_pinctrl_probe,
887 module_platform_driver(zynqmp_pinctrl_driver);
890 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver");
891 MODULE_LICENSE("GPL v2");