1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
7 #include <linux/delay.h>
8 #include <linux/gpio/consumer.h>
10 #include <linux/module.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/regulator/consumer.h>
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-device.h>
15 #include <media/v4l2-fwnode.h>
17 #define OV8856_REG_VALUE_08BIT 1
18 #define OV8856_REG_VALUE_16BIT 2
19 #define OV8856_REG_VALUE_24BIT 3
21 #define OV8856_SCLK 144000000ULL
22 #define OV8856_XVCLK_19_2 19200000
23 #define OV8856_DATA_LANES 4
24 #define OV8856_RGB_DEPTH 10
26 #define OV8856_REG_CHIP_ID 0x300a
27 #define OV8856_CHIP_ID 0x00885a
29 #define OV8856_REG_MODE_SELECT 0x0100
30 #define OV8856_MODE_STANDBY 0x00
31 #define OV8856_MODE_STREAMING 0x01
33 /* module revisions */
34 #define OV8856_2A_MODULE 0x01
35 #define OV8856_1B_MODULE 0x02
37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
38 * of the byte in the OTP that means the module revision
40 #define OV8856_MODULE_REVISION 0x700f
41 #define OV8856_OTP_MODE_CTRL 0x3d84
42 #define OV8856_OTP_LOAD_CTRL 0x3d81
43 #define OV8856_OTP_MODE_AUTO 0x00
44 #define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0)
46 /* vertical-timings from sensor */
47 #define OV8856_REG_VTS 0x380e
48 #define OV8856_VTS_MAX 0x7fff
50 /* horizontal-timings from sensor */
51 #define OV8856_REG_HTS 0x380c
53 /* Exposure controls from sensor */
54 #define OV8856_REG_EXPOSURE 0x3500
55 #define OV8856_EXPOSURE_MIN 6
56 #define OV8856_EXPOSURE_MAX_MARGIN 6
57 #define OV8856_EXPOSURE_STEP 1
59 /* Analog gain controls from sensor */
60 #define OV8856_REG_ANALOG_GAIN 0x3508
61 #define OV8856_ANAL_GAIN_MIN 128
62 #define OV8856_ANAL_GAIN_MAX 2047
63 #define OV8856_ANAL_GAIN_STEP 1
65 /* Digital gain controls from sensor */
66 #define OV8856_REG_DIGITAL_GAIN 0x350a
67 #define OV8856_REG_MWB_R_GAIN 0x5019
68 #define OV8856_REG_MWB_G_GAIN 0x501b
69 #define OV8856_REG_MWB_B_GAIN 0x501d
70 #define OV8856_DGTL_GAIN_MIN 0
71 #define OV8856_DGTL_GAIN_MAX 4095
72 #define OV8856_DGTL_GAIN_STEP 1
73 #define OV8856_DGTL_GAIN_DEFAULT 1024
75 /* Test Pattern Control */
76 #define OV8856_REG_TEST_PATTERN 0x5e00
77 #define OV8856_TEST_PATTERN_ENABLE BIT(7)
78 #define OV8856_TEST_PATTERN_BAR_SHIFT 2
81 #define NUM_MODE_REGS 187
82 #define NUM_MODE_REGS_2 200
84 /* Flip Mirror Controls from sensor */
85 #define OV8856_REG_FORMAT1 0x3820
86 #define OV8856_REG_FORMAT2 0x3821
87 #define OV8856_REG_FORMAT1_OP_1 BIT(1)
88 #define OV8856_REG_FORMAT1_OP_2 BIT(2)
89 #define OV8856_REG_FORMAT1_OP_3 BIT(6)
90 #define OV8856_REG_FORMAT2_OP_1 BIT(1)
91 #define OV8856_REG_FORMAT2_OP_2 BIT(2)
92 #define OV8856_REG_FORMAT2_OP_3 BIT(6)
93 #define OV8856_REG_FLIP_OPT_1 0x376b
94 #define OV8856_REG_FLIP_OPT_2 0x5001
95 #define OV8856_REG_FLIP_OPT_3 0x502e
96 #define OV8856_REG_MIRROR_OPT_1 0x5004
97 #define OV8856_REG_FLIP_OP_0 BIT(0)
98 #define OV8856_REG_FLIP_OP_1 BIT(1)
99 #define OV8856_REG_FLIP_OP_2 BIT(2)
100 #define OV8856_REG_MIRROR_OP_1 BIT(1)
101 #define OV8856_REG_MIRROR_OP_2 BIT(2)
103 #define to_ov8856(_sd) container_of(_sd, struct ov8856, sd)
105 static const char * const ov8856_supply_names[] = {
106 "dovdd", /* Digital I/O power */
107 "avdd", /* Analog power */
108 "dvdd", /* Digital core power */
112 OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
113 OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
121 struct ov8856_reg_list {
123 const struct ov8856_reg *regs;
126 struct ov8856_link_freq_config {
127 const struct ov8856_reg_list reg_list;
131 /* Frame width in pixels */
134 /* Frame height in pixels */
137 /* Horizontal timining size */
140 /* Default vertical timining size */
143 /* Min vertical timining size */
146 /* Link frequency needed for this resolution */
149 /* Sensor register settings for this resolution */
150 const struct ov8856_reg_list reg_list;
152 /* Number of data lanes */
155 /* Default MEDIA_BUS_FMT for this mode */
156 u32 default_mbus_index;
159 struct ov8856_mipi_data_rates {
160 const struct ov8856_reg regs_0[NUM_REGS];
161 const struct ov8856_reg regs_1[NUM_REGS];
164 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_2 = {
165 //mipi_data_rate_1440mbps
175 //mipi_data_rate_720mbps
187 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_4 = {
188 //mipi_data_rate_720mbps
198 //mipi_data_rate_360mbps
210 static const struct ov8856_reg lane_2_mode_3280x2464[] = {
211 /* 3280x2464 resolution */
402 static const struct ov8856_reg lane_2_mode_1640x1232[] = {
403 /* 1640x1232 resolution */
594 static const struct ov8856_reg lane_4_mode_3280x2464[] = {
595 /* 3280x2464 resolution */
785 static const struct ov8856_reg lane_4_mode_1640x1232[] = {
786 /* 1640x1232 resolution */
976 static const struct ov8856_reg lane_4_mode_3264x2448[] = {
977 /* 3264x2448 resolution */
1180 static const struct ov8856_reg lane_4_mode_1632x1224[] = {
1181 /* 1632x1224 resolution */
1384 static const struct ov8856_reg mipi_data_mbus_sbggr10_1x10[] = {
1388 static const struct ov8856_reg mipi_data_mbus_sgrbg10_1x10[] = {
1392 static const u32 ov8856_mbus_codes[] = {
1393 MEDIA_BUS_FMT_SBGGR10_1X10,
1394 MEDIA_BUS_FMT_SGRBG10_1X10
1397 static const char * const ov8856_test_pattern_menu[] = {
1399 "Standard Color Bar",
1400 "Top-Bottom Darker Color Bar",
1401 "Right-Left Darker Color Bar",
1402 "Bottom-Top Darker Color Bar"
1405 static const struct ov8856_reg_list bayer_offset_configs[] = {
1406 [OV8856_MEDIA_BUS_FMT_SBGGR10_1X10] = {
1407 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sbggr10_1x10),
1408 .regs = mipi_data_mbus_sbggr10_1x10,
1410 [OV8856_MEDIA_BUS_FMT_SGRBG10_1X10] = {
1411 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sgrbg10_1x10),
1412 .regs = mipi_data_mbus_sgrbg10_1x10,
1417 struct v4l2_subdev sd;
1418 struct media_pad pad;
1419 struct v4l2_ctrl_handler ctrl_handler;
1422 struct gpio_desc *reset_gpio;
1423 struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)];
1426 struct v4l2_ctrl *link_freq;
1427 struct v4l2_ctrl *pixel_rate;
1428 struct v4l2_ctrl *vblank;
1429 struct v4l2_ctrl *hblank;
1430 struct v4l2_ctrl *exposure;
1433 const struct ov8856_mode *cur_mode;
1435 /* Application specified mbus format */
1438 /* To serialize asynchronus callbacks */
1441 /* Streaming on/off */
1447 const struct ov8856_lane_cfg *priv_lane;
1450 /* True if the device has been identified */
1454 struct ov8856_lane_cfg {
1455 const s64 link_freq_menu_items[2];
1456 const struct ov8856_link_freq_config link_freq_configs[2];
1457 const struct ov8856_mode supported_modes[4];
1460 static const struct ov8856_lane_cfg lane_cfg_2 = {
1468 ARRAY_SIZE(mipi_data_rate_lane_2.regs_0),
1469 .regs = mipi_data_rate_lane_2.regs_0,
1475 ARRAY_SIZE(mipi_data_rate_lane_2.regs_1),
1476 .regs = mipi_data_rate_lane_2.regs_1,
1487 ARRAY_SIZE(lane_2_mode_3280x2464),
1488 .regs = lane_2_mode_3280x2464,
1490 .link_freq_index = 0,
1492 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1502 ARRAY_SIZE(lane_2_mode_1640x1232),
1503 .regs = lane_2_mode_1640x1232,
1505 .link_freq_index = 1,
1507 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1511 static const struct ov8856_lane_cfg lane_cfg_4 = {
1519 ARRAY_SIZE(mipi_data_rate_lane_4.regs_0),
1520 .regs = mipi_data_rate_lane_4.regs_0,
1526 ARRAY_SIZE(mipi_data_rate_lane_4.regs_1),
1527 .regs = mipi_data_rate_lane_4.regs_1,
1538 ARRAY_SIZE(lane_4_mode_3280x2464),
1539 .regs = lane_4_mode_3280x2464,
1541 .link_freq_index = 0,
1543 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1553 ARRAY_SIZE(lane_4_mode_1640x1232),
1554 .regs = lane_4_mode_1640x1232,
1556 .link_freq_index = 1,
1558 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1568 ARRAY_SIZE(lane_4_mode_3264x2448),
1569 .regs = lane_4_mode_3264x2448,
1571 .link_freq_index = 0,
1573 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1583 ARRAY_SIZE(lane_4_mode_1632x1224),
1584 .regs = lane_4_mode_1632x1224,
1586 .link_freq_index = 1,
1588 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1592 static unsigned int ov8856_modes_num(const struct ov8856 *ov8856)
1594 unsigned int i, count = 0;
1596 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->supported_modes); i++) {
1597 if (ov8856->priv_lane->supported_modes[i].width == 0)
1605 static u64 to_rate(const s64 *link_freq_menu_items,
1606 u32 f_index, u8 nlanes)
1608 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes;
1610 do_div(pixel_rate, OV8856_RGB_DEPTH);
1615 static u64 to_pixels_per_line(const s64 *link_freq_menu_items, u32 hts,
1616 u32 f_index, u8 nlanes)
1618 u64 ppl = hts * to_rate(link_freq_menu_items, f_index, nlanes);
1620 do_div(ppl, OV8856_SCLK);
1625 static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val)
1627 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1628 struct i2c_msg msgs[2];
1630 u8 data_buf[4] = {0};
1636 put_unaligned_be16(reg, addr_buf);
1637 msgs[0].addr = client->addr;
1639 msgs[0].len = sizeof(addr_buf);
1640 msgs[0].buf = addr_buf;
1641 msgs[1].addr = client->addr;
1642 msgs[1].flags = I2C_M_RD;
1644 msgs[1].buf = &data_buf[4 - len];
1646 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1647 if (ret != ARRAY_SIZE(msgs))
1650 *val = get_unaligned_be32(data_buf);
1655 static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val)
1657 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1663 put_unaligned_be16(reg, buf);
1664 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
1665 if (i2c_master_send(client, buf, len + 2) != len + 2)
1671 static int ov8856_write_reg_list(struct ov8856 *ov8856,
1672 const struct ov8856_reg_list *r_list)
1674 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1678 for (i = 0; i < r_list->num_of_regs; i++) {
1679 ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1,
1680 r_list->regs[i].val);
1682 dev_err_ratelimited(&client->dev,
1683 "failed to write reg 0x%4.4x. error = %d",
1684 r_list->regs[i].address, ret);
1692 static int ov8856_identify_module(struct ov8856 *ov8856)
1694 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1698 if (ov8856->identified)
1701 ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID,
1702 OV8856_REG_VALUE_24BIT, &val);
1706 if (val != OV8856_CHIP_ID) {
1707 dev_err(&client->dev, "chip id mismatch: %x!=%x",
1708 OV8856_CHIP_ID, val);
1712 ov8856->identified = true;
1717 static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain)
1719 return ov8856_write_reg(ov8856, OV8856_REG_DIGITAL_GAIN,
1720 OV8856_REG_VALUE_16BIT, d_gain);
1723 static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern)
1726 pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT |
1727 OV8856_TEST_PATTERN_ENABLE;
1729 return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN,
1730 OV8856_REG_VALUE_08BIT, pattern);
1733 static int ov8856_set_ctrl_hflip(struct ov8856 *ov8856, u32 ctrl_val)
1738 ret = ov8856_read_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1739 OV8856_REG_VALUE_08BIT, &val);
1743 ret = ov8856_write_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1744 OV8856_REG_VALUE_08BIT,
1745 ctrl_val ? val & ~OV8856_REG_MIRROR_OP_2 :
1746 val | OV8856_REG_MIRROR_OP_2);
1751 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT2,
1752 OV8856_REG_VALUE_08BIT, &val);
1756 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT2,
1757 OV8856_REG_VALUE_08BIT,
1758 ctrl_val ? val & ~OV8856_REG_FORMAT2_OP_1 &
1759 ~OV8856_REG_FORMAT2_OP_2 &
1760 ~OV8856_REG_FORMAT2_OP_3 :
1761 val | OV8856_REG_FORMAT2_OP_1 |
1762 OV8856_REG_FORMAT2_OP_2 |
1763 OV8856_REG_FORMAT2_OP_3);
1766 static int ov8856_set_ctrl_vflip(struct ov8856 *ov8856, u8 ctrl_val)
1771 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1772 OV8856_REG_VALUE_08BIT, &val);
1776 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1777 OV8856_REG_VALUE_08BIT,
1778 ctrl_val ? val | OV8856_REG_FLIP_OP_1 |
1779 OV8856_REG_FLIP_OP_2 :
1780 val & ~OV8856_REG_FLIP_OP_1 &
1781 ~OV8856_REG_FLIP_OP_2);
1783 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1784 OV8856_REG_VALUE_08BIT, &val);
1788 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1789 OV8856_REG_VALUE_08BIT,
1790 ctrl_val ? val | OV8856_REG_FLIP_OP_2 :
1791 val & ~OV8856_REG_FLIP_OP_2);
1793 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1794 OV8856_REG_VALUE_08BIT, &val);
1798 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1799 OV8856_REG_VALUE_08BIT,
1800 ctrl_val ? val & ~OV8856_REG_FLIP_OP_0 &
1801 ~OV8856_REG_FLIP_OP_1 :
1802 val | OV8856_REG_FLIP_OP_0 |
1803 OV8856_REG_FLIP_OP_1);
1805 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT1,
1806 OV8856_REG_VALUE_08BIT, &val);
1810 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT1,
1811 OV8856_REG_VALUE_08BIT,
1812 ctrl_val ? val | OV8856_REG_FORMAT1_OP_1 |
1813 OV8856_REG_FORMAT1_OP_3 |
1814 OV8856_REG_FORMAT1_OP_2 :
1815 val & ~OV8856_REG_FORMAT1_OP_1 &
1816 ~OV8856_REG_FORMAT1_OP_3 &
1817 ~OV8856_REG_FORMAT1_OP_2);
1820 static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl)
1822 struct ov8856 *ov8856 = container_of(ctrl->handler,
1823 struct ov8856, ctrl_handler);
1824 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1828 /* Propagate change of current control to all related controls */
1829 if (ctrl->id == V4L2_CID_VBLANK) {
1830 /* Update max exposure while meeting expected vblanking */
1831 exposure_max = ov8856->cur_mode->height + ctrl->val -
1832 OV8856_EXPOSURE_MAX_MARGIN;
1833 __v4l2_ctrl_modify_range(ov8856->exposure,
1834 ov8856->exposure->minimum,
1835 exposure_max, ov8856->exposure->step,
1839 /* V4L2 controls values will be applied only when power is already up */
1840 if (!pm_runtime_get_if_in_use(&client->dev))
1844 case V4L2_CID_ANALOGUE_GAIN:
1845 ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN,
1846 OV8856_REG_VALUE_16BIT, ctrl->val);
1849 case V4L2_CID_DIGITAL_GAIN:
1850 ret = ov8856_update_digital_gain(ov8856, ctrl->val);
1853 case V4L2_CID_EXPOSURE:
1854 /* 4 least significant bits of expsoure are fractional part */
1855 ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE,
1856 OV8856_REG_VALUE_24BIT, ctrl->val << 4);
1859 case V4L2_CID_VBLANK:
1860 ret = ov8856_write_reg(ov8856, OV8856_REG_VTS,
1861 OV8856_REG_VALUE_16BIT,
1862 ov8856->cur_mode->height + ctrl->val);
1865 case V4L2_CID_TEST_PATTERN:
1866 ret = ov8856_test_pattern(ov8856, ctrl->val);
1869 case V4L2_CID_HFLIP:
1870 ret = ov8856_set_ctrl_hflip(ov8856, ctrl->val);
1873 case V4L2_CID_VFLIP:
1874 ret = ov8856_set_ctrl_vflip(ov8856, ctrl->val);
1882 pm_runtime_put(&client->dev);
1887 static const struct v4l2_ctrl_ops ov8856_ctrl_ops = {
1888 .s_ctrl = ov8856_set_ctrl,
1891 static int ov8856_init_controls(struct ov8856 *ov8856)
1893 struct v4l2_ctrl_handler *ctrl_hdlr;
1894 s64 exposure_max, h_blank;
1897 ctrl_hdlr = &ov8856->ctrl_handler;
1898 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1902 ctrl_hdlr->lock = &ov8856->mutex;
1903 ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops,
1906 (ov8856->priv_lane->link_freq_menu_items)
1908 0, ov8856->priv_lane->link_freq_menu_items);
1909 if (ov8856->link_freq)
1910 ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1912 ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1913 V4L2_CID_PIXEL_RATE, 0,
1914 to_rate(ov8856->priv_lane->link_freq_menu_items,
1916 ov8856->cur_mode->data_lanes), 1,
1917 to_rate(ov8856->priv_lane->link_freq_menu_items,
1919 ov8856->cur_mode->data_lanes));
1920 ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1922 ov8856->cur_mode->vts_min - ov8856->cur_mode->height,
1923 OV8856_VTS_MAX - ov8856->cur_mode->height, 1,
1924 ov8856->cur_mode->vts_def -
1925 ov8856->cur_mode->height);
1926 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
1927 ov8856->cur_mode->hts,
1928 ov8856->cur_mode->link_freq_index,
1929 ov8856->cur_mode->data_lanes) -
1930 ov8856->cur_mode->width;
1931 ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1932 V4L2_CID_HBLANK, h_blank, h_blank, 1,
1935 ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1937 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1938 OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX,
1939 OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN);
1940 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1941 OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX,
1942 OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT);
1943 exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN;
1944 ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1946 OV8856_EXPOSURE_MIN, exposure_max,
1947 OV8856_EXPOSURE_STEP,
1949 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops,
1950 V4L2_CID_TEST_PATTERN,
1951 ARRAY_SIZE(ov8856_test_pattern_menu) - 1,
1952 0, 0, ov8856_test_pattern_menu);
1953 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1954 V4L2_CID_HFLIP, 0, 1, 1, 0);
1955 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1956 V4L2_CID_VFLIP, 0, 1, 1, 0);
1957 if (ctrl_hdlr->error)
1958 return ctrl_hdlr->error;
1960 ov8856->sd.ctrl_handler = ctrl_hdlr;
1965 static void ov8856_update_pad_format(struct ov8856 *ov8856,
1966 const struct ov8856_mode *mode,
1967 struct v4l2_mbus_framefmt *fmt)
1971 fmt->width = mode->width;
1972 fmt->height = mode->height;
1973 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
1974 if (ov8856_mbus_codes[index] == fmt->code)
1976 if (index == ARRAY_SIZE(ov8856_mbus_codes))
1977 index = mode->default_mbus_index;
1978 fmt->code = ov8856_mbus_codes[index];
1979 ov8856->cur_mbus_index = index;
1980 fmt->field = V4L2_FIELD_NONE;
1983 static int ov8856_start_streaming(struct ov8856 *ov8856)
1985 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1986 const struct ov8856_reg_list *reg_list;
1987 int link_freq_index, ret;
1989 ret = ov8856_identify_module(ov8856);
1993 link_freq_index = ov8856->cur_mode->link_freq_index;
1994 reg_list = &ov8856->priv_lane->link_freq_configs[link_freq_index].reg_list;
1996 ret = ov8856_write_reg_list(ov8856, reg_list);
1998 dev_err(&client->dev, "failed to set plls");
2002 reg_list = &ov8856->cur_mode->reg_list;
2003 ret = ov8856_write_reg_list(ov8856, reg_list);
2005 dev_err(&client->dev, "failed to set mode");
2009 reg_list = &bayer_offset_configs[ov8856->cur_mbus_index];
2010 ret = ov8856_write_reg_list(ov8856, reg_list);
2012 dev_err(&client->dev, "failed to set mbus format");
2016 ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler);
2020 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2021 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING);
2023 dev_err(&client->dev, "failed to set stream");
2030 static void ov8856_stop_streaming(struct ov8856 *ov8856)
2032 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
2034 if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2035 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY))
2036 dev_err(&client->dev, "failed to set stream");
2039 static int ov8856_set_stream(struct v4l2_subdev *sd, int enable)
2041 struct ov8856 *ov8856 = to_ov8856(sd);
2042 struct i2c_client *client = v4l2_get_subdevdata(sd);
2045 if (ov8856->streaming == enable)
2048 mutex_lock(&ov8856->mutex);
2050 ret = pm_runtime_resume_and_get(&client->dev);
2052 mutex_unlock(&ov8856->mutex);
2056 ret = ov8856_start_streaming(ov8856);
2059 ov8856_stop_streaming(ov8856);
2060 pm_runtime_put(&client->dev);
2063 ov8856_stop_streaming(ov8856);
2064 pm_runtime_put(&client->dev);
2067 ov8856->streaming = enable;
2068 mutex_unlock(&ov8856->mutex);
2073 static int ov8856_power_on(struct device *dev)
2075 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2076 struct ov8856 *ov8856 = to_ov8856(sd);
2079 if (is_acpi_node(dev_fwnode(dev)))
2082 ret = clk_prepare_enable(ov8856->xvclk);
2084 dev_err(dev, "failed to enable xvclk\n");
2088 if (ov8856->reset_gpio) {
2089 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2090 usleep_range(1000, 2000);
2093 ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names),
2096 dev_err(dev, "failed to enable regulators\n");
2100 gpiod_set_value_cansleep(ov8856->reset_gpio, 0);
2101 usleep_range(1500, 1800);
2106 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2107 clk_disable_unprepare(ov8856->xvclk);
2112 static int ov8856_power_off(struct device *dev)
2114 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2115 struct ov8856 *ov8856 = to_ov8856(sd);
2117 if (is_acpi_node(dev_fwnode(dev)))
2120 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2121 regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names),
2123 clk_disable_unprepare(ov8856->xvclk);
2128 static int __maybe_unused ov8856_suspend(struct device *dev)
2130 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2131 struct ov8856 *ov8856 = to_ov8856(sd);
2133 mutex_lock(&ov8856->mutex);
2134 if (ov8856->streaming)
2135 ov8856_stop_streaming(ov8856);
2137 ov8856_power_off(dev);
2138 mutex_unlock(&ov8856->mutex);
2143 static int __maybe_unused ov8856_resume(struct device *dev)
2145 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2146 struct ov8856 *ov8856 = to_ov8856(sd);
2149 mutex_lock(&ov8856->mutex);
2151 ov8856_power_on(dev);
2152 if (ov8856->streaming) {
2153 ret = ov8856_start_streaming(ov8856);
2155 ov8856->streaming = false;
2156 ov8856_stop_streaming(ov8856);
2157 mutex_unlock(&ov8856->mutex);
2162 mutex_unlock(&ov8856->mutex);
2167 static int ov8856_set_format(struct v4l2_subdev *sd,
2168 struct v4l2_subdev_state *sd_state,
2169 struct v4l2_subdev_format *fmt)
2171 struct ov8856 *ov8856 = to_ov8856(sd);
2172 const struct ov8856_mode *mode;
2173 s32 vblank_def, h_blank;
2175 mode = v4l2_find_nearest_size(ov8856->priv_lane->supported_modes,
2177 width, height, fmt->format.width,
2178 fmt->format.height);
2180 mutex_lock(&ov8856->mutex);
2181 ov8856_update_pad_format(ov8856, mode, &fmt->format);
2182 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2183 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
2185 ov8856->cur_mode = mode;
2186 __v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index);
2187 __v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate,
2188 to_rate(ov8856->priv_lane->link_freq_menu_items,
2189 mode->link_freq_index,
2190 ov8856->cur_mode->data_lanes));
2192 /* Update limits and set FPS to default */
2193 vblank_def = mode->vts_def - mode->height;
2194 __v4l2_ctrl_modify_range(ov8856->vblank,
2195 mode->vts_min - mode->height,
2196 OV8856_VTS_MAX - mode->height, 1,
2198 __v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def);
2199 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
2201 mode->link_freq_index,
2202 ov8856->cur_mode->data_lanes)
2204 __v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1,
2208 mutex_unlock(&ov8856->mutex);
2213 static int ov8856_get_format(struct v4l2_subdev *sd,
2214 struct v4l2_subdev_state *sd_state,
2215 struct v4l2_subdev_format *fmt)
2217 struct ov8856 *ov8856 = to_ov8856(sd);
2219 mutex_lock(&ov8856->mutex);
2220 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
2221 fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd,
2225 ov8856_update_pad_format(ov8856, ov8856->cur_mode, &fmt->format);
2227 mutex_unlock(&ov8856->mutex);
2232 static int ov8856_enum_mbus_code(struct v4l2_subdev *sd,
2233 struct v4l2_subdev_state *sd_state,
2234 struct v4l2_subdev_mbus_code_enum *code)
2236 if (code->index >= ARRAY_SIZE(ov8856_mbus_codes))
2239 code->code = ov8856_mbus_codes[code->index];
2244 static int ov8856_enum_frame_size(struct v4l2_subdev *sd,
2245 struct v4l2_subdev_state *sd_state,
2246 struct v4l2_subdev_frame_size_enum *fse)
2248 struct ov8856 *ov8856 = to_ov8856(sd);
2251 if (fse->index >= ov8856->modes_size)
2254 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
2255 if (fse->code == ov8856_mbus_codes[index])
2257 if (index == ARRAY_SIZE(ov8856_mbus_codes))
2260 fse->min_width = ov8856->priv_lane->supported_modes[fse->index].width;
2261 fse->max_width = fse->min_width;
2262 fse->min_height = ov8856->priv_lane->supported_modes[fse->index].height;
2263 fse->max_height = fse->min_height;
2268 static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2270 struct ov8856 *ov8856 = to_ov8856(sd);
2272 mutex_lock(&ov8856->mutex);
2273 ov8856_update_pad_format(ov8856, &ov8856->priv_lane->supported_modes[0],
2274 v4l2_subdev_get_try_format(sd, fh->state, 0));
2275 mutex_unlock(&ov8856->mutex);
2280 static const struct v4l2_subdev_video_ops ov8856_video_ops = {
2281 .s_stream = ov8856_set_stream,
2284 static const struct v4l2_subdev_pad_ops ov8856_pad_ops = {
2285 .set_fmt = ov8856_set_format,
2286 .get_fmt = ov8856_get_format,
2287 .enum_mbus_code = ov8856_enum_mbus_code,
2288 .enum_frame_size = ov8856_enum_frame_size,
2291 static const struct v4l2_subdev_ops ov8856_subdev_ops = {
2292 .video = &ov8856_video_ops,
2293 .pad = &ov8856_pad_ops,
2296 static const struct media_entity_operations ov8856_subdev_entity_ops = {
2297 .link_validate = v4l2_subdev_link_validate,
2300 static const struct v4l2_subdev_internal_ops ov8856_internal_ops = {
2301 .open = ov8856_open,
2305 static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev)
2307 struct fwnode_handle *ep;
2308 struct fwnode_handle *fwnode = dev_fwnode(dev);
2309 struct v4l2_fwnode_endpoint bus_cfg = {
2310 .bus_type = V4L2_MBUS_CSI2_DPHY
2319 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate);
2323 if (!is_acpi_node(fwnode)) {
2324 ov8856->xvclk = devm_clk_get(dev, "xvclk");
2325 if (IS_ERR(ov8856->xvclk)) {
2326 dev_err(dev, "could not get xvclk clock (%pe)\n",
2328 return PTR_ERR(ov8856->xvclk);
2331 clk_set_rate(ov8856->xvclk, xvclk_rate);
2332 xvclk_rate = clk_get_rate(ov8856->xvclk);
2334 ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset",
2336 if (IS_ERR(ov8856->reset_gpio))
2337 return PTR_ERR(ov8856->reset_gpio);
2339 for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++)
2340 ov8856->supplies[i].supply = ov8856_supply_names[i];
2342 ret = devm_regulator_bulk_get(dev,
2343 ARRAY_SIZE(ov8856_supply_names),
2349 if (xvclk_rate != OV8856_XVCLK_19_2)
2350 dev_warn(dev, "external clock rate %u is unsupported",
2353 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
2357 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
2358 fwnode_handle_put(ep);
2362 /* Get number of data lanes */
2363 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
2364 bus_cfg.bus.mipi_csi2.num_data_lanes != 4) {
2365 dev_err(dev, "number of CSI2 data lanes %d is not supported",
2366 bus_cfg.bus.mipi_csi2.num_data_lanes);
2368 goto check_hwcfg_error;
2371 dev_dbg(dev, "Using %u data lanes\n", ov8856->cur_mode->data_lanes);
2373 if (bus_cfg.bus.mipi_csi2.num_data_lanes == 2)
2374 ov8856->priv_lane = &lane_cfg_2;
2376 ov8856->priv_lane = &lane_cfg_4;
2378 ov8856->modes_size = ov8856_modes_num(ov8856);
2380 if (!bus_cfg.nr_of_link_frequencies) {
2381 dev_err(dev, "no link frequencies defined");
2383 goto check_hwcfg_error;
2386 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->link_freq_menu_items); i++) {
2387 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
2388 if (ov8856->priv_lane->link_freq_menu_items[i] ==
2389 bus_cfg.link_frequencies[j])
2393 if (j == bus_cfg.nr_of_link_frequencies) {
2394 dev_err(dev, "no link frequency %lld supported",
2395 ov8856->priv_lane->link_freq_menu_items[i]);
2397 goto check_hwcfg_error;
2402 v4l2_fwnode_endpoint_free(&bus_cfg);
2407 static void ov8856_remove(struct i2c_client *client)
2409 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2410 struct ov8856 *ov8856 = to_ov8856(sd);
2412 v4l2_async_unregister_subdev(sd);
2413 media_entity_cleanup(&sd->entity);
2414 v4l2_ctrl_handler_free(sd->ctrl_handler);
2415 pm_runtime_disable(&client->dev);
2416 mutex_destroy(&ov8856->mutex);
2418 ov8856_power_off(&client->dev);
2421 static int ov8856_probe(struct i2c_client *client)
2423 struct ov8856 *ov8856;
2427 ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL);
2431 ret = ov8856_get_hwcfg(ov8856, &client->dev);
2433 dev_err(&client->dev, "failed to get HW configuration: %d",
2438 v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops);
2440 full_power = acpi_dev_state_d0(&client->dev);
2442 ret = ov8856_power_on(&client->dev);
2444 dev_err(&client->dev, "failed to power on\n");
2448 ret = ov8856_identify_module(ov8856);
2450 dev_err(&client->dev, "failed to find sensor: %d", ret);
2451 goto probe_power_off;
2455 mutex_init(&ov8856->mutex);
2456 ov8856->cur_mode = &ov8856->priv_lane->supported_modes[0];
2457 ov8856->cur_mbus_index = ov8856->cur_mode->default_mbus_index;
2458 ret = ov8856_init_controls(ov8856);
2460 dev_err(&client->dev, "failed to init controls: %d", ret);
2461 goto probe_error_v4l2_ctrl_handler_free;
2464 ov8856->sd.internal_ops = &ov8856_internal_ops;
2465 ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2466 ov8856->sd.entity.ops = &ov8856_subdev_entity_ops;
2467 ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2468 ov8856->pad.flags = MEDIA_PAD_FL_SOURCE;
2469 ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad);
2471 dev_err(&client->dev, "failed to init entity pads: %d", ret);
2472 goto probe_error_v4l2_ctrl_handler_free;
2475 ret = v4l2_async_register_subdev_sensor(&ov8856->sd);
2477 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
2479 goto probe_error_media_entity_cleanup;
2482 /* Set the device's state to active if it's in D0 state. */
2484 pm_runtime_set_active(&client->dev);
2485 pm_runtime_enable(&client->dev);
2486 pm_runtime_idle(&client->dev);
2490 probe_error_media_entity_cleanup:
2491 media_entity_cleanup(&ov8856->sd.entity);
2493 probe_error_v4l2_ctrl_handler_free:
2494 v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler);
2495 mutex_destroy(&ov8856->mutex);
2498 ov8856_power_off(&client->dev);
2503 static const struct dev_pm_ops ov8856_pm_ops = {
2504 SET_SYSTEM_SLEEP_PM_OPS(ov8856_suspend, ov8856_resume)
2505 SET_RUNTIME_PM_OPS(ov8856_power_off, ov8856_power_on, NULL)
2509 static const struct acpi_device_id ov8856_acpi_ids[] = {
2514 MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids);
2517 static const struct of_device_id ov8856_of_match[] = {
2518 { .compatible = "ovti,ov8856" },
2521 MODULE_DEVICE_TABLE(of, ov8856_of_match);
2523 static struct i2c_driver ov8856_i2c_driver = {
2526 .pm = &ov8856_pm_ops,
2527 .acpi_match_table = ACPI_PTR(ov8856_acpi_ids),
2528 .of_match_table = ov8856_of_match,
2530 .probe = ov8856_probe,
2531 .remove = ov8856_remove,
2532 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
2535 module_i2c_driver(ov8856_i2c_driver);
2538 MODULE_DESCRIPTION("OmniVision OV8856 sensor driver");
2539 MODULE_LICENSE("GPL v2");