1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the OV5645 camera sensor.
5 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
6 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
7 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
10 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
11 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
12 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
13 * - the OV5640 driver posted on linux-media:
14 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/delay.h>
20 #include <linux/device.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/i2c.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
26 #include <linux/of_graph.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/slab.h>
30 #include <linux/types.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-subdev.h>
35 #define OV5645_SYSTEM_CTRL0 0x3008
36 #define OV5645_SYSTEM_CTRL0_START 0x02
37 #define OV5645_SYSTEM_CTRL0_STOP 0x42
38 #define OV5645_CHIP_ID_HIGH 0x300a
39 #define OV5645_CHIP_ID_HIGH_BYTE 0x56
40 #define OV5645_CHIP_ID_LOW 0x300b
41 #define OV5645_CHIP_ID_LOW_BYTE 0x45
42 #define OV5645_IO_MIPI_CTRL00 0x300e
43 #define OV5645_PAD_OUTPUT00 0x3019
44 #define OV5645_AWB_MANUAL_CONTROL 0x3406
45 #define OV5645_AWB_MANUAL_ENABLE BIT(0)
46 #define OV5645_AEC_PK_MANUAL 0x3503
47 #define OV5645_AEC_MANUAL_ENABLE BIT(0)
48 #define OV5645_AGC_MANUAL_ENABLE BIT(1)
49 #define OV5645_TIMING_TC_REG20 0x3820
50 #define OV5645_SENSOR_VFLIP BIT(1)
51 #define OV5645_ISP_VFLIP BIT(2)
52 #define OV5645_TIMING_TC_REG21 0x3821
53 #define OV5645_SENSOR_MIRROR BIT(1)
54 #define OV5645_MIPI_CTRL00 0x4800
55 #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
56 #define OV5645_TEST_PATTERN_MASK 0x3
57 #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
58 #define OV5645_TEST_PATTERN_ENABLE BIT(7)
59 #define OV5645_SDE_SAT_U 0x5583
60 #define OV5645_SDE_SAT_V 0x5584
62 /* regulator supplies */
63 static const char * const ov5645_supply_name[] = {
64 "vdddo", /* Digital I/O (1.8V) supply */
65 "vdda", /* Analog (2.8V) supply */
66 "vddd", /* Digital Core (1.5V) supply */
69 #define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_name)
76 struct ov5645_mode_info {
79 const struct reg_value *data;
86 struct i2c_client *i2c_client;
88 struct v4l2_subdev sd;
90 struct v4l2_fwnode_endpoint ep;
91 struct v4l2_mbus_framefmt fmt;
92 struct v4l2_rect crop;
95 struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES];
97 const struct ov5645_mode_info *current_mode;
99 struct v4l2_ctrl_handler ctrls;
100 struct v4l2_ctrl *pixel_clock;
101 struct v4l2_ctrl *link_freq;
103 /* Cached register values */
108 struct mutex power_lock; /* lock to protect power state */
110 struct gpio_desc *enable_gpio;
111 struct gpio_desc *rst_gpio;
114 static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
116 return container_of(sd, struct ov5645, sd);
119 static const struct reg_value ov5645_global_init_setting[] = {
356 { OV5645_IO_MIPI_CTRL00, 0x40 },
357 { OV5645_MIPI_CTRL00, 0x24 },
358 { OV5645_PAD_OUTPUT00, 0x70 }
361 static const struct reg_value ov5645_setting_sxga[] = {
409 static const struct reg_value ov5645_setting_1080p[] = {
459 static const struct reg_value ov5645_setting_full[] = {
509 static const s64 link_freq[] = {
514 static const struct ov5645_mode_info ov5645_mode_info_data[] = {
518 .data = ov5645_setting_sxga,
519 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
520 .pixel_clock = 112000000,
521 .link_freq = 0 /* an index in link_freq[] */
526 .data = ov5645_setting_1080p,
527 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
528 .pixel_clock = 168000000,
529 .link_freq = 1 /* an index in link_freq[] */
534 .data = ov5645_setting_full,
535 .data_size = ARRAY_SIZE(ov5645_setting_full),
536 .pixel_clock = 168000000,
537 .link_freq = 1 /* an index in link_freq[] */
541 static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
546 regbuf[0] = reg >> 8;
547 regbuf[1] = reg & 0xff;
550 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
552 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
553 __func__, ret, reg, val);
560 static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
565 regbuf[0] = reg >> 8;
566 regbuf[1] = reg & 0xff;
568 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
570 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
575 ret = i2c_master_recv(ov5645->i2c_client, val, 1);
577 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
585 static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
587 u8 val = ov5645->aec_pk_manual;
590 if (mode == V4L2_EXPOSURE_AUTO)
591 val &= ~OV5645_AEC_MANUAL_ENABLE;
592 else /* V4L2_EXPOSURE_MANUAL */
593 val |= OV5645_AEC_MANUAL_ENABLE;
595 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
597 ov5645->aec_pk_manual = val;
602 static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
604 u8 val = ov5645->aec_pk_manual;
608 val &= ~OV5645_AGC_MANUAL_ENABLE;
610 val |= OV5645_AGC_MANUAL_ENABLE;
612 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
614 ov5645->aec_pk_manual = val;
619 static int ov5645_set_register_array(struct ov5645 *ov5645,
620 const struct reg_value *settings,
621 unsigned int num_settings)
626 for (i = 0; i < num_settings; ++i, ++settings) {
627 ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
635 static int ov5645_set_power_off(struct device *dev)
637 struct v4l2_subdev *sd = dev_get_drvdata(dev);
638 struct ov5645 *ov5645 = to_ov5645(sd);
640 ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
641 gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
642 gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
643 clk_disable_unprepare(ov5645->xclk);
644 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
649 static int ov5645_set_power_on(struct device *dev)
651 struct v4l2_subdev *sd = dev_get_drvdata(dev);
652 struct ov5645 *ov5645 = to_ov5645(sd);
655 ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, ov5645->supplies);
659 ret = clk_prepare_enable(ov5645->xclk);
661 dev_err(ov5645->dev, "clk prepare enable failed\n");
662 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
666 usleep_range(5000, 15000);
667 gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
669 usleep_range(1000, 2000);
670 gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
674 ret = ov5645_set_register_array(ov5645, ov5645_global_init_setting,
675 ARRAY_SIZE(ov5645_global_init_setting));
677 dev_err(ov5645->dev, "could not set init registers\n");
681 usleep_range(500, 1000);
686 ov5645_set_power_off(dev);
690 static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
692 u32 reg_value = (value * 0x10) + 0x40;
695 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
699 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
702 static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
704 u8 val = ov5645->timing_tc_reg21;
708 val &= ~(OV5645_SENSOR_MIRROR);
710 val |= (OV5645_SENSOR_MIRROR);
712 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
714 ov5645->timing_tc_reg21 = val;
719 static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
721 u8 val = ov5645->timing_tc_reg20;
725 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
727 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
729 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
731 ov5645->timing_tc_reg20 = val;
736 static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
741 val = OV5645_SET_TEST_PATTERN(value - 1);
742 val |= OV5645_TEST_PATTERN_ENABLE;
745 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
748 static const char * const ov5645_test_pattern_menu[] = {
750 "Vertical Color Bars",
751 "Pseudo-Random Data",
756 static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
761 val = OV5645_AWB_MANUAL_ENABLE;
763 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
766 static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
768 struct ov5645 *ov5645 = container_of(ctrl->handler,
769 struct ov5645, ctrls);
772 mutex_lock(&ov5645->power_lock);
773 if (!pm_runtime_get_if_in_use(ov5645->dev)) {
774 mutex_unlock(&ov5645->power_lock);
779 case V4L2_CID_SATURATION:
780 ret = ov5645_set_saturation(ov5645, ctrl->val);
782 case V4L2_CID_AUTO_WHITE_BALANCE:
783 ret = ov5645_set_awb(ov5645, ctrl->val);
785 case V4L2_CID_AUTOGAIN:
786 ret = ov5645_set_agc_mode(ov5645, ctrl->val);
788 case V4L2_CID_EXPOSURE_AUTO:
789 ret = ov5645_set_aec_mode(ov5645, ctrl->val);
791 case V4L2_CID_TEST_PATTERN:
792 ret = ov5645_set_test_pattern(ov5645, ctrl->val);
795 ret = ov5645_set_hflip(ov5645, ctrl->val);
798 ret = ov5645_set_vflip(ov5645, ctrl->val);
805 pm_runtime_mark_last_busy(ov5645->dev);
806 pm_runtime_put_autosuspend(ov5645->dev);
807 mutex_unlock(&ov5645->power_lock);
812 static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
813 .s_ctrl = ov5645_s_ctrl,
816 static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
817 struct v4l2_subdev_state *sd_state,
818 struct v4l2_subdev_mbus_code_enum *code)
823 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
828 static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
829 struct v4l2_subdev_state *sd_state,
830 struct v4l2_subdev_frame_size_enum *fse)
832 if (fse->code != MEDIA_BUS_FMT_UYVY8_1X16)
835 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
838 fse->min_width = ov5645_mode_info_data[fse->index].width;
839 fse->max_width = ov5645_mode_info_data[fse->index].width;
840 fse->min_height = ov5645_mode_info_data[fse->index].height;
841 fse->max_height = ov5645_mode_info_data[fse->index].height;
846 static struct v4l2_mbus_framefmt *
847 __ov5645_get_pad_format(struct ov5645 *ov5645,
848 struct v4l2_subdev_state *sd_state,
850 enum v4l2_subdev_format_whence which)
853 case V4L2_SUBDEV_FORMAT_TRY:
854 return v4l2_subdev_get_try_format(&ov5645->sd, sd_state, pad);
855 case V4L2_SUBDEV_FORMAT_ACTIVE:
862 static int ov5645_get_format(struct v4l2_subdev *sd,
863 struct v4l2_subdev_state *sd_state,
864 struct v4l2_subdev_format *format)
866 struct ov5645 *ov5645 = to_ov5645(sd);
868 format->format = *__ov5645_get_pad_format(ov5645, sd_state,
874 static struct v4l2_rect *
875 __ov5645_get_pad_crop(struct ov5645 *ov5645,
876 struct v4l2_subdev_state *sd_state,
877 unsigned int pad, enum v4l2_subdev_format_whence which)
880 case V4L2_SUBDEV_FORMAT_TRY:
881 return v4l2_subdev_get_try_crop(&ov5645->sd, sd_state, pad);
882 case V4L2_SUBDEV_FORMAT_ACTIVE:
883 return &ov5645->crop;
889 static int ov5645_set_format(struct v4l2_subdev *sd,
890 struct v4l2_subdev_state *sd_state,
891 struct v4l2_subdev_format *format)
893 struct ov5645 *ov5645 = to_ov5645(sd);
894 struct v4l2_mbus_framefmt *__format;
895 struct v4l2_rect *__crop;
896 const struct ov5645_mode_info *new_mode;
899 __crop = __ov5645_get_pad_crop(ov5645, sd_state, format->pad,
902 new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
903 ARRAY_SIZE(ov5645_mode_info_data),
905 format->format.width, format->format.height);
907 __crop->width = new_mode->width;
908 __crop->height = new_mode->height;
910 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
911 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
912 new_mode->pixel_clock);
916 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
917 new_mode->link_freq);
921 ov5645->current_mode = new_mode;
924 __format = __ov5645_get_pad_format(ov5645, sd_state, format->pad,
926 __format->width = __crop->width;
927 __format->height = __crop->height;
928 __format->code = MEDIA_BUS_FMT_UYVY8_1X16;
929 __format->field = V4L2_FIELD_NONE;
930 __format->colorspace = V4L2_COLORSPACE_SRGB;
932 format->format = *__format;
937 static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
938 struct v4l2_subdev_state *sd_state)
940 struct v4l2_subdev_format fmt = { 0 };
942 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
943 fmt.format.width = 1920;
944 fmt.format.height = 1080;
946 ov5645_set_format(subdev, sd_state, &fmt);
951 static int ov5645_get_selection(struct v4l2_subdev *sd,
952 struct v4l2_subdev_state *sd_state,
953 struct v4l2_subdev_selection *sel)
955 struct ov5645 *ov5645 = to_ov5645(sd);
957 if (sel->target != V4L2_SEL_TGT_CROP)
960 sel->r = *__ov5645_get_pad_crop(ov5645, sd_state, sel->pad,
965 static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
967 struct ov5645 *ov5645 = to_ov5645(subdev);
971 ret = pm_runtime_resume_and_get(ov5645->dev);
975 ret = ov5645_set_register_array(ov5645,
976 ov5645->current_mode->data,
977 ov5645->current_mode->data_size);
979 dev_err(ov5645->dev, "could not set mode %dx%d\n",
980 ov5645->current_mode->width,
981 ov5645->current_mode->height);
984 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
986 dev_err(ov5645->dev, "could not sync v4l2 controls\n");
990 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
994 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
995 OV5645_SYSTEM_CTRL0_START);
999 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
1001 goto stream_off_rpm_put;
1003 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1004 OV5645_SYSTEM_CTRL0_STOP);
1006 goto stream_off_rpm_put;
1012 pm_runtime_put_sync(ov5645->dev);
1016 pm_runtime_mark_last_busy(ov5645->dev);
1017 pm_runtime_put_autosuspend(ov5645->dev);
1021 static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1022 .s_stream = ov5645_s_stream,
1025 static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1026 .init_cfg = ov5645_entity_init_cfg,
1027 .enum_mbus_code = ov5645_enum_mbus_code,
1028 .enum_frame_size = ov5645_enum_frame_size,
1029 .get_fmt = ov5645_get_format,
1030 .set_fmt = ov5645_set_format,
1031 .get_selection = ov5645_get_selection,
1034 static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1035 .video = &ov5645_video_ops,
1036 .pad = &ov5645_subdev_pad_ops,
1039 static int ov5645_probe(struct i2c_client *client)
1041 struct device *dev = &client->dev;
1042 struct device_node *endpoint;
1043 struct ov5645 *ov5645;
1044 u8 chip_id_high, chip_id_low;
1049 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1053 ov5645->i2c_client = client;
1056 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1058 dev_err(dev, "endpoint node not found\n");
1062 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1065 of_node_put(endpoint);
1068 dev_err(dev, "parsing endpoint node failed\n");
1072 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
1073 dev_err(dev, "invalid bus type, must be CSI2\n");
1077 /* get system clock (xclk) */
1078 ov5645->xclk = devm_clk_get(dev, NULL);
1079 if (IS_ERR(ov5645->xclk)) {
1080 dev_err(dev, "could not get xclk");
1081 return PTR_ERR(ov5645->xclk);
1084 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
1086 dev_err(dev, "could not get xclk frequency\n");
1090 /* external clock must be 24MHz, allow 1% tolerance */
1091 if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1092 dev_err(dev, "external clock frequency %u is not supported\n",
1097 ret = clk_set_rate(ov5645->xclk, xclk_freq);
1099 dev_err(dev, "could not set xclk frequency\n");
1103 for (i = 0; i < OV5645_NUM_SUPPLIES; i++)
1104 ov5645->supplies[i].supply = ov5645_supply_name[i];
1106 ret = devm_regulator_bulk_get(dev, OV5645_NUM_SUPPLIES,
1111 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1112 if (IS_ERR(ov5645->enable_gpio)) {
1113 dev_err(dev, "cannot get enable gpio\n");
1114 return PTR_ERR(ov5645->enable_gpio);
1117 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1118 if (IS_ERR(ov5645->rst_gpio)) {
1119 dev_err(dev, "cannot get reset gpio\n");
1120 return PTR_ERR(ov5645->rst_gpio);
1123 mutex_init(&ov5645->power_lock);
1125 v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1126 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1127 V4L2_CID_SATURATION, -4, 4, 1, 0);
1128 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1129 V4L2_CID_HFLIP, 0, 1, 1, 0);
1130 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1131 V4L2_CID_VFLIP, 0, 1, 1, 0);
1132 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1133 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1134 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1135 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1136 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1137 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1138 0, V4L2_EXPOSURE_AUTO);
1139 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1140 V4L2_CID_TEST_PATTERN,
1141 ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1142 0, 0, ov5645_test_pattern_menu);
1143 ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1145 V4L2_CID_PIXEL_RATE,
1147 ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1150 ARRAY_SIZE(link_freq) - 1,
1152 if (ov5645->link_freq)
1153 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1155 ov5645->sd.ctrl_handler = &ov5645->ctrls;
1157 if (ov5645->ctrls.error) {
1158 dev_err(dev, "%s: control initialization error %d\n",
1159 __func__, ov5645->ctrls.error);
1160 ret = ov5645->ctrls.error;
1164 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1165 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1166 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1167 ov5645->sd.dev = &client->dev;
1168 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1170 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1172 dev_err(dev, "could not register media entity\n");
1176 ret = ov5645_set_power_on(dev);
1180 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1181 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1182 dev_err(dev, "could not read ID high\n");
1186 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1187 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1188 dev_err(dev, "could not read ID low\n");
1193 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1195 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1196 &ov5645->aec_pk_manual);
1198 dev_err(dev, "could not read AEC/AGC mode\n");
1203 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1204 &ov5645->timing_tc_reg20);
1206 dev_err(dev, "could not read vflip value\n");
1211 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1212 &ov5645->timing_tc_reg21);
1214 dev_err(dev, "could not read hflip value\n");
1219 pm_runtime_set_active(dev);
1220 pm_runtime_get_noresume(dev);
1221 pm_runtime_enable(dev);
1223 ov5645_entity_init_cfg(&ov5645->sd, NULL);
1225 ret = v4l2_async_register_subdev(&ov5645->sd);
1227 dev_err(dev, "could not register v4l2 device\n");
1228 goto err_pm_runtime;
1231 pm_runtime_set_autosuspend_delay(dev, 1000);
1232 pm_runtime_use_autosuspend(dev);
1233 pm_runtime_mark_last_busy(dev);
1234 pm_runtime_put_autosuspend(dev);
1239 pm_runtime_disable(dev);
1240 pm_runtime_put_noidle(dev);
1242 ov5645_set_power_off(dev);
1244 media_entity_cleanup(&ov5645->sd.entity);
1246 v4l2_ctrl_handler_free(&ov5645->ctrls);
1247 mutex_destroy(&ov5645->power_lock);
1252 static void ov5645_remove(struct i2c_client *client)
1254 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1255 struct ov5645 *ov5645 = to_ov5645(sd);
1257 v4l2_async_unregister_subdev(&ov5645->sd);
1258 media_entity_cleanup(&ov5645->sd.entity);
1259 v4l2_ctrl_handler_free(&ov5645->ctrls);
1260 pm_runtime_disable(ov5645->dev);
1261 if (!pm_runtime_status_suspended(ov5645->dev))
1262 ov5645_set_power_off(ov5645->dev);
1263 pm_runtime_set_suspended(ov5645->dev);
1264 mutex_destroy(&ov5645->power_lock);
1267 static const struct i2c_device_id ov5645_id[] = {
1271 MODULE_DEVICE_TABLE(i2c, ov5645_id);
1273 static const struct of_device_id ov5645_of_match[] = {
1274 { .compatible = "ovti,ov5645" },
1277 MODULE_DEVICE_TABLE(of, ov5645_of_match);
1279 static const struct dev_pm_ops ov5645_pm_ops = {
1280 SET_RUNTIME_PM_OPS(ov5645_set_power_off, ov5645_set_power_on, NULL)
1283 static struct i2c_driver ov5645_i2c_driver = {
1285 .of_match_table = ov5645_of_match,
1287 .pm = &ov5645_pm_ops,
1289 .probe = ov5645_probe,
1290 .remove = ov5645_remove,
1291 .id_table = ov5645_id,
1294 module_i2c_driver(ov5645_i2c_driver);
1296 MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1298 MODULE_LICENSE("GPL v2");