1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Intel Corporation
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
7 #include <linux/module.h>
8 #include <linux/pm_runtime.h>
9 #include <media/v4l2-ctrls.h>
10 #include <media/v4l2-device.h>
11 #include <media/v4l2-event.h>
12 #include <media/v4l2-fwnode.h>
14 #define IMX319_REG_MODE_SELECT 0x0100
15 #define IMX319_MODE_STANDBY 0x00
16 #define IMX319_MODE_STREAMING 0x01
19 #define IMX319_REG_CHIP_ID 0x0016
20 #define IMX319_CHIP_ID 0x0319
22 /* V_TIMING internal */
23 #define IMX319_REG_FLL 0x0340
24 #define IMX319_FLL_MAX 0xffff
26 /* Exposure control */
27 #define IMX319_REG_EXPOSURE 0x0202
28 #define IMX319_EXPOSURE_MIN 1
29 #define IMX319_EXPOSURE_STEP 1
30 #define IMX319_EXPOSURE_DEFAULT 0x04f6
33 * the digital control register for all color control looks like:
34 * +-----------------+------------------+
36 * +-----------------+------------------+
38 * --------------------------------------
39 * it is used to calculate the digital gain times value(integral + fractional)
40 * the [15:8] bits is the fractional part and [7:0] bits is the integral
41 * calculation equation is:
42 * gain value (unit: times) = REG[15:8] + REG[7:0]/0x100
43 * Only value in 0x0100 ~ 0x0FFF range is allowed.
44 * Analog gain use 10 bits in the registers and allowed range is 0 ~ 960
46 /* Analog gain control */
47 #define IMX319_REG_ANALOG_GAIN 0x0204
48 #define IMX319_ANA_GAIN_MIN 0
49 #define IMX319_ANA_GAIN_MAX 960
50 #define IMX319_ANA_GAIN_STEP 1
51 #define IMX319_ANA_GAIN_DEFAULT 0
53 /* Digital gain control */
54 #define IMX319_REG_DPGA_USE_GLOBAL_GAIN 0x3ff9
55 #define IMX319_REG_DIG_GAIN_GLOBAL 0x020e
56 #define IMX319_DGTL_GAIN_MIN 256
57 #define IMX319_DGTL_GAIN_MAX 4095
58 #define IMX319_DGTL_GAIN_STEP 1
59 #define IMX319_DGTL_GAIN_DEFAULT 256
61 /* Test Pattern Control */
62 #define IMX319_REG_TEST_PATTERN 0x0600
63 #define IMX319_TEST_PATTERN_DISABLED 0
64 #define IMX319_TEST_PATTERN_SOLID_COLOR 1
65 #define IMX319_TEST_PATTERN_COLOR_BARS 2
66 #define IMX319_TEST_PATTERN_GRAY_COLOR_BARS 3
67 #define IMX319_TEST_PATTERN_PN9 4
70 #define IMX319_REG_ORIENTATION 0x0101
72 /* default link frequency and external clock */
73 #define IMX319_LINK_FREQ_DEFAULT 482400000
74 #define IMX319_EXT_CLK 19200000
75 #define IMX319_LINK_FREQ_INDEX 0
82 struct imx319_reg_list {
84 const struct imx319_reg *regs;
87 /* Mode : resolution and related config&values */
101 /* index of link frequency */
104 /* Default register values */
105 struct imx319_reg_list reg_list;
108 struct imx319_hwcfg {
109 u32 ext_clk; /* sensor external clk */
110 s64 *link_freqs; /* CSI-2 link frequencies */
111 unsigned int nr_of_link_freqs;
115 struct v4l2_subdev sd;
116 struct media_pad pad;
118 struct v4l2_ctrl_handler ctrl_handler;
120 struct v4l2_ctrl *link_freq;
121 struct v4l2_ctrl *pixel_rate;
122 struct v4l2_ctrl *vblank;
123 struct v4l2_ctrl *hblank;
124 struct v4l2_ctrl *exposure;
125 struct v4l2_ctrl *vflip;
126 struct v4l2_ctrl *hflip;
129 const struct imx319_mode *cur_mode;
131 struct imx319_hwcfg *hwcfg;
132 s64 link_def_freq; /* CSI-2 link default frequency */
135 * Mutex for serialized access:
136 * Protect sensor set pad format and start/stop streaming safely.
137 * Protect access to sensor v4l2 controls.
141 /* Streaming on/off */
143 /* True if the device has been identified */
147 static const struct imx319_reg imx319_global_regs[] = {
254 static const struct imx319_reg_list imx319_global_setting = {
255 .num_of_regs = ARRAY_SIZE(imx319_global_regs),
256 .regs = imx319_global_regs,
259 static const struct imx319_reg mode_3264x2448_regs[] = {
433 static const struct imx319_reg mode_3280x2464_regs[] = {
607 static const struct imx319_reg mode_1936x1096_regs[] = {
781 static const struct imx319_reg mode_1920x1080_regs[] = {
955 static const struct imx319_reg mode_1640x1232_regs[] = {
1129 static const struct imx319_reg mode_1640x922_regs[] = {
1303 static const struct imx319_reg mode_1296x736_regs[] = {
1477 static const struct imx319_reg mode_1280x720_regs[] = {
1651 static const char * const imx319_test_pattern_menu[] = {
1654 "Eight Vertical Colour Bars",
1655 "Colour Bars With Fade to Grey",
1656 "Pseudorandom Sequence (PN9)",
1659 /* supported link frequencies */
1660 static const s64 link_freq_menu_items[] = {
1661 IMX319_LINK_FREQ_DEFAULT,
1665 static const struct imx319_mode supported_modes[] = {
1672 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1674 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
1675 .regs = mode_3280x2464_regs,
1684 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1686 .num_of_regs = ARRAY_SIZE(mode_3264x2448_regs),
1687 .regs = mode_3264x2448_regs,
1696 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1698 .num_of_regs = ARRAY_SIZE(mode_1936x1096_regs),
1699 .regs = mode_1936x1096_regs,
1708 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1710 .num_of_regs = ARRAY_SIZE(mode_1920x1080_regs),
1711 .regs = mode_1920x1080_regs,
1720 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1722 .num_of_regs = ARRAY_SIZE(mode_1640x1232_regs),
1723 .regs = mode_1640x1232_regs,
1732 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1734 .num_of_regs = ARRAY_SIZE(mode_1640x922_regs),
1735 .regs = mode_1640x922_regs,
1744 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1746 .num_of_regs = ARRAY_SIZE(mode_1296x736_regs),
1747 .regs = mode_1296x736_regs,
1756 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1758 .num_of_regs = ARRAY_SIZE(mode_1280x720_regs),
1759 .regs = mode_1280x720_regs,
1764 static inline struct imx319 *to_imx319(struct v4l2_subdev *_sd)
1766 return container_of(_sd, struct imx319, sd);
1769 /* Get bayer order based on flip setting. */
1770 static u32 imx319_get_format_code(struct imx319 *imx319)
1773 * Only one bayer order is supported.
1774 * It depends on the flip settings.
1777 static const u32 codes[2][2] = {
1778 { MEDIA_BUS_FMT_SRGGB10_1X10, MEDIA_BUS_FMT_SGRBG10_1X10, },
1779 { MEDIA_BUS_FMT_SGBRG10_1X10, MEDIA_BUS_FMT_SBGGR10_1X10, },
1782 lockdep_assert_held(&imx319->mutex);
1783 code = codes[imx319->vflip->val][imx319->hflip->val];
1788 /* Read registers up to 4 at a time */
1789 static int imx319_read_reg(struct imx319 *imx319, u16 reg, u32 len, u32 *val)
1791 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1792 struct i2c_msg msgs[2];
1794 u8 data_buf[4] = { 0 };
1800 put_unaligned_be16(reg, addr_buf);
1801 /* Write register address */
1802 msgs[0].addr = client->addr;
1804 msgs[0].len = ARRAY_SIZE(addr_buf);
1805 msgs[0].buf = addr_buf;
1807 /* Read data from register */
1808 msgs[1].addr = client->addr;
1809 msgs[1].flags = I2C_M_RD;
1811 msgs[1].buf = &data_buf[4 - len];
1813 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1814 if (ret != ARRAY_SIZE(msgs))
1817 *val = get_unaligned_be32(data_buf);
1822 /* Write registers up to 4 at a time */
1823 static int imx319_write_reg(struct imx319 *imx319, u16 reg, u32 len, u32 val)
1825 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1831 put_unaligned_be16(reg, buf);
1832 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
1833 if (i2c_master_send(client, buf, len + 2) != len + 2)
1839 /* Write a list of registers */
1840 static int imx319_write_regs(struct imx319 *imx319,
1841 const struct imx319_reg *regs, u32 len)
1843 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1847 for (i = 0; i < len; i++) {
1848 ret = imx319_write_reg(imx319, regs[i].address, 1, regs[i].val);
1850 dev_err_ratelimited(&client->dev,
1851 "write reg 0x%4.4x return err %d",
1852 regs[i].address, ret);
1860 /* Open sub-device */
1861 static int imx319_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1863 struct imx319 *imx319 = to_imx319(sd);
1864 struct v4l2_mbus_framefmt *try_fmt =
1865 v4l2_subdev_get_try_format(sd, fh->state, 0);
1867 mutex_lock(&imx319->mutex);
1869 /* Initialize try_fmt */
1870 try_fmt->width = imx319->cur_mode->width;
1871 try_fmt->height = imx319->cur_mode->height;
1872 try_fmt->code = imx319_get_format_code(imx319);
1873 try_fmt->field = V4L2_FIELD_NONE;
1875 mutex_unlock(&imx319->mutex);
1880 static int imx319_set_ctrl(struct v4l2_ctrl *ctrl)
1882 struct imx319 *imx319 = container_of(ctrl->handler,
1883 struct imx319, ctrl_handler);
1884 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1888 /* Propagate change of current control to all related controls */
1890 case V4L2_CID_VBLANK:
1891 /* Update max exposure while meeting expected vblanking */
1892 max = imx319->cur_mode->height + ctrl->val - 18;
1893 __v4l2_ctrl_modify_range(imx319->exposure,
1894 imx319->exposure->minimum,
1895 max, imx319->exposure->step, max);
1900 * Applying V4L2 control value only happens
1901 * when power is up for streaming
1903 if (!pm_runtime_get_if_in_use(&client->dev))
1907 case V4L2_CID_ANALOGUE_GAIN:
1908 /* Analog gain = 1024/(1024 - ctrl->val) times */
1909 ret = imx319_write_reg(imx319, IMX319_REG_ANALOG_GAIN, 2,
1912 case V4L2_CID_DIGITAL_GAIN:
1913 ret = imx319_write_reg(imx319, IMX319_REG_DIG_GAIN_GLOBAL, 2,
1916 case V4L2_CID_EXPOSURE:
1917 ret = imx319_write_reg(imx319, IMX319_REG_EXPOSURE, 2,
1920 case V4L2_CID_VBLANK:
1921 /* Update FLL that meets expected vertical blanking */
1922 ret = imx319_write_reg(imx319, IMX319_REG_FLL, 2,
1923 imx319->cur_mode->height + ctrl->val);
1925 case V4L2_CID_TEST_PATTERN:
1926 ret = imx319_write_reg(imx319, IMX319_REG_TEST_PATTERN,
1929 case V4L2_CID_HFLIP:
1930 case V4L2_CID_VFLIP:
1931 ret = imx319_write_reg(imx319, IMX319_REG_ORIENTATION, 1,
1932 imx319->hflip->val |
1933 imx319->vflip->val << 1);
1937 dev_info(&client->dev, "ctrl(id:0x%x,val:0x%x) is not handled",
1938 ctrl->id, ctrl->val);
1942 pm_runtime_put(&client->dev);
1947 static const struct v4l2_ctrl_ops imx319_ctrl_ops = {
1948 .s_ctrl = imx319_set_ctrl,
1951 static int imx319_enum_mbus_code(struct v4l2_subdev *sd,
1952 struct v4l2_subdev_state *sd_state,
1953 struct v4l2_subdev_mbus_code_enum *code)
1955 struct imx319 *imx319 = to_imx319(sd);
1957 if (code->index > 0)
1960 mutex_lock(&imx319->mutex);
1961 code->code = imx319_get_format_code(imx319);
1962 mutex_unlock(&imx319->mutex);
1967 static int imx319_enum_frame_size(struct v4l2_subdev *sd,
1968 struct v4l2_subdev_state *sd_state,
1969 struct v4l2_subdev_frame_size_enum *fse)
1971 struct imx319 *imx319 = to_imx319(sd);
1973 if (fse->index >= ARRAY_SIZE(supported_modes))
1976 mutex_lock(&imx319->mutex);
1977 if (fse->code != imx319_get_format_code(imx319)) {
1978 mutex_unlock(&imx319->mutex);
1981 mutex_unlock(&imx319->mutex);
1983 fse->min_width = supported_modes[fse->index].width;
1984 fse->max_width = fse->min_width;
1985 fse->min_height = supported_modes[fse->index].height;
1986 fse->max_height = fse->min_height;
1991 static void imx319_update_pad_format(struct imx319 *imx319,
1992 const struct imx319_mode *mode,
1993 struct v4l2_subdev_format *fmt)
1995 fmt->format.width = mode->width;
1996 fmt->format.height = mode->height;
1997 fmt->format.code = imx319_get_format_code(imx319);
1998 fmt->format.field = V4L2_FIELD_NONE;
2001 static int imx319_do_get_pad_format(struct imx319 *imx319,
2002 struct v4l2_subdev_state *sd_state,
2003 struct v4l2_subdev_format *fmt)
2005 struct v4l2_mbus_framefmt *framefmt;
2006 struct v4l2_subdev *sd = &imx319->sd;
2008 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2009 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
2010 fmt->format = *framefmt;
2012 imx319_update_pad_format(imx319, imx319->cur_mode, fmt);
2018 static int imx319_get_pad_format(struct v4l2_subdev *sd,
2019 struct v4l2_subdev_state *sd_state,
2020 struct v4l2_subdev_format *fmt)
2022 struct imx319 *imx319 = to_imx319(sd);
2025 mutex_lock(&imx319->mutex);
2026 ret = imx319_do_get_pad_format(imx319, sd_state, fmt);
2027 mutex_unlock(&imx319->mutex);
2033 imx319_set_pad_format(struct v4l2_subdev *sd,
2034 struct v4l2_subdev_state *sd_state,
2035 struct v4l2_subdev_format *fmt)
2037 struct imx319 *imx319 = to_imx319(sd);
2038 const struct imx319_mode *mode;
2039 struct v4l2_mbus_framefmt *framefmt;
2046 mutex_lock(&imx319->mutex);
2049 * Only one bayer order is supported.
2050 * It depends on the flip settings.
2052 fmt->format.code = imx319_get_format_code(imx319);
2054 mode = v4l2_find_nearest_size(supported_modes,
2055 ARRAY_SIZE(supported_modes),
2057 fmt->format.width, fmt->format.height);
2058 imx319_update_pad_format(imx319, mode, fmt);
2059 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2060 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
2061 *framefmt = fmt->format;
2063 imx319->cur_mode = mode;
2064 pixel_rate = imx319->link_def_freq * 2 * 4;
2065 do_div(pixel_rate, 10);
2066 __v4l2_ctrl_s_ctrl_int64(imx319->pixel_rate, pixel_rate);
2067 /* Update limits and set FPS to default */
2068 height = imx319->cur_mode->height;
2069 vblank_def = imx319->cur_mode->fll_def - height;
2070 vblank_min = imx319->cur_mode->fll_min - height;
2071 height = IMX319_FLL_MAX - height;
2072 __v4l2_ctrl_modify_range(imx319->vblank, vblank_min, height, 1,
2074 __v4l2_ctrl_s_ctrl(imx319->vblank, vblank_def);
2075 h_blank = mode->llp - imx319->cur_mode->width;
2077 * Currently hblank is not changeable.
2078 * So FPS control is done only by vblank.
2080 __v4l2_ctrl_modify_range(imx319->hblank, h_blank,
2081 h_blank, 1, h_blank);
2084 mutex_unlock(&imx319->mutex);
2089 /* Verify chip ID */
2090 static int imx319_identify_module(struct imx319 *imx319)
2092 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
2096 if (imx319->identified)
2099 ret = imx319_read_reg(imx319, IMX319_REG_CHIP_ID, 2, &val);
2103 if (val != IMX319_CHIP_ID) {
2104 dev_err(&client->dev, "chip id mismatch: %x!=%x",
2105 IMX319_CHIP_ID, val);
2109 imx319->identified = true;
2114 /* Start streaming */
2115 static int imx319_start_streaming(struct imx319 *imx319)
2117 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
2118 const struct imx319_reg_list *reg_list;
2121 ret = imx319_identify_module(imx319);
2125 /* Global Setting */
2126 reg_list = &imx319_global_setting;
2127 ret = imx319_write_regs(imx319, reg_list->regs, reg_list->num_of_regs);
2129 dev_err(&client->dev, "failed to set global settings");
2133 /* Apply default values of current mode */
2134 reg_list = &imx319->cur_mode->reg_list;
2135 ret = imx319_write_regs(imx319, reg_list->regs, reg_list->num_of_regs);
2137 dev_err(&client->dev, "failed to set mode");
2141 /* set digital gain control to all color mode */
2142 ret = imx319_write_reg(imx319, IMX319_REG_DPGA_USE_GLOBAL_GAIN, 1, 1);
2146 /* Apply customized values from user */
2147 ret = __v4l2_ctrl_handler_setup(imx319->sd.ctrl_handler);
2151 return imx319_write_reg(imx319, IMX319_REG_MODE_SELECT,
2152 1, IMX319_MODE_STREAMING);
2155 /* Stop streaming */
2156 static int imx319_stop_streaming(struct imx319 *imx319)
2158 return imx319_write_reg(imx319, IMX319_REG_MODE_SELECT,
2159 1, IMX319_MODE_STANDBY);
2162 static int imx319_set_stream(struct v4l2_subdev *sd, int enable)
2164 struct imx319 *imx319 = to_imx319(sd);
2165 struct i2c_client *client = v4l2_get_subdevdata(sd);
2168 mutex_lock(&imx319->mutex);
2169 if (imx319->streaming == enable) {
2170 mutex_unlock(&imx319->mutex);
2175 ret = pm_runtime_resume_and_get(&client->dev);
2180 * Apply default & customized values
2181 * and then start streaming.
2183 ret = imx319_start_streaming(imx319);
2187 imx319_stop_streaming(imx319);
2188 pm_runtime_put(&client->dev);
2191 imx319->streaming = enable;
2193 /* vflip and hflip cannot change during streaming */
2194 __v4l2_ctrl_grab(imx319->vflip, enable);
2195 __v4l2_ctrl_grab(imx319->hflip, enable);
2197 mutex_unlock(&imx319->mutex);
2202 pm_runtime_put(&client->dev);
2204 mutex_unlock(&imx319->mutex);
2209 static int __maybe_unused imx319_suspend(struct device *dev)
2211 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2212 struct imx319 *imx319 = to_imx319(sd);
2214 if (imx319->streaming)
2215 imx319_stop_streaming(imx319);
2220 static int __maybe_unused imx319_resume(struct device *dev)
2222 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2223 struct imx319 *imx319 = to_imx319(sd);
2226 if (imx319->streaming) {
2227 ret = imx319_start_streaming(imx319);
2235 imx319_stop_streaming(imx319);
2236 imx319->streaming = 0;
2240 static const struct v4l2_subdev_core_ops imx319_subdev_core_ops = {
2241 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2242 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
2245 static const struct v4l2_subdev_video_ops imx319_video_ops = {
2246 .s_stream = imx319_set_stream,
2249 static const struct v4l2_subdev_pad_ops imx319_pad_ops = {
2250 .enum_mbus_code = imx319_enum_mbus_code,
2251 .get_fmt = imx319_get_pad_format,
2252 .set_fmt = imx319_set_pad_format,
2253 .enum_frame_size = imx319_enum_frame_size,
2256 static const struct v4l2_subdev_ops imx319_subdev_ops = {
2257 .core = &imx319_subdev_core_ops,
2258 .video = &imx319_video_ops,
2259 .pad = &imx319_pad_ops,
2262 static const struct media_entity_operations imx319_subdev_entity_ops = {
2263 .link_validate = v4l2_subdev_link_validate,
2266 static const struct v4l2_subdev_internal_ops imx319_internal_ops = {
2267 .open = imx319_open,
2270 /* Initialize control handlers */
2271 static int imx319_init_controls(struct imx319 *imx319)
2273 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
2274 struct v4l2_ctrl_handler *ctrl_hdlr;
2280 const struct imx319_mode *mode;
2284 ctrl_hdlr = &imx319->ctrl_handler;
2285 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10);
2289 ctrl_hdlr->lock = &imx319->mutex;
2290 max = ARRAY_SIZE(link_freq_menu_items) - 1;
2291 imx319->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx319_ctrl_ops,
2292 V4L2_CID_LINK_FREQ, max, 0,
2293 link_freq_menu_items);
2294 if (imx319->link_freq)
2295 imx319->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2297 /* pixel_rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
2298 pixel_rate = imx319->link_def_freq * 2 * 4;
2299 do_div(pixel_rate, 10);
2300 /* By default, PIXEL_RATE is read only */
2301 imx319->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2302 V4L2_CID_PIXEL_RATE, pixel_rate,
2303 pixel_rate, 1, pixel_rate);
2305 /* Initial vblank/hblank/exposure parameters based on current mode */
2306 mode = imx319->cur_mode;
2307 vblank_def = mode->fll_def - mode->height;
2308 vblank_min = mode->fll_min - mode->height;
2309 imx319->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2310 V4L2_CID_VBLANK, vblank_min,
2311 IMX319_FLL_MAX - mode->height,
2314 hblank = mode->llp - mode->width;
2315 imx319->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2316 V4L2_CID_HBLANK, hblank, hblank,
2319 imx319->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2321 /* fll >= exposure time + adjust parameter (default value is 18) */
2322 exposure_max = mode->fll_def - 18;
2323 imx319->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2325 IMX319_EXPOSURE_MIN, exposure_max,
2326 IMX319_EXPOSURE_STEP,
2327 IMX319_EXPOSURE_DEFAULT);
2329 imx319->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2330 V4L2_CID_HFLIP, 0, 1, 1, 0);
2332 imx319->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
2333 imx319->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2334 V4L2_CID_VFLIP, 0, 1, 1, 0);
2336 imx319->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
2338 v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
2339 IMX319_ANA_GAIN_MIN, IMX319_ANA_GAIN_MAX,
2340 IMX319_ANA_GAIN_STEP, IMX319_ANA_GAIN_DEFAULT);
2343 v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
2344 IMX319_DGTL_GAIN_MIN, IMX319_DGTL_GAIN_MAX,
2345 IMX319_DGTL_GAIN_STEP, IMX319_DGTL_GAIN_DEFAULT);
2347 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx319_ctrl_ops,
2348 V4L2_CID_TEST_PATTERN,
2349 ARRAY_SIZE(imx319_test_pattern_menu) - 1,
2350 0, 0, imx319_test_pattern_menu);
2351 if (ctrl_hdlr->error) {
2352 ret = ctrl_hdlr->error;
2353 dev_err(&client->dev, "control init failed: %d", ret);
2357 imx319->sd.ctrl_handler = ctrl_hdlr;
2362 v4l2_ctrl_handler_free(ctrl_hdlr);
2367 static struct imx319_hwcfg *imx319_get_hwcfg(struct device *dev)
2369 struct imx319_hwcfg *cfg;
2370 struct v4l2_fwnode_endpoint bus_cfg = {
2371 .bus_type = V4L2_MBUS_CSI2_DPHY
2373 struct fwnode_handle *ep;
2374 struct fwnode_handle *fwnode = dev_fwnode(dev);
2381 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
2385 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
2389 cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
2393 ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
2396 dev_err(dev, "can't get clock frequency");
2400 dev_dbg(dev, "ext clk: %d", cfg->ext_clk);
2401 if (cfg->ext_clk != IMX319_EXT_CLK) {
2402 dev_err(dev, "external clock %d is not supported",
2407 dev_dbg(dev, "num of link freqs: %d", bus_cfg.nr_of_link_frequencies);
2408 if (!bus_cfg.nr_of_link_frequencies) {
2409 dev_warn(dev, "no link frequencies defined");
2413 cfg->nr_of_link_freqs = bus_cfg.nr_of_link_frequencies;
2414 cfg->link_freqs = devm_kcalloc(dev,
2415 bus_cfg.nr_of_link_frequencies + 1,
2416 sizeof(*cfg->link_freqs), GFP_KERNEL);
2417 if (!cfg->link_freqs)
2420 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) {
2421 cfg->link_freqs[i] = bus_cfg.link_frequencies[i];
2422 dev_dbg(dev, "link_freq[%d] = %lld", i, cfg->link_freqs[i]);
2425 v4l2_fwnode_endpoint_free(&bus_cfg);
2426 fwnode_handle_put(ep);
2430 v4l2_fwnode_endpoint_free(&bus_cfg);
2431 fwnode_handle_put(ep);
2435 static int imx319_probe(struct i2c_client *client)
2437 struct imx319 *imx319;
2442 imx319 = devm_kzalloc(&client->dev, sizeof(*imx319), GFP_KERNEL);
2446 mutex_init(&imx319->mutex);
2448 /* Initialize subdev */
2449 v4l2_i2c_subdev_init(&imx319->sd, client, &imx319_subdev_ops);
2451 full_power = acpi_dev_state_d0(&client->dev);
2453 /* Check module identity */
2454 ret = imx319_identify_module(imx319);
2456 dev_err(&client->dev, "failed to find sensor: %d", ret);
2461 imx319->hwcfg = imx319_get_hwcfg(&client->dev);
2462 if (!imx319->hwcfg) {
2463 dev_err(&client->dev, "failed to get hwcfg");
2468 imx319->link_def_freq = link_freq_menu_items[IMX319_LINK_FREQ_INDEX];
2469 for (i = 0; i < imx319->hwcfg->nr_of_link_freqs; i++) {
2470 if (imx319->hwcfg->link_freqs[i] == imx319->link_def_freq) {
2471 dev_dbg(&client->dev, "link freq index %d matched", i);
2476 if (i == imx319->hwcfg->nr_of_link_freqs) {
2477 dev_err(&client->dev, "no link frequency supported");
2482 /* Set default mode to max resolution */
2483 imx319->cur_mode = &supported_modes[0];
2485 ret = imx319_init_controls(imx319);
2487 dev_err(&client->dev, "failed to init controls: %d", ret);
2491 /* Initialize subdev */
2492 imx319->sd.internal_ops = &imx319_internal_ops;
2493 imx319->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
2494 V4L2_SUBDEV_FL_HAS_EVENTS;
2495 imx319->sd.entity.ops = &imx319_subdev_entity_ops;
2496 imx319->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2498 /* Initialize source pad */
2499 imx319->pad.flags = MEDIA_PAD_FL_SOURCE;
2500 ret = media_entity_pads_init(&imx319->sd.entity, 1, &imx319->pad);
2502 dev_err(&client->dev, "failed to init entity pads: %d", ret);
2503 goto error_handler_free;
2506 ret = v4l2_async_register_subdev_sensor(&imx319->sd);
2508 goto error_media_entity;
2510 /* Set the device's state to active if it's in D0 state. */
2512 pm_runtime_set_active(&client->dev);
2513 pm_runtime_enable(&client->dev);
2514 pm_runtime_idle(&client->dev);
2519 media_entity_cleanup(&imx319->sd.entity);
2522 v4l2_ctrl_handler_free(imx319->sd.ctrl_handler);
2525 mutex_destroy(&imx319->mutex);
2530 static void imx319_remove(struct i2c_client *client)
2532 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2533 struct imx319 *imx319 = to_imx319(sd);
2535 v4l2_async_unregister_subdev(sd);
2536 media_entity_cleanup(&sd->entity);
2537 v4l2_ctrl_handler_free(sd->ctrl_handler);
2539 pm_runtime_disable(&client->dev);
2540 pm_runtime_set_suspended(&client->dev);
2542 mutex_destroy(&imx319->mutex);
2545 static const struct dev_pm_ops imx319_pm_ops = {
2546 SET_SYSTEM_SLEEP_PM_OPS(imx319_suspend, imx319_resume)
2549 static const struct acpi_device_id imx319_acpi_ids[] __maybe_unused = {
2553 MODULE_DEVICE_TABLE(acpi, imx319_acpi_ids);
2555 static struct i2c_driver imx319_i2c_driver = {
2558 .pm = &imx319_pm_ops,
2559 .acpi_match_table = ACPI_PTR(imx319_acpi_ids),
2561 .probe = imx319_probe,
2562 .remove = imx319_remove,
2563 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
2565 module_i2c_driver(imx319_i2c_driver);
2570 MODULE_AUTHOR("Yang, Hyungwoo");
2571 MODULE_DESCRIPTION("Sony imx319 sensor driver");
2572 MODULE_LICENSE("GPL v2");