1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices ADV7511 HDMI Transmitter Device Driver
5 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
9 * This file is named adv7511-v4l2.c so it doesn't conflict with the Analog
10 * Device ADV7511 (config fragment CONFIG_DRM_I2C_ADV7511).
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/i2c.h>
18 #include <linux/delay.h>
19 #include <linux/videodev2.h>
20 #include <linux/workqueue.h>
21 #include <linux/hdmi.h>
22 #include <linux/v4l2-dv-timings.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-common.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-dv-timings.h>
27 #include <media/i2c/adv7511.h>
28 #include <media/cec.h>
31 module_param(debug, int, 0644);
32 MODULE_PARM_DESC(debug, "debug level (0-2)");
34 MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver");
35 MODULE_AUTHOR("Hans Verkuil");
36 MODULE_LICENSE("GPL v2");
38 #define MASK_ADV7511_EDID_RDY_INT 0x04
39 #define MASK_ADV7511_MSEN_INT 0x40
40 #define MASK_ADV7511_HPD_INT 0x80
42 #define MASK_ADV7511_HPD_DETECT 0x40
43 #define MASK_ADV7511_MSEN_DETECT 0x20
44 #define MASK_ADV7511_EDID_RDY 0x10
46 #define EDID_MAX_RETRIES (8)
47 #define EDID_DELAY 250
48 #define EDID_MAX_SEGM 8
50 #define ADV7511_MAX_WIDTH 1920
51 #define ADV7511_MAX_HEIGHT 1200
52 #define ADV7511_MIN_PIXELCLOCK 20000000
53 #define ADV7511_MAX_PIXELCLOCK 225000000
55 #define ADV7511_MAX_ADDRS (3)
58 **********************************************************************
60 * Arrays with configuration parameters for the ADV7511
62 **********************************************************************
65 struct i2c_reg_value {
70 struct adv7511_state_edid {
71 /* total number of blocks */
73 /* Number of segments read */
75 u8 data[EDID_MAX_SEGM * 256];
76 /* Number of EDID read retries left */
77 unsigned read_retries;
81 struct adv7511_state {
82 struct adv7511_platform_data pdata;
83 struct v4l2_subdev sd;
85 struct v4l2_ctrl_handler hdl;
91 struct i2c_client *i2c_cec;
92 struct cec_adapter *cec_adap;
93 u8 cec_addr[ADV7511_MAX_ADDRS];
95 bool cec_enabled_adap;
97 /* Is the adv7511 powered on? */
99 /* Did we receive hotplug and rx-sense signals? */
102 /* timings from s_dv_timings */
103 struct v4l2_dv_timings dv_timings;
111 struct v4l2_ctrl *hdmi_mode_ctrl;
112 struct v4l2_ctrl *hotplug_ctrl;
113 struct v4l2_ctrl *rx_sense_ctrl;
114 struct v4l2_ctrl *have_edid0_ctrl;
115 struct v4l2_ctrl *rgb_quantization_range_ctrl;
116 struct v4l2_ctrl *content_type_ctrl;
117 struct i2c_client *i2c_edid;
118 struct i2c_client *i2c_pktmem;
119 struct adv7511_state_edid edid;
120 /* Running counter of the number of detected EDIDs (for debugging) */
121 unsigned edid_detect_counter;
122 struct workqueue_struct *work_queue;
123 struct delayed_work edid_handler; /* work entry */
126 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd);
127 static bool adv7511_check_edid_status(struct v4l2_subdev *sd);
128 static void adv7511_setup(struct v4l2_subdev *sd);
129 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq);
130 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
133 static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
134 .type = V4L2_DV_BT_656_1120,
135 /* keep this initialization for compatibility with GCC < 4.4.6 */
137 V4L2_INIT_BT_TIMINGS(640, ADV7511_MAX_WIDTH, 350, ADV7511_MAX_HEIGHT,
138 ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
139 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
140 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
141 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
142 V4L2_DV_BT_CAP_CUSTOM)
145 static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd)
147 return container_of(sd, struct adv7511_state, sd);
150 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
152 return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd;
155 /* ------------------------ I2C ----------------------------------------------- */
157 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
158 u8 command, bool check)
160 union i2c_smbus_data data;
162 if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
163 I2C_SMBUS_READ, command,
164 I2C_SMBUS_BYTE_DATA, &data))
167 v4l_err(client, "error reading %02x, %02x\n",
168 client->addr, command);
172 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
175 for (i = 0; i < 3; i++) {
176 int ret = adv_smbus_read_byte_data_check(client, command, true);
179 v4l_err(client, "read ok after %d retries\n", i);
183 v4l_err(client, "read failed\n");
187 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
189 struct i2c_client *client = v4l2_get_subdevdata(sd);
191 return adv_smbus_read_byte_data(client, reg);
194 static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
196 struct i2c_client *client = v4l2_get_subdevdata(sd);
200 for (i = 0; i < 3; i++) {
201 ret = i2c_smbus_write_byte_data(client, reg, val);
205 v4l2_err(sd, "%s: i2c write error\n", __func__);
209 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
210 and then the value-mask (to be OR-ed). */
211 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
213 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
216 static int adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
218 struct adv7511_state *state = get_adv7511_state(sd);
221 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
223 for (i = 0; i < len; i += I2C_SMBUS_BLOCK_MAX) {
226 ret = i2c_smbus_read_i2c_block_data(state->i2c_edid, i,
227 I2C_SMBUS_BLOCK_MAX, buf + i);
229 v4l2_err(sd, "%s: i2c read error\n", __func__);
237 static inline int adv7511_cec_read(struct v4l2_subdev *sd, u8 reg)
239 struct adv7511_state *state = get_adv7511_state(sd);
241 return i2c_smbus_read_byte_data(state->i2c_cec, reg);
244 static int adv7511_cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
246 struct adv7511_state *state = get_adv7511_state(sd);
250 for (i = 0; i < 3; i++) {
251 ret = i2c_smbus_write_byte_data(state->i2c_cec, reg, val);
255 v4l2_err(sd, "%s: I2C Write Problem\n", __func__);
259 static inline int adv7511_cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask,
262 return adv7511_cec_write(sd, reg, (adv7511_cec_read(sd, reg) & mask) | val);
265 static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg)
267 struct adv7511_state *state = get_adv7511_state(sd);
269 return adv_smbus_read_byte_data(state->i2c_pktmem, reg);
272 static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd)
274 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
277 static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd)
279 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
282 static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode)
284 adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
287 static void adv7511_csc_coeff(struct v4l2_subdev *sd,
288 u16 A1, u16 A2, u16 A3, u16 A4,
289 u16 B1, u16 B2, u16 B3, u16 B4,
290 u16 C1, u16 C2, u16 C3, u16 C4)
293 adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
294 adv7511_wr(sd, 0x19, A1);
295 adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
296 adv7511_wr(sd, 0x1B, A2);
297 adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
298 adv7511_wr(sd, 0x1d, A3);
299 adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
300 adv7511_wr(sd, 0x1f, A4);
303 adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
304 adv7511_wr(sd, 0x21, B1);
305 adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
306 adv7511_wr(sd, 0x23, B2);
307 adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
308 adv7511_wr(sd, 0x25, B3);
309 adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
310 adv7511_wr(sd, 0x27, B4);
313 adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
314 adv7511_wr(sd, 0x29, C1);
315 adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
316 adv7511_wr(sd, 0x2B, C2);
317 adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
318 adv7511_wr(sd, 0x2D, C3);
319 adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
320 adv7511_wr(sd, 0x2F, C4);
323 static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable)
327 adv7511_csc_conversion_mode(sd, csc_mode);
328 adv7511_csc_coeff(sd,
331 0, 0, 4096-564, 256);
333 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
334 /* AVI infoframe: Limited range RGB (16-235) */
335 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
338 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
339 /* AVI infoframe: Full range RGB (0-255) */
340 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
344 static void adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl)
346 struct adv7511_state *state = get_adv7511_state(sd);
348 /* Only makes sense for RGB formats */
349 if (state->fmt_code != MEDIA_BUS_FMT_RGB888_1X24) {
350 /* so just keep quantization */
351 adv7511_csc_rgb_full2limit(sd, false);
356 case V4L2_DV_RGB_RANGE_AUTO:
358 if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) {
359 /* CE format, RGB limited range (16-235) */
360 adv7511_csc_rgb_full2limit(sd, true);
362 /* not CE format, RGB full range (0-255) */
363 adv7511_csc_rgb_full2limit(sd, false);
366 case V4L2_DV_RGB_RANGE_LIMITED:
367 /* RGB limited range (16-235) */
368 adv7511_csc_rgb_full2limit(sd, true);
370 case V4L2_DV_RGB_RANGE_FULL:
371 /* RGB full range (0-255) */
372 adv7511_csc_rgb_full2limit(sd, false);
377 /* ------------------------------ CTRL OPS ------------------------------ */
379 static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl)
381 struct v4l2_subdev *sd = to_sd(ctrl);
382 struct adv7511_state *state = get_adv7511_state(sd);
384 v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val);
386 if (state->hdmi_mode_ctrl == ctrl) {
387 /* Set HDMI or DVI-D */
388 adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
391 if (state->rgb_quantization_range_ctrl == ctrl) {
392 adv7511_set_rgb_quantization_mode(sd, ctrl);
395 if (state->content_type_ctrl == ctrl) {
398 state->content_type = ctrl->val;
399 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
400 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
401 adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7);
402 adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4);
409 static const struct v4l2_ctrl_ops adv7511_ctrl_ops = {
410 .s_ctrl = adv7511_s_ctrl,
413 /* ---------------------------- CORE OPS ------------------------------------------- */
415 #ifdef CONFIG_VIDEO_ADV_DEBUG
416 static void adv7511_inv_register(struct v4l2_subdev *sd)
418 struct adv7511_state *state = get_adv7511_state(sd);
420 v4l2_info(sd, "0x000-0x0ff: Main Map\n");
422 v4l2_info(sd, "0x100-0x1ff: CEC Map\n");
425 static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
427 struct adv7511_state *state = get_adv7511_state(sd);
430 switch (reg->reg >> 8) {
432 reg->val = adv7511_rd(sd, reg->reg & 0xff);
435 if (state->i2c_cec) {
436 reg->val = adv7511_cec_read(sd, reg->reg & 0xff);
441 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
442 adv7511_inv_register(sd);
448 static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
450 struct adv7511_state *state = get_adv7511_state(sd);
452 switch (reg->reg >> 8) {
454 adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff);
457 if (state->i2c_cec) {
458 adv7511_cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
463 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
464 adv7511_inv_register(sd);
471 struct adv7511_cfg_read_infoframe {
479 static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
484 /* compute checksum */
485 for (i = 0; i < size; i++)
491 static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri)
493 struct i2c_client *client = v4l2_get_subdevdata(sd);
494 struct device *dev = &client->dev;
495 union hdmi_infoframe frame;
500 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
501 v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc);
505 memcpy(buffer, cri->header, sizeof(cri->header));
509 if (len + 4 > sizeof(buffer)) {
510 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len);
514 if (cri->payload_addr >= 0x100) {
515 for (i = 0; i < len; i++)
516 buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100);
518 for (i = 0; i < len; i++)
519 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
522 buffer[3] = hdmi_infoframe_checksum(buffer, len + 4);
524 if (hdmi_infoframe_unpack(&frame, buffer, len + 4) < 0) {
525 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc);
529 hdmi_infoframe_log(KERN_INFO, dev, &frame);
532 static void adv7511_log_infoframes(struct v4l2_subdev *sd)
534 static const struct adv7511_cfg_read_infoframe cri[] = {
535 { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 },
536 { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 },
537 { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 },
541 for (i = 0; i < ARRAY_SIZE(cri); i++)
542 log_infoframe(sd, &cri[i]);
545 static int adv7511_log_status(struct v4l2_subdev *sd)
547 struct adv7511_state *state = get_adv7511_state(sd);
548 struct adv7511_state_edid *edid = &state->edid;
551 static const char * const states[] = {
557 "initializing HDCP repeater",
558 "6", "7", "8", "9", "A", "B", "C", "D", "E", "F"
560 static const char * const errors[] = {
567 "max repeater cascade exceeded",
570 "9", "A", "B", "C", "D", "E", "F"
573 v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off");
574 v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n",
575 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
576 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
577 edid->segments ? "found" : "no",
579 v4l2_info(sd, "%s output %s\n",
580 (adv7511_rd(sd, 0xaf) & 0x02) ?
582 (adv7511_rd(sd, 0xa1) & 0x3c) ?
583 "disabled" : "enabled");
584 v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n",
585 states[adv7511_rd(sd, 0xc8) & 0xf],
586 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
587 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
588 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
589 if (adv7511_rd(sd, 0xaf) & 0x02) {
591 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
592 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
593 adv7511_rd(sd, 0x02) << 8 |
594 adv7511_rd(sd, 0x03);
595 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
596 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
600 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
601 adv7511_rd(sd, 0x08) << 8 |
602 adv7511_rd(sd, 0x09);
604 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
605 adv7511_rd(sd, 0x05) << 8 |
606 adv7511_rd(sd, 0x06);
607 v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n",
608 manual_cts ? "manual" : "automatic", N, CTS);
609 v4l2_info(sd, "VIC: detected %d, sent %d\n",
610 vic_detect, vic_sent);
611 adv7511_log_infoframes(sd);
613 if (state->dv_timings.type == V4L2_DV_BT_656_1120)
614 v4l2_print_dv_timings(sd->name, "timings: ",
615 &state->dv_timings, false);
617 v4l2_info(sd, "no timings set\n");
618 v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr);
620 if (state->i2c_cec == NULL)
623 v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr);
625 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?
626 "enabled" : "disabled");
627 if (state->cec_enabled_adap) {
628 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
629 bool is_valid = state->cec_valid_addrs & (1 << i);
632 v4l2_info(sd, "CEC Logical Address: 0x%x\n",
636 v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr);
640 /* Power up/down adv7511 */
641 static int adv7511_s_power(struct v4l2_subdev *sd, int on)
643 struct adv7511_state *state = get_adv7511_state(sd);
644 const int retries = 20;
647 v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
649 state->power_on = on;
653 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
658 /* The adv7511 does not always come up immediately.
659 Retry multiple times. */
660 for (i = 0; i < retries; i++) {
661 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
662 if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
664 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
668 v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__);
669 adv7511_s_power(sd, 0);
673 v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i);
675 /* Reserved registers that must be set */
676 adv7511_wr(sd, 0x98, 0x03);
677 adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
678 adv7511_wr(sd, 0x9c, 0x30);
679 adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
680 adv7511_wr(sd, 0xa2, 0xa4);
681 adv7511_wr(sd, 0xa3, 0xa4);
682 adv7511_wr(sd, 0xe0, 0xd0);
683 adv7511_wr(sd, 0xf9, 0x00);
685 adv7511_wr(sd, 0x43, state->i2c_edid_addr);
686 adv7511_wr(sd, 0x45, state->i2c_pktmem_addr);
688 /* Set number of attempts to read the EDID */
689 adv7511_wr(sd, 0xc9, 0xf);
693 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
694 static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
696 struct adv7511_state *state = cec_get_drvdata(adap);
697 struct v4l2_subdev *sd = &state->sd;
699 if (state->i2c_cec == NULL)
702 if (!state->cec_enabled_adap && enable) {
703 /* power up cec section */
704 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x01);
705 /* legacy mode and clear all rx buffers */
706 adv7511_cec_write(sd, 0x4a, 0x00);
707 adv7511_cec_write(sd, 0x4a, 0x07);
708 adv7511_cec_write_and_or(sd, 0x11, 0xfe, 0); /* initially disable tx */
711 /* tx: arbitration lost */
712 /* tx: retry timeout */
714 if (state->enabled_irq)
715 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39);
716 } else if (state->cec_enabled_adap && !enable) {
717 if (state->enabled_irq)
718 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00);
719 /* disable address mask 1-3 */
720 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0x00);
721 /* power down cec section */
722 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x00);
723 state->cec_valid_addrs = 0;
725 state->cec_enabled_adap = enable;
729 static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
731 struct adv7511_state *state = cec_get_drvdata(adap);
732 struct v4l2_subdev *sd = &state->sd;
733 unsigned int i, free_idx = ADV7511_MAX_ADDRS;
735 if (!state->cec_enabled_adap)
736 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
738 if (addr == CEC_LOG_ADDR_INVALID) {
739 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0);
740 state->cec_valid_addrs = 0;
744 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
745 bool is_valid = state->cec_valid_addrs & (1 << i);
747 if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
749 if (is_valid && state->cec_addr[i] == addr)
752 if (i == ADV7511_MAX_ADDRS) {
754 if (i == ADV7511_MAX_ADDRS)
757 state->cec_addr[i] = addr;
758 state->cec_valid_addrs |= 1 << i;
762 /* enable address mask 0 */
763 adv7511_cec_write_and_or(sd, 0x4b, 0xef, 0x10);
764 /* set address for mask 0 */
765 adv7511_cec_write_and_or(sd, 0x4c, 0xf0, addr);
768 /* enable address mask 1 */
769 adv7511_cec_write_and_or(sd, 0x4b, 0xdf, 0x20);
770 /* set address for mask 1 */
771 adv7511_cec_write_and_or(sd, 0x4c, 0x0f, addr << 4);
774 /* enable address mask 2 */
775 adv7511_cec_write_and_or(sd, 0x4b, 0xbf, 0x40);
776 /* set address for mask 1 */
777 adv7511_cec_write_and_or(sd, 0x4d, 0xf0, addr);
783 static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
784 u32 signal_free_time, struct cec_msg *msg)
786 struct adv7511_state *state = cec_get_drvdata(adap);
787 struct v4l2_subdev *sd = &state->sd;
791 v4l2_dbg(1, debug, sd, "%s: len %d\n", __func__, len);
794 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);
799 * The number of retries is the number of attempts - 1, but retry
800 * at least once. It's not clear if a value of 0 is allowed, so
801 * let's do at least one retry.
803 adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
805 /* clear cec tx irq status */
806 adv7511_wr(sd, 0x97, 0x38);
809 for (i = 0; i < len; i++)
810 adv7511_cec_write(sd, i, msg->msg[i]);
812 /* set length (data + header) */
813 adv7511_cec_write(sd, 0x10, len);
814 /* start transmit, enable tx */
815 adv7511_cec_write(sd, 0x11, 0x01);
819 static void adv_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)
821 struct adv7511_state *state = get_adv7511_state(sd);
823 if ((adv7511_cec_read(sd, 0x11) & 0x01) == 0) {
824 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);
828 if (tx_raw_status & 0x10) {
829 v4l2_dbg(1, debug, sd,
830 "%s: tx raw: arbitration lost\n", __func__);
831 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST,
835 if (tx_raw_status & 0x08) {
840 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);
842 * We set this status bit since this hardware performs
845 status = CEC_TX_STATUS_MAX_RETRIES;
846 nack_cnt = adv7511_cec_read(sd, 0x14) & 0xf;
848 status |= CEC_TX_STATUS_NACK;
849 low_drive_cnt = adv7511_cec_read(sd, 0x14) >> 4;
851 status |= CEC_TX_STATUS_LOW_DRIVE;
852 cec_transmit_done(state->cec_adap, status,
853 0, nack_cnt, low_drive_cnt, 0);
856 if (tx_raw_status & 0x20) {
857 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);
858 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
863 static const struct cec_adap_ops adv7511_cec_adap_ops = {
864 .adap_enable = adv7511_cec_adap_enable,
865 .adap_log_addr = adv7511_cec_adap_log_addr,
866 .adap_transmit = adv7511_cec_adap_transmit,
870 /* Enable interrupts */
871 static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable)
873 struct adv7511_state *state = get_adv7511_state(sd);
874 u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT;
878 v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable");
880 if (state->enabled_irq == enable)
882 state->enabled_irq = enable;
884 /* The datasheet says that the EDID ready interrupt should be
885 disabled if there is no hotplug. */
888 else if (adv7511_have_hotplug(sd))
889 irqs |= MASK_ADV7511_EDID_RDY_INT;
892 * This i2c write can fail (approx. 1 in 1000 writes). But it
893 * is essential that this register is correct, so retry it
896 * Note that the i2c write does not report an error, but the readback
897 * clearly shows the wrong value.
900 adv7511_wr(sd, 0x94, irqs);
901 irqs_rd = adv7511_rd(sd, 0x94);
902 } while (retries-- && irqs_rd != irqs);
905 v4l2_err(sd, "Could not set interrupts: hw failure?\n");
907 adv7511_wr_and_or(sd, 0x95, 0xc0,
908 (state->cec_enabled_adap && enable) ? 0x39 : 0x00);
911 /* Interrupt handler */
912 static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
917 /* disable interrupts to prevent a race condition */
918 adv7511_set_isr(sd, false);
919 irq_status = adv7511_rd(sd, 0x96);
920 cec_irq = adv7511_rd(sd, 0x97);
921 /* clear detected interrupts */
922 adv7511_wr(sd, 0x96, irq_status);
923 adv7511_wr(sd, 0x97, cec_irq);
925 v4l2_dbg(1, debug, sd, "%s: irq 0x%x, cec-irq 0x%x\n", __func__,
926 irq_status, cec_irq);
928 if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT))
929 adv7511_check_monitor_present_status(sd);
930 if (irq_status & MASK_ADV7511_EDID_RDY_INT)
931 adv7511_check_edid_status(sd);
933 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
935 adv_cec_tx_raw_status(sd, cec_irq);
938 struct adv7511_state *state = get_adv7511_state(sd);
941 msg.len = adv7511_cec_read(sd, 0x25) & 0x1f;
943 v4l2_dbg(1, debug, sd, "%s: cec msg len %d\n", __func__,
946 if (msg.len > CEC_MAX_MSG_SIZE)
947 msg.len = CEC_MAX_MSG_SIZE;
952 for (i = 0; i < msg.len; i++)
953 msg.msg[i] = adv7511_cec_read(sd, i + 0x15);
955 adv7511_cec_write(sd, 0x4a, 0); /* toggle to re-enable rx 1 */
956 adv7511_cec_write(sd, 0x4a, 1);
957 cec_received_msg(state->cec_adap, &msg);
962 /* enable interrupts */
963 adv7511_set_isr(sd, true);
970 static const struct v4l2_subdev_core_ops adv7511_core_ops = {
971 .log_status = adv7511_log_status,
972 #ifdef CONFIG_VIDEO_ADV_DEBUG
973 .g_register = adv7511_g_register,
974 .s_register = adv7511_s_register,
976 .s_power = adv7511_s_power,
977 .interrupt_service_routine = adv7511_isr,
980 /* ------------------------------ VIDEO OPS ------------------------------ */
982 /* Enable/disable adv7511 output */
983 static int adv7511_s_stream(struct v4l2_subdev *sd, int enable)
985 struct adv7511_state *state = get_adv7511_state(sd);
987 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
988 adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
990 adv7511_check_monitor_present_status(sd);
992 adv7511_s_power(sd, 0);
993 state->have_monitor = false;
998 static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
999 struct v4l2_dv_timings *timings)
1001 struct adv7511_state *state = get_adv7511_state(sd);
1002 struct v4l2_bt_timings *bt = &timings->bt;
1005 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1007 /* quick sanity check */
1008 if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL))
1011 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1012 if the format is one of the CEA or DMT timings. */
1013 v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
1016 state->dv_timings = *timings;
1018 /* set h/vsync polarities */
1019 adv7511_wr_and_or(sd, 0x17, 0x9f,
1020 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
1021 ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
1023 fps = (u32)bt->pixelclock / (V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt));
1026 adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1);
1029 adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1);
1032 adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1);
1035 adv7511_wr_and_or(sd, 0xfb, 0xf9, 0);
1039 /* update quantization range based on new dv_timings */
1040 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1045 static int adv7511_g_dv_timings(struct v4l2_subdev *sd,
1046 struct v4l2_dv_timings *timings)
1048 struct adv7511_state *state = get_adv7511_state(sd);
1050 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1055 *timings = state->dv_timings;
1060 static int adv7511_enum_dv_timings(struct v4l2_subdev *sd,
1061 struct v4l2_enum_dv_timings *timings)
1063 if (timings->pad != 0)
1066 return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL);
1069 static int adv7511_dv_timings_cap(struct v4l2_subdev *sd,
1070 struct v4l2_dv_timings_cap *cap)
1075 *cap = adv7511_timings_cap;
1079 static const struct v4l2_subdev_video_ops adv7511_video_ops = {
1080 .s_stream = adv7511_s_stream,
1081 .s_dv_timings = adv7511_s_dv_timings,
1082 .g_dv_timings = adv7511_g_dv_timings,
1085 /* ------------------------------ AUDIO OPS ------------------------------ */
1086 static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable)
1088 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1091 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
1093 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
1098 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1103 case 32000: N = 4096; break;
1104 case 44100: N = 6272; break;
1105 case 48000: N = 6144; break;
1106 case 88200: N = 12544; break;
1107 case 96000: N = 12288; break;
1108 case 176400: N = 25088; break;
1109 case 192000: N = 24576; break;
1114 /* Set N (used with CTS to regenerate the audio clock) */
1115 adv7511_wr(sd, 0x01, (N >> 16) & 0xf);
1116 adv7511_wr(sd, 0x02, (N >> 8) & 0xff);
1117 adv7511_wr(sd, 0x03, N & 0xff);
1122 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1127 case 32000: i2s_sf = 0x30; break;
1128 case 44100: i2s_sf = 0x00; break;
1129 case 48000: i2s_sf = 0x20; break;
1130 case 88200: i2s_sf = 0x80; break;
1131 case 96000: i2s_sf = 0xa0; break;
1132 case 176400: i2s_sf = 0xc0; break;
1133 case 192000: i2s_sf = 0xe0; break;
1138 /* Set sampling frequency for I2S audio to 48 kHz */
1139 adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
1144 static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config)
1146 /* Only 2 channels in use for application */
1147 adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
1148 /* Speaker mapping */
1149 adv7511_wr(sd, 0x76, 0x00);
1151 /* 16 bit audio word length */
1152 adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
1157 static const struct v4l2_subdev_audio_ops adv7511_audio_ops = {
1158 .s_stream = adv7511_s_audio_stream,
1159 .s_clock_freq = adv7511_s_clock_freq,
1160 .s_i2s_clock_freq = adv7511_s_i2s_clock_freq,
1161 .s_routing = adv7511_s_routing,
1164 /* ---------------------------- PAD OPS ------------------------------------- */
1166 static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
1168 struct adv7511_state *state = get_adv7511_state(sd);
1170 memset(edid->reserved, 0, sizeof(edid->reserved));
1175 if (edid->start_block == 0 && edid->blocks == 0) {
1176 edid->blocks = state->edid.blocks;
1180 if (state->edid.blocks == 0)
1183 if (edid->start_block >= state->edid.blocks)
1186 if (edid->start_block + edid->blocks > state->edid.blocks)
1187 edid->blocks = state->edid.blocks - edid->start_block;
1189 memcpy(edid->edid, &state->edid.data[edid->start_block * 128],
1190 128 * edid->blocks);
1195 static int adv7511_enum_mbus_code(struct v4l2_subdev *sd,
1196 struct v4l2_subdev_state *sd_state,
1197 struct v4l2_subdev_mbus_code_enum *code)
1202 switch (code->index) {
1204 code->code = MEDIA_BUS_FMT_RGB888_1X24;
1207 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
1210 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
1218 static void adv7511_fill_format(struct adv7511_state *state,
1219 struct v4l2_mbus_framefmt *format)
1221 format->width = state->dv_timings.bt.width;
1222 format->height = state->dv_timings.bt.height;
1223 format->field = V4L2_FIELD_NONE;
1226 static int adv7511_get_fmt(struct v4l2_subdev *sd,
1227 struct v4l2_subdev_state *sd_state,
1228 struct v4l2_subdev_format *format)
1230 struct adv7511_state *state = get_adv7511_state(sd);
1232 if (format->pad != 0)
1235 memset(&format->format, 0, sizeof(format->format));
1236 adv7511_fill_format(state, &format->format);
1238 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1239 struct v4l2_mbus_framefmt *fmt;
1241 fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad);
1242 format->format.code = fmt->code;
1243 format->format.colorspace = fmt->colorspace;
1244 format->format.ycbcr_enc = fmt->ycbcr_enc;
1245 format->format.quantization = fmt->quantization;
1246 format->format.xfer_func = fmt->xfer_func;
1248 format->format.code = state->fmt_code;
1249 format->format.colorspace = state->colorspace;
1250 format->format.ycbcr_enc = state->ycbcr_enc;
1251 format->format.quantization = state->quantization;
1252 format->format.xfer_func = state->xfer_func;
1258 static int adv7511_set_fmt(struct v4l2_subdev *sd,
1259 struct v4l2_subdev_state *sd_state,
1260 struct v4l2_subdev_format *format)
1262 struct adv7511_state *state = get_adv7511_state(sd);
1264 * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary
1265 * Video Information (AVI) InfoFrame Format"
1268 * ec = Extended Colorimetry
1270 * q = RGB Quantization Range
1271 * yq = YCC Quantization Range
1273 u8 c = HDMI_COLORIMETRY_NONE;
1274 u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1275 u8 y = HDMI_COLORSPACE_RGB;
1276 u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT;
1277 u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1278 u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
1279 u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
1281 if (format->pad != 0)
1283 switch (format->format.code) {
1284 case MEDIA_BUS_FMT_UYVY8_1X16:
1285 case MEDIA_BUS_FMT_YUYV8_1X16:
1286 case MEDIA_BUS_FMT_RGB888_1X24:
1292 adv7511_fill_format(state, &format->format);
1293 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1294 struct v4l2_mbus_framefmt *fmt;
1296 fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad);
1297 fmt->code = format->format.code;
1298 fmt->colorspace = format->format.colorspace;
1299 fmt->ycbcr_enc = format->format.ycbcr_enc;
1300 fmt->quantization = format->format.quantization;
1301 fmt->xfer_func = format->format.xfer_func;
1305 switch (format->format.code) {
1306 case MEDIA_BUS_FMT_UYVY8_1X16:
1307 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1308 adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8);
1309 y = HDMI_COLORSPACE_YUV422;
1311 case MEDIA_BUS_FMT_YUYV8_1X16:
1312 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1313 adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc);
1314 y = HDMI_COLORSPACE_YUV422;
1316 case MEDIA_BUS_FMT_RGB888_1X24:
1318 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00);
1319 adv7511_wr_and_or(sd, 0x16, 0x03, 0x00);
1322 state->fmt_code = format->format.code;
1323 state->colorspace = format->format.colorspace;
1324 state->ycbcr_enc = format->format.ycbcr_enc;
1325 state->quantization = format->format.quantization;
1326 state->xfer_func = format->format.xfer_func;
1328 switch (format->format.colorspace) {
1329 case V4L2_COLORSPACE_OPRGB:
1330 c = HDMI_COLORIMETRY_EXTENDED;
1331 ec = y ? HDMI_EXTENDED_COLORIMETRY_OPYCC_601 :
1332 HDMI_EXTENDED_COLORIMETRY_OPRGB;
1334 case V4L2_COLORSPACE_SMPTE170M:
1335 c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE;
1336 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) {
1337 c = HDMI_COLORIMETRY_EXTENDED;
1338 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1341 case V4L2_COLORSPACE_REC709:
1342 c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE;
1343 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) {
1344 c = HDMI_COLORIMETRY_EXTENDED;
1345 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
1348 case V4L2_COLORSPACE_SRGB:
1349 c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE;
1350 ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 :
1351 HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1353 case V4L2_COLORSPACE_BT2020:
1354 c = HDMI_COLORIMETRY_EXTENDED;
1355 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM)
1356 ec = 5; /* Not yet available in hdmi.h */
1358 ec = 6; /* Not yet available in hdmi.h */
1365 * CEA-861-F says that for RGB formats the YCC range must match the
1366 * RGB range, although sources should ignore the YCC range.
1368 * The RGB quantization range shouldn't be non-zero if the EDID doesn't
1369 * have the Q bit set in the Video Capabilities Data Block, however this
1370 * isn't checked at the moment. The assumption is that the application
1371 * knows the EDID and can detect this.
1373 * The same is true for the YCC quantization range: non-standard YCC
1374 * quantization ranges should only be sent if the EDID has the YQ bit
1375 * set in the Video Capabilities Data Block.
1377 switch (format->format.quantization) {
1378 case V4L2_QUANTIZATION_FULL_RANGE:
1379 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1380 HDMI_QUANTIZATION_RANGE_FULL;
1381 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL;
1383 case V4L2_QUANTIZATION_LIM_RANGE:
1384 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1385 HDMI_QUANTIZATION_RANGE_LIMITED;
1386 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1390 adv7511_wr_and_or(sd, 0x4a, 0xbf, 0);
1391 adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5);
1392 adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6);
1393 adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7));
1394 adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4));
1395 adv7511_wr_and_or(sd, 0x4a, 0xff, 1);
1396 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1401 static const struct v4l2_subdev_pad_ops adv7511_pad_ops = {
1402 .get_edid = adv7511_get_edid,
1403 .enum_mbus_code = adv7511_enum_mbus_code,
1404 .get_fmt = adv7511_get_fmt,
1405 .set_fmt = adv7511_set_fmt,
1406 .enum_dv_timings = adv7511_enum_dv_timings,
1407 .dv_timings_cap = adv7511_dv_timings_cap,
1410 /* --------------------- SUBDEV OPS --------------------------------------- */
1412 static const struct v4l2_subdev_ops adv7511_ops = {
1413 .core = &adv7511_core_ops,
1414 .pad = &adv7511_pad_ops,
1415 .video = &adv7511_video_ops,
1416 .audio = &adv7511_audio_ops,
1419 /* ----------------------------------------------------------------------- */
1420 static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf)
1424 v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment);
1425 for (i = 0; i < 256; i += 16) {
1429 v4l2_dbg(lvl, debug, sd, "\n");
1430 for (j = i; j < i + 16; j++) {
1431 sprintf(bp, "0x%02x, ", buf[j]);
1435 v4l2_dbg(lvl, debug, sd, "%s\n", b);
1440 static void adv7511_notify_no_edid(struct v4l2_subdev *sd)
1442 struct adv7511_state *state = get_adv7511_state(sd);
1443 struct adv7511_edid_detect ed;
1445 /* We failed to read the EDID, so send an event for this. */
1447 ed.segment = adv7511_rd(sd, 0xc4);
1448 ed.phys_addr = CEC_PHYS_ADDR_INVALID;
1449 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1450 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1451 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x0);
1454 static void adv7511_edid_handler(struct work_struct *work)
1456 struct delayed_work *dwork = to_delayed_work(work);
1457 struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler);
1458 struct v4l2_subdev *sd = &state->sd;
1460 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1462 if (adv7511_check_edid_status(sd)) {
1463 /* Return if we received the EDID. */
1467 if (adv7511_have_hotplug(sd)) {
1468 /* We must retry reading the EDID several times, it is possible
1469 * that initially the EDID couldn't be read due to i2c errors
1470 * (DVI connectors are particularly prone to this problem). */
1471 if (state->edid.read_retries) {
1472 state->edid.read_retries--;
1473 v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
1474 state->have_monitor = false;
1475 adv7511_s_power(sd, false);
1476 adv7511_s_power(sd, true);
1477 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1482 /* We failed to read the EDID, so send an event for this. */
1483 adv7511_notify_no_edid(sd);
1484 v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__);
1487 static void adv7511_audio_setup(struct v4l2_subdev *sd)
1489 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1491 adv7511_s_i2s_clock_freq(sd, 48000);
1492 adv7511_s_clock_freq(sd, 48000);
1493 adv7511_s_routing(sd, 0, 0, 0);
1496 /* Configure hdmi transmitter. */
1497 static void adv7511_setup(struct v4l2_subdev *sd)
1499 struct adv7511_state *state = get_adv7511_state(sd);
1500 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1502 /* Input format: RGB 4:4:4 */
1503 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
1504 /* Output format: RGB 4:4:4 */
1505 adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
1506 /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */
1507 adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
1508 /* Disable pixel repetition */
1509 adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
1511 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
1512 /* Output format: RGB 4:4:4, Active Format Information is valid,
1514 adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
1515 /* AVI Info frame packet enable, Audio Info frame disable */
1516 adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
1517 /* Colorimetry, Active format aspect ratio: same as picure. */
1518 adv7511_wr(sd, 0x56, 0xa8);
1520 adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
1522 /* Positive clk edge capture for input video clock */
1523 adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
1525 adv7511_audio_setup(sd);
1527 v4l2_ctrl_handler_setup(&state->hdl);
1530 static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd)
1532 struct adv7511_monitor_detect mdt;
1533 struct adv7511_state *state = get_adv7511_state(sd);
1535 mdt.present = state->have_monitor;
1536 v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt);
1539 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
1541 struct adv7511_state *state = get_adv7511_state(sd);
1542 /* read hotplug and rx-sense state */
1543 u8 status = adv7511_rd(sd, 0x42);
1545 v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n",
1548 status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "",
1549 status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : "");
1551 /* update read only ctrls */
1552 v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0);
1553 v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0);
1555 if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) {
1556 v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__);
1557 if (!state->have_monitor) {
1558 v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__);
1559 state->have_monitor = true;
1560 adv7511_set_isr(sd, true);
1561 if (!adv7511_s_power(sd, true)) {
1562 v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__);
1566 adv7511_notify_monitor_detect(sd);
1567 state->edid.read_retries = EDID_MAX_RETRIES;
1568 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1570 } else if (status & MASK_ADV7511_HPD_DETECT) {
1571 v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__);
1572 state->edid.read_retries = EDID_MAX_RETRIES;
1573 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1574 } else if (!(status & MASK_ADV7511_HPD_DETECT)) {
1575 v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__);
1576 if (state->have_monitor) {
1577 v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__);
1578 state->have_monitor = false;
1579 adv7511_notify_monitor_detect(sd);
1581 adv7511_s_power(sd, false);
1582 memset(&state->edid, 0, sizeof(struct adv7511_state_edid));
1583 adv7511_notify_no_edid(sd);
1587 static bool edid_block_verify_crc(u8 *edid_block)
1592 for (i = 0; i < 128; i++)
1593 sum += edid_block[i];
1597 static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment)
1599 struct adv7511_state *state = get_adv7511_state(sd);
1600 u32 blocks = state->edid.blocks;
1601 u8 *data = state->edid.data;
1603 if (!edid_block_verify_crc(&data[segment * 256]))
1605 if ((segment + 1) * 2 <= blocks)
1606 return edid_block_verify_crc(&data[segment * 256 + 128]);
1610 static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment)
1612 static const u8 hdmi_header[] = {
1613 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1615 struct adv7511_state *state = get_adv7511_state(sd);
1616 u8 *data = state->edid.data;
1620 return !memcmp(data, hdmi_header, sizeof(hdmi_header));
1623 static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
1625 struct adv7511_state *state = get_adv7511_state(sd);
1626 u8 edidRdy = adv7511_rd(sd, 0xc5);
1628 v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n",
1629 __func__, EDID_MAX_RETRIES - state->edid.read_retries);
1631 if (state->edid.complete)
1634 if (edidRdy & MASK_ADV7511_EDID_RDY) {
1635 int segment = adv7511_rd(sd, 0xc4);
1636 struct adv7511_edid_detect ed;
1639 if (segment >= EDID_MAX_SEGM) {
1640 v4l2_err(sd, "edid segment number too big\n");
1643 v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
1644 err = adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]);
1646 adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]);
1648 state->edid.blocks = state->edid.data[0x7e] + 1;
1649 v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n",
1650 __func__, state->edid.blocks);
1654 if (err || !edid_verify_crc(sd, segment) || !edid_verify_header(sd, segment)) {
1655 /* Couldn't read EDID or EDID is invalid. Force retry! */
1657 v4l2_err(sd, "%s: edid crc or header error\n", __func__);
1658 state->have_monitor = false;
1659 adv7511_s_power(sd, false);
1660 adv7511_s_power(sd, true);
1663 /* one more segment read ok */
1664 state->edid.segments = segment + 1;
1665 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x1);
1666 if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) {
1667 /* Request next EDID segment */
1668 v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments);
1669 adv7511_wr(sd, 0xc9, 0xf);
1670 adv7511_wr(sd, 0xc4, state->edid.segments);
1671 state->edid.read_retries = EDID_MAX_RETRIES;
1672 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1676 v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments);
1677 state->edid.complete = true;
1678 ed.phys_addr = cec_get_edid_phys_addr(state->edid.data,
1679 state->edid.segments * 256,
1681 /* report when we have all segments
1682 but report only for segment 0
1686 state->edid_detect_counter++;
1687 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1688 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1695 static int adv7511_registered(struct v4l2_subdev *sd)
1697 struct adv7511_state *state = get_adv7511_state(sd);
1698 struct i2c_client *client = v4l2_get_subdevdata(sd);
1701 err = cec_register_adapter(state->cec_adap, &client->dev);
1703 cec_delete_adapter(state->cec_adap);
1707 static void adv7511_unregistered(struct v4l2_subdev *sd)
1709 struct adv7511_state *state = get_adv7511_state(sd);
1711 cec_unregister_adapter(state->cec_adap);
1714 static const struct v4l2_subdev_internal_ops adv7511_int_ops = {
1715 .registered = adv7511_registered,
1716 .unregistered = adv7511_unregistered,
1719 /* ----------------------------------------------------------------------- */
1721 static void adv7511_init_setup(struct v4l2_subdev *sd)
1723 struct adv7511_state *state = get_adv7511_state(sd);
1724 struct adv7511_state_edid *edid = &state->edid;
1725 u32 cec_clk = state->pdata.cec_clk;
1728 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1730 /* clear all interrupts */
1731 adv7511_wr(sd, 0x96, 0xff);
1732 adv7511_wr(sd, 0x97, 0xff);
1734 * Stop HPD from resetting a lot of registers.
1735 * It might leave the chip in a partly un-initialized state,
1736 * in particular with regards to hotplug bounces.
1738 adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
1739 memset(edid, 0, sizeof(struct adv7511_state_edid));
1740 state->have_monitor = false;
1741 adv7511_set_isr(sd, false);
1742 adv7511_s_stream(sd, false);
1743 adv7511_s_audio_stream(sd, false);
1745 if (state->i2c_cec == NULL)
1748 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1750 /* cec soft reset */
1751 adv7511_cec_write(sd, 0x50, 0x01);
1752 adv7511_cec_write(sd, 0x50, 0x00);
1755 adv7511_cec_write(sd, 0x4a, 0x00);
1756 adv7511_cec_write(sd, 0x4a, 0x07);
1758 if (cec_clk % 750000 != 0)
1759 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1762 ratio = (cec_clk / 750000) - 1;
1763 adv7511_cec_write(sd, 0x4e, ratio << 2);
1766 static int adv7511_probe(struct i2c_client *client)
1768 struct adv7511_state *state;
1769 struct adv7511_platform_data *pdata = client->dev.platform_data;
1770 struct v4l2_ctrl_handler *hdl;
1771 struct v4l2_subdev *sd;
1775 /* Check if the adapter supports the needed features */
1776 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1779 state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL);
1785 v4l_err(client, "No platform data!\n");
1788 memcpy(&state->pdata, pdata, sizeof(state->pdata));
1789 state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24;
1790 state->colorspace = V4L2_COLORSPACE_SRGB;
1794 v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n",
1797 v4l2_i2c_subdev_init(sd, client, &adv7511_ops);
1798 sd->internal_ops = &adv7511_int_ops;
1801 v4l2_ctrl_handler_init(hdl, 10);
1802 /* add in ascending ID order */
1803 state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1804 V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
1805 0, V4L2_DV_TX_MODE_DVI_D);
1806 state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1807 V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
1808 state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1809 V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
1810 state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1811 V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
1812 state->rgb_quantization_range_ctrl =
1813 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1814 V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1815 0, V4L2_DV_RGB_RANGE_AUTO);
1816 state->content_type_ctrl =
1817 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1818 V4L2_CID_DV_TX_IT_CONTENT_TYPE, V4L2_DV_IT_CONTENT_TYPE_NO_ITC,
1819 0, V4L2_DV_IT_CONTENT_TYPE_NO_ITC);
1820 sd->ctrl_handler = hdl;
1825 state->pad.flags = MEDIA_PAD_FL_SINK;
1826 sd->entity.function = MEDIA_ENT_F_DV_ENCODER;
1827 err = media_entity_pads_init(&sd->entity, 1, &state->pad);
1831 /* EDID and CEC i2c addr */
1832 state->i2c_edid_addr = state->pdata.i2c_edid << 1;
1833 state->i2c_cec_addr = state->pdata.i2c_cec << 1;
1834 state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1;
1836 state->chip_revision = adv7511_rd(sd, 0x0);
1837 chip_id[0] = adv7511_rd(sd, 0xf5);
1838 chip_id[1] = adv7511_rd(sd, 0xf6);
1839 if (chip_id[0] != 0x75 || chip_id[1] != 0x11) {
1840 v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0],
1846 state->i2c_edid = i2c_new_dummy_device(client->adapter,
1847 state->i2c_edid_addr >> 1);
1848 if (IS_ERR(state->i2c_edid)) {
1849 v4l2_err(sd, "failed to register edid i2c client\n");
1850 err = PTR_ERR(state->i2c_edid);
1854 adv7511_wr(sd, 0xe1, state->i2c_cec_addr);
1855 if (state->pdata.cec_clk < 3000000 ||
1856 state->pdata.cec_clk > 100000000) {
1857 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1858 __func__, state->pdata.cec_clk);
1859 state->pdata.cec_clk = 0;
1862 if (state->pdata.cec_clk) {
1863 state->i2c_cec = i2c_new_dummy_device(client->adapter,
1864 state->i2c_cec_addr >> 1);
1865 if (IS_ERR(state->i2c_cec)) {
1866 v4l2_err(sd, "failed to register cec i2c client\n");
1867 err = PTR_ERR(state->i2c_cec);
1868 goto err_unreg_edid;
1870 adv7511_wr(sd, 0xe2, 0x00); /* power up cec section */
1872 adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */
1875 state->i2c_pktmem = i2c_new_dummy_device(client->adapter, state->i2c_pktmem_addr >> 1);
1876 if (IS_ERR(state->i2c_pktmem)) {
1877 v4l2_err(sd, "failed to register pktmem i2c client\n");
1878 err = PTR_ERR(state->i2c_pktmem);
1882 state->work_queue = create_singlethread_workqueue(sd->name);
1883 if (state->work_queue == NULL) {
1884 v4l2_err(sd, "could not create workqueue\n");
1886 goto err_unreg_pktmem;
1889 INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler);
1891 adv7511_init_setup(sd);
1893 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
1894 state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
1895 state, dev_name(&client->dev), CEC_CAP_DEFAULTS,
1897 err = PTR_ERR_OR_ZERO(state->cec_adap);
1899 destroy_workqueue(state->work_queue);
1900 goto err_unreg_pktmem;
1904 adv7511_set_isr(sd, true);
1905 adv7511_check_monitor_present_status(sd);
1907 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1908 client->addr << 1, client->adapter->name);
1912 i2c_unregister_device(state->i2c_pktmem);
1914 i2c_unregister_device(state->i2c_cec);
1916 i2c_unregister_device(state->i2c_edid);
1918 media_entity_cleanup(&sd->entity);
1920 v4l2_ctrl_handler_free(&state->hdl);
1924 /* ----------------------------------------------------------------------- */
1926 static void adv7511_remove(struct i2c_client *client)
1928 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1929 struct adv7511_state *state = get_adv7511_state(sd);
1931 state->chip_revision = -1;
1933 v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
1934 client->addr << 1, client->adapter->name);
1936 adv7511_set_isr(sd, false);
1937 adv7511_init_setup(sd);
1938 cancel_delayed_work_sync(&state->edid_handler);
1939 i2c_unregister_device(state->i2c_edid);
1940 i2c_unregister_device(state->i2c_cec);
1941 i2c_unregister_device(state->i2c_pktmem);
1942 destroy_workqueue(state->work_queue);
1943 v4l2_device_unregister_subdev(sd);
1944 media_entity_cleanup(&sd->entity);
1945 v4l2_ctrl_handler_free(sd->ctrl_handler);
1948 /* ----------------------------------------------------------------------- */
1950 static const struct i2c_device_id adv7511_id[] = {
1951 { "adv7511-v4l2", 0 },
1954 MODULE_DEVICE_TABLE(i2c, adv7511_id);
1956 static struct i2c_driver adv7511_driver = {
1958 .name = "adv7511-v4l2",
1960 .probe = adv7511_probe,
1961 .remove = adv7511_remove,
1962 .id_table = adv7511_id,
1965 module_i2c_driver(adv7511_driver);