1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
4 // Copyright (C) 2012 Google, Inc
6 #include <linux/delay.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
10 #include <linux/platform_data/cros_ec_commands.h>
11 #include <linux/platform_data/cros_ec_proto.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/spi/spi.h>
15 #include <uapi/linux/sched/types.h>
19 /* The header byte, which follows the preamble */
20 #define EC_MSG_HEADER 0xec
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
26 * we could increase this so that might expect the preamble and
27 * message to occur in a single transaction. However, the maximum
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
29 * time of perhaps <320us (200 bytes / 1600 bits).
31 #define EC_MSG_PREAMBLE_COUNT 32
34 * Allow for a long time for the EC to respond. We support i2c
35 * tunneling and support fairly long messages for the tunnel (249
36 * bytes long at the moment). If we're talking to a 100 kHz device
37 * on the other end and need to transfer ~256 bytes, then we need:
38 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
40 * We'll wait 8 times that to handle clock stretching and other
41 * paranoia. Note that some battery gas gauge ICs claim to have a
42 * clock stretch of 144ms in rare situations. That's incentive for
43 * not directly passing i2c through, but it's too late for that for
46 * It's pretty unlikely that we'll really see a 249 byte tunnel in
47 * anything other than testing. If this was more common we might
48 * consider having slow commands like this require a GET_STATUS
49 * wait loop. The 'flash write' command would be another candidate
50 * for this, clocking in at 2-3ms.
52 #define EC_MSG_DEADLINE_MS 200
55 * Time between raising the SPI chip select (for the end of a
56 * transaction) and dropping it again (for the next transaction).
57 * If we go too fast, the EC will miss the transaction. We know that we
58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
61 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
64 * struct cros_ec_spi - information about a SPI-connected EC
66 * @spi: SPI device we are connected to
67 * @last_transfer_ns: time that we last finished a transfer.
68 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69 * is sent when we want to turn on CS at the start of a transaction.
70 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
71 * is sent when we want to turn off CS at the end of a transaction.
72 * @high_pri_worker: Used to schedule high priority work.
75 struct spi_device *spi;
77 unsigned int start_of_msg_delay;
78 unsigned int end_of_msg_delay;
79 struct kthread_worker *high_pri_worker;
82 typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev,
83 struct cros_ec_command *ec_msg);
86 * struct cros_ec_xfer_work_params - params for our high priority workers
88 * @work: The work_struct needed to queue work
89 * @fn: The function to use to transfer
90 * @ec_dev: ChromeOS EC device
91 * @ec_msg: Message to transfer
92 * @ret: The return value of the function
95 struct cros_ec_xfer_work_params {
96 struct kthread_work work;
98 struct cros_ec_device *ec_dev;
99 struct cros_ec_command *ec_msg;
103 static void debug_packet(struct device *dev, const char *name, u8 *ptr,
109 dev_dbg(dev, "%s: ", name);
110 for (i = 0; i < len; i++)
111 pr_cont(" %02x", ptr[i]);
117 static int terminate_request(struct cros_ec_device *ec_dev)
119 struct cros_ec_spi *ec_spi = ec_dev->priv;
120 struct spi_message msg;
121 struct spi_transfer trans;
125 * Turn off CS, possibly adding a delay to ensure the rising edge
126 * doesn't come too soon after the end of the data.
128 spi_message_init(&msg);
129 memset(&trans, 0, sizeof(trans));
130 trans.delay.value = ec_spi->end_of_msg_delay;
131 trans.delay.unit = SPI_DELAY_UNIT_USECS;
132 spi_message_add_tail(&trans, &msg);
134 ret = spi_sync_locked(ec_spi->spi, &msg);
136 /* Reset end-of-response timer */
137 ec_spi->last_transfer_ns = ktime_get_ns();
140 "cs-deassert spi transfer failed: %d\n",
148 * receive_n_bytes - receive n bytes from the EC.
150 * Assumes buf is a pointer into the ec_dev->din buffer
152 * @ec_dev: ChromeOS EC device.
153 * @buf: Pointer to the buffer receiving the data.
154 * @n: Number of bytes received.
156 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
158 struct cros_ec_spi *ec_spi = ec_dev->priv;
159 struct spi_transfer trans;
160 struct spi_message msg;
163 if (buf - ec_dev->din + n > ec_dev->din_size)
166 memset(&trans, 0, sizeof(trans));
171 spi_message_init(&msg);
172 spi_message_add_tail(&trans, &msg);
173 ret = spi_sync_locked(ec_spi->spi, &msg);
175 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
181 * cros_ec_spi_receive_packet - Receive a packet from the EC.
183 * This function has two phases: reading the preamble bytes (since if we read
184 * data from the EC before it is ready to send, we just get preamble) and
185 * reading the actual message.
187 * The received data is placed into ec_dev->din.
189 * @ec_dev: ChromeOS EC device
190 * @need_len: Number of message bytes we need to read
192 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
195 struct ec_host_response *response;
198 unsigned long deadline;
201 if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT)
204 /* Receive data until we see the header byte */
205 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
207 unsigned long start_jiffies = jiffies;
209 ret = receive_n_bytes(ec_dev,
211 EC_MSG_PREAMBLE_COUNT);
216 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
217 if (*ptr == EC_SPI_FRAME_START) {
218 dev_dbg(ec_dev->dev, "msg found at %zd\n",
227 * Use the time at the start of the loop as a timeout. This
228 * gives us one last shot at getting the transfer and is useful
229 * in case we got context switched out for a while.
231 if (time_after(start_jiffies, deadline)) {
232 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
238 * ptr now points to the header byte. Copy any valid data to the
239 * start of our buffer
242 todo = min(todo, need_len);
243 memmove(ec_dev->din, ptr, todo);
244 ptr = ec_dev->din + todo;
245 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
249 /* If the entire response struct wasn't read, get the rest of it. */
250 if (todo < sizeof(*response)) {
251 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
254 ptr += (sizeof(*response) - todo);
255 todo = sizeof(*response);
258 response = (struct ec_host_response *)ec_dev->din;
260 /* Abort if data_len is too large. */
261 if (response->data_len > ec_dev->din_size)
264 /* Receive data until we have it all */
265 while (need_len > 0) {
267 * We can't support transfers larger than the SPI FIFO size
268 * unless we have DMA. We don't have DMA on the ISP SPI ports
269 * for Exynos. We need a way of asking SPI driver for
270 * maximum-supported transfer size.
272 todo = min(need_len, 256);
273 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
274 todo, need_len, ptr - ec_dev->din);
276 ret = receive_n_bytes(ec_dev, ptr, todo);
284 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
290 * cros_ec_spi_receive_response - Receive a response from the EC.
292 * This function has two phases: reading the preamble bytes (since if we read
293 * data from the EC before it is ready to send, we just get preamble) and
294 * reading the actual message.
296 * The received data is placed into ec_dev->din.
298 * @ec_dev: ChromeOS EC device
299 * @need_len: Number of message bytes we need to read
301 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
306 unsigned long deadline;
309 if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT)
312 /* Receive data until we see the header byte */
313 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
315 unsigned long start_jiffies = jiffies;
317 ret = receive_n_bytes(ec_dev,
319 EC_MSG_PREAMBLE_COUNT);
324 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
325 if (*ptr == EC_SPI_FRAME_START) {
326 dev_dbg(ec_dev->dev, "msg found at %zd\n",
335 * Use the time at the start of the loop as a timeout. This
336 * gives us one last shot at getting the transfer and is useful
337 * in case we got context switched out for a while.
339 if (time_after(start_jiffies, deadline)) {
340 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
346 * ptr now points to the header byte. Copy any valid data to the
347 * start of our buffer
350 todo = min(todo, need_len);
351 memmove(ec_dev->din, ptr, todo);
352 ptr = ec_dev->din + todo;
353 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
357 /* Receive data until we have it all */
358 while (need_len > 0) {
360 * We can't support transfers larger than the SPI FIFO size
361 * unless we have DMA. We don't have DMA on the ISP SPI ports
362 * for Exynos. We need a way of asking SPI driver for
363 * maximum-supported transfer size.
365 todo = min(need_len, 256);
366 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
367 todo, need_len, ptr - ec_dev->din);
369 ret = receive_n_bytes(ec_dev, ptr, todo);
373 debug_packet(ec_dev->dev, "interim", ptr, todo);
378 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
384 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
386 * @ec_dev: ChromeOS EC device
387 * @ec_msg: Message to transfer
389 static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
390 struct cros_ec_command *ec_msg)
392 struct ec_host_response *response;
393 struct cros_ec_spi *ec_spi = ec_dev->priv;
394 struct spi_transfer trans, trans_delay;
395 struct spi_message msg;
401 int ret = 0, final_ret;
404 len = cros_ec_prepare_tx(ec_dev, ec_msg);
407 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
409 /* If it's too soon to do another transaction, wait */
410 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
411 if (delay < EC_SPI_RECOVERY_TIME_NS)
412 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
414 rx_buf = kzalloc(len, GFP_KERNEL);
418 spi_bus_lock(ec_spi->spi->master);
421 * Leave a gap between CS assertion and clocking of data to allow the
424 spi_message_init(&msg);
425 if (ec_spi->start_of_msg_delay) {
426 memset(&trans_delay, 0, sizeof(trans_delay));
427 trans_delay.delay.value = ec_spi->start_of_msg_delay;
428 trans_delay.delay.unit = SPI_DELAY_UNIT_USECS;
429 spi_message_add_tail(&trans_delay, &msg);
432 /* Transmit phase - send our message */
433 memset(&trans, 0, sizeof(trans));
434 trans.tx_buf = ec_dev->dout;
435 trans.rx_buf = rx_buf;
438 spi_message_add_tail(&trans, &msg);
439 ret = spi_sync_locked(ec_spi->spi, &msg);
441 /* Get the response */
443 /* Verify that EC can process command */
444 for (i = 0; i < len; i++) {
447 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
448 * markers are all signs that the EC didn't fully
449 * receive our command. e.g., if the EC is flashing
450 * itself, it can't respond to any commands and instead
451 * clocks out EC_SPI_PAST_END from its SPI hardware
452 * buffer. Similar occurrences can happen if the AP is
453 * too slow to clock out data after asserting CS -- the
454 * EC will abort and fill its buffer with
455 * EC_SPI_RX_BAD_DATA.
457 * In all cases, these errors should be safe to retry.
458 * Report -EAGAIN and let the caller decide what to do
461 if (rx_byte == EC_SPI_PAST_END ||
462 rx_byte == EC_SPI_RX_BAD_DATA ||
463 rx_byte == EC_SPI_NOT_READY) {
471 ret = cros_ec_spi_receive_packet(ec_dev,
472 ec_msg->insize + sizeof(*response));
473 else if (ret != -EAGAIN)
474 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
476 final_ret = terminate_request(ec_dev);
478 spi_bus_unlock(ec_spi->spi->master);
487 /* check response error code */
488 response = (struct ec_host_response *)ptr;
489 ec_msg->result = response->result;
491 ret = cros_ec_check_result(ec_dev, ec_msg);
495 len = response->data_len;
497 if (len > ec_msg->insize) {
498 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
499 len, ec_msg->insize);
504 for (i = 0; i < sizeof(*response); i++)
507 /* copy response packet payload and compute checksum */
508 memcpy(ec_msg->data, ptr + sizeof(*response), len);
509 for (i = 0; i < len; i++)
510 sum += ec_msg->data[i];
514 "bad packet checksum, calculated %x\n",
523 if (ec_msg->command == EC_CMD_REBOOT_EC)
524 msleep(EC_REBOOT_DELAY_MS);
530 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
532 * @ec_dev: ChromeOS EC device
533 * @ec_msg: Message to transfer
535 static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
536 struct cros_ec_command *ec_msg)
538 struct cros_ec_spi *ec_spi = ec_dev->priv;
539 struct spi_transfer trans;
540 struct spi_message msg;
546 int ret = 0, final_ret;
549 len = cros_ec_prepare_tx(ec_dev, ec_msg);
552 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
554 /* If it's too soon to do another transaction, wait */
555 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
556 if (delay < EC_SPI_RECOVERY_TIME_NS)
557 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
559 rx_buf = kzalloc(len, GFP_KERNEL);
563 spi_bus_lock(ec_spi->spi->master);
565 /* Transmit phase - send our message */
566 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
567 memset(&trans, 0, sizeof(trans));
568 trans.tx_buf = ec_dev->dout;
569 trans.rx_buf = rx_buf;
572 spi_message_init(&msg);
573 spi_message_add_tail(&trans, &msg);
574 ret = spi_sync_locked(ec_spi->spi, &msg);
576 /* Get the response */
578 /* Verify that EC can process command */
579 for (i = 0; i < len; i++) {
581 /* See comments in cros_ec_pkt_xfer_spi() */
582 if (rx_byte == EC_SPI_PAST_END ||
583 rx_byte == EC_SPI_RX_BAD_DATA ||
584 rx_byte == EC_SPI_NOT_READY) {
592 ret = cros_ec_spi_receive_response(ec_dev,
593 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
594 else if (ret != -EAGAIN)
595 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
597 final_ret = terminate_request(ec_dev);
599 spi_bus_unlock(ec_spi->spi->master);
608 /* check response error code */
609 ec_msg->result = ptr[0];
610 ret = cros_ec_check_result(ec_dev, ec_msg);
615 sum = ptr[0] + ptr[1];
616 if (len > ec_msg->insize) {
617 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
618 len, ec_msg->insize);
623 /* copy response packet payload and compute checksum */
624 for (i = 0; i < len; i++) {
627 ec_msg->data[i] = ptr[i + 2];
631 debug_packet(ec_dev->dev, "in", ptr, len + 3);
633 if (sum != ptr[len + 2]) {
635 "bad packet checksum, expected %02x, got %02x\n",
644 if (ec_msg->command == EC_CMD_REBOOT_EC)
645 msleep(EC_REBOOT_DELAY_MS);
650 static void cros_ec_xfer_high_pri_work(struct kthread_work *work)
652 struct cros_ec_xfer_work_params *params;
654 params = container_of(work, struct cros_ec_xfer_work_params, work);
655 params->ret = params->fn(params->ec_dev, params->ec_msg);
658 static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev,
659 struct cros_ec_command *ec_msg,
660 cros_ec_xfer_fn_t fn)
662 struct cros_ec_spi *ec_spi = ec_dev->priv;
663 struct cros_ec_xfer_work_params params = {
664 .work = KTHREAD_WORK_INIT(params.work,
665 cros_ec_xfer_high_pri_work),
672 * This looks a bit ridiculous. Why do the work on a
673 * different thread if we're just going to block waiting for
674 * the thread to finish? The key here is that the thread is
675 * running at high priority but the calling context might not
676 * be. We need to be at high priority to avoid getting
677 * context switched out for too long and the EC giving up on
680 kthread_queue_work(ec_spi->high_pri_worker, ¶ms.work);
681 kthread_flush_work(¶ms.work);
686 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
687 struct cros_ec_command *ec_msg)
689 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi);
692 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
693 struct cros_ec_command *ec_msg)
695 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi);
698 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
700 struct device_node *np = dev->of_node;
704 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
706 ec_spi->start_of_msg_delay = val;
708 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
710 ec_spi->end_of_msg_delay = val;
713 static void cros_ec_spi_high_pri_release(void *worker)
715 kthread_destroy_worker(worker);
718 static int cros_ec_spi_devm_high_pri_alloc(struct device *dev,
719 struct cros_ec_spi *ec_spi)
723 ec_spi->high_pri_worker =
724 kthread_create_worker(0, "cros_ec_spi_high_pri");
726 if (IS_ERR(ec_spi->high_pri_worker)) {
727 err = PTR_ERR(ec_spi->high_pri_worker);
728 dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err);
732 err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release,
733 ec_spi->high_pri_worker);
737 sched_set_fifo(ec_spi->high_pri_worker->task);
742 static int cros_ec_spi_probe(struct spi_device *spi)
744 struct device *dev = &spi->dev;
745 struct cros_ec_device *ec_dev;
746 struct cros_ec_spi *ec_spi;
750 err = spi_setup(spi);
754 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
758 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
762 /* Check for any DT properties */
763 cros_ec_spi_dt_probe(ec_spi, dev);
765 spi_set_drvdata(spi, ec_dev);
767 ec_dev->priv = ec_spi;
768 ec_dev->irq = spi->irq;
769 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
770 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
771 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
772 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
773 sizeof(struct ec_host_response) +
774 sizeof(struct ec_response_get_protocol_info);
775 ec_dev->dout_size = sizeof(struct ec_host_request);
777 ec_spi->last_transfer_ns = ktime_get_ns();
779 err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi);
783 err = cros_ec_register(ec_dev);
785 dev_err(dev, "cannot register EC\n");
789 device_init_wakeup(&spi->dev, true);
794 static void cros_ec_spi_remove(struct spi_device *spi)
796 struct cros_ec_device *ec_dev = spi_get_drvdata(spi);
798 cros_ec_unregister(ec_dev);
801 #ifdef CONFIG_PM_SLEEP
802 static int cros_ec_spi_suspend(struct device *dev)
804 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
806 return cros_ec_suspend(ec_dev);
809 static int cros_ec_spi_resume(struct device *dev)
811 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
813 return cros_ec_resume(ec_dev);
817 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
820 static const struct of_device_id cros_ec_spi_of_match[] = {
821 { .compatible = "google,cros-ec-spi", },
824 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
826 static const struct spi_device_id cros_ec_spi_id[] = {
827 { "cros-ec-spi", 0 },
830 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
832 static struct spi_driver cros_ec_driver_spi = {
834 .name = "cros-ec-spi",
835 .of_match_table = cros_ec_spi_of_match,
836 .pm = &cros_ec_spi_pm_ops,
837 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
839 .probe = cros_ec_spi_probe,
840 .remove = cros_ec_spi_remove,
841 .id_table = cros_ec_spi_id,
844 module_spi_driver(cros_ec_driver_spi);
846 MODULE_LICENSE("GPL v2");
847 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");