2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 * This file defines external dependencies of Display Core.
30 #ifndef __DM_SERVICES_H__
32 #define __DM_SERVICES_H__
34 /* TODO: remove when DC is complete. */
35 #include "dm_services_types.h"
36 #include "logger_interface.h"
37 #include "link_service_types.h"
41 irq_handler_idx dm_register_interrupt(
42 struct dc_context *ctx,
43 struct dc_interrupt_params *int_params,
50 * GPU registers access
54 /* enable for debugging new code, this adds 50k to the driver size. */
55 /* #define DM_CHECK_ADDR_0 */
57 #define dm_read_reg(ctx, address) \
58 dm_read_reg_func(ctx, address, __func__)
60 static inline uint32_t dm_read_reg_func(
61 const struct dc_context *ctx,
63 const char *func_name)
66 #ifdef DM_CHECK_ADDR_0
68 DC_ERR("invalid register read; address = 0\n");
72 value = cgs_read_register(ctx->cgs_device, address);
77 #define dm_write_reg(ctx, address, value) \
78 dm_write_reg_func(ctx, address, value, __func__)
80 static inline void dm_write_reg_func(
81 const struct dc_context *ctx,
84 const char *func_name)
86 #ifdef DM_CHECK_ADDR_0
88 DC_ERR("invalid register write. address = 0");
92 cgs_write_register(ctx->cgs_device, address, value);
95 static inline uint32_t dm_read_index_reg(
96 const struct dc_context *ctx,
97 enum cgs_ind_reg addr_space,
100 return cgs_read_ind_register(ctx->cgs_device, addr_space, index);
103 static inline void dm_write_index_reg(
104 const struct dc_context *ctx,
105 enum cgs_ind_reg addr_space,
109 cgs_write_ind_register(ctx->cgs_device, addr_space, index, value);
112 static inline uint32_t get_reg_field_value_ex(
117 return (mask & reg_value) >> shift;
120 #define get_reg_field_value(reg_value, reg_name, reg_field)\
121 get_reg_field_value_ex(\
123 reg_name ## __ ## reg_field ## _MASK,\
124 reg_name ## __ ## reg_field ## __SHIFT)
126 static inline uint32_t set_reg_field_value_ex(
133 return (reg_value & ~mask) | (mask & (value << shift));
136 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\
137 (reg_value) = set_reg_field_value_ex(\
140 reg_name ## __ ## reg_field ## _MASK,\
141 reg_name ## __ ## reg_field ## __SHIFT)
143 uint32_t generic_reg_update_ex(const struct dc_context *ctx,
144 uint32_t addr, uint32_t reg_val, int n,
145 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
147 #define FD(reg_field) reg_field ## __SHIFT, \
151 * return number of poll before condition is met
152 * return 0 if condition is not meet after specified time out tries
154 unsigned int generic_reg_wait(const struct dc_context *ctx,
155 uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value,
156 unsigned int delay_between_poll_us, unsigned int time_out_num_tries,
157 const char *func_name, int line);
160 /* These macros need to be used with soc15 registers in order to retrieve
163 #define dm_write_reg_soc15(ctx, reg, inst_offset, value) \
164 dm_write_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, value, __func__)
166 #define dm_read_reg_soc15(ctx, reg, inst_offset) \
167 dm_read_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, __func__)
169 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\
170 generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, \
171 dm_read_reg_func(ctx, mm##reg_name + DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + inst_offset, __func__), \
174 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\
175 generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, 0, \
178 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\
179 get_reg_field_value_ex(\
181 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
182 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
184 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\
185 (reg_value) = set_reg_field_value_ex(\
188 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
189 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
191 /**************************************
192 * Power Play (PP) interfaces
193 **************************************/
195 /* DAL calls this function to notify PP about clocks it needs for the Mode Set.
196 * This is done *before* it changes DCE clock.
198 * If required clock is higher than current, then PP will increase the voltage.
200 * If required clock is lower than current, then PP will defer reduction of
201 * voltage until the call to dc_service_pp_post_dce_clock_change().
203 * \input - Contains clocks needed for Mode Set.
205 * \output - Contains clocks adjusted by PP which DAL should use for Mode Set.
206 * Valid only if function returns zero.
208 * \returns true - call is successful
209 * false - call failed
211 bool dm_pp_pre_dce_clock_change(
212 struct dc_context *ctx,
213 struct dm_pp_gpu_clock_range *requested_state,
214 struct dm_pp_gpu_clock_range *actual_state);
216 /* The returned clocks range are 'static' system clocks which will be used for
217 * mode validation purposes.
219 * \returns true - call is successful
220 * false - call failed
222 bool dc_service_get_system_clocks_range(
223 const struct dc_context *ctx,
224 struct dm_pp_gpu_clock_range *sys_clks);
226 /* Gets valid clocks levels from pplib
228 * input: clk_type - display clk / sclk / mem clk
230 * output: array of valid clock levels for given type in ascending order,
231 * with invalid levels filtered out
234 bool dm_pp_get_clock_levels_by_type(
235 const struct dc_context *ctx,
236 enum dm_pp_clock_type clk_type,
237 struct dm_pp_clock_levels *clk_level_info);
239 bool dm_pp_get_clock_levels_by_type_with_latency(
240 const struct dc_context *ctx,
241 enum dm_pp_clock_type clk_type,
242 struct dm_pp_clock_levels_with_latency *clk_level_info);
244 bool dm_pp_get_clock_levels_by_type_with_voltage(
245 const struct dc_context *ctx,
246 enum dm_pp_clock_type clk_type,
247 struct dm_pp_clock_levels_with_voltage *clk_level_info);
249 bool dm_pp_notify_wm_clock_changes(
250 const struct dc_context *ctx,
251 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);
253 void dm_pp_get_funcs_rv(struct dc_context *ctx,
254 struct pp_smu_funcs_rv *funcs);
256 /* DAL calls this function to notify PP about completion of Mode Set.
257 * For PP it means that current DCE clocks are those which were returned
258 * by dc_service_pp_pre_dce_clock_change(), in the 'output' parameter.
260 * If the clocks are higher than before, then PP does nothing.
262 * If the clocks are lower than before, then PP reduces the voltage.
264 * \returns true - call is successful
265 * false - call failed
267 bool dm_pp_apply_display_requirements(
268 const struct dc_context *ctx,
269 const struct dm_pp_display_configuration *pp_display_cfg);
271 bool dm_pp_apply_power_level_change_request(
272 const struct dc_context *ctx,
273 struct dm_pp_power_level_change_request *level_change_req);
275 bool dm_pp_apply_clock_for_voltage_request(
276 const struct dc_context *ctx,
277 struct dm_pp_clock_for_voltage_req *clock_for_voltage_req);
279 bool dm_pp_get_static_clocks(
280 const struct dc_context *ctx,
281 struct dm_pp_static_clock_info *static_clk_info);
283 /****** end of PP interfaces ******/
285 struct persistent_data_flag {
290 /* Call to write data in registry editor for persistent data storage.
292 * \inputs sink - identify edid/link for registry folder creation
293 * module name - identify folders for registry
294 * key name - identify keys within folders for registry
295 * params - value to write in defined folder/key
296 * size - size of the input params
297 * flag - determine whether to save by link or edid
299 * \returns true - call is successful
300 * false - call failed
303 * -----------------------------------------------------------------------------
304 * NULL NULL NULL - failure
305 * NULL NULL - - create key with param value
307 * NULL - NULL - create module folder under base folder
308 * - NULL NULL - failure
309 * NULL - - - create key under module folder
310 * with no edid/link identification
311 * - NULL - - create key with param value
313 * - - NULL - create module folder under base folder
314 * - - - - create key under module folder
315 * with edid/link identification
317 bool dm_write_persistent_data(struct dc_context *ctx,
318 const struct dc_sink *sink,
319 const char *module_name,
320 const char *key_name,
323 struct persistent_data_flag *flag);
326 /* Call to read data in registry editor for persistent data storage.
328 * \inputs sink - identify edid/link for registry folder creation
329 * module name - identify folders for registry
330 * key name - identify keys within folders for registry
331 * size - size of the output params
332 * flag - determine whether it was save by link or edid
334 * \returns params - value read from defined folder/key
335 * true - call is successful
336 * false - call failed
339 * -----------------------------------------------------------------------------
340 * NULL NULL NULL - failure
341 * NULL NULL - - read key under base folder
342 * NULL - NULL - failure
343 * - NULL NULL - failure
344 * NULL - - - read key under module folder
345 * with no edid/link identification
346 * - NULL - - read key under base folder
348 * - - - - read key under module folder
349 * with edid/link identification
351 bool dm_read_persistent_data(struct dc_context *ctx,
352 const struct dc_sink *sink,
353 const char *module_name,
354 const char *key_name,
357 struct persistent_data_flag *flag);
359 bool dm_query_extended_brightness_caps
360 (struct dc_context *ctx, enum dm_acpi_display_type display,
361 struct dm_acpi_atif_backlight_caps *pCaps);
363 bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id);
370 #define dm_log_to_buffer(buffer, size, fmt, args)\
371 vsnprintf(buffer, size, fmt, args)
373 unsigned long long dm_get_timestamp(struct dc_context *ctx);
376 * Debug and verification hooks
378 bool dm_helpers_dc_conn_log(
379 struct dc_context *ctx,
380 struct log_entry *entry,
381 enum dc_log_type event);
383 void dm_dtn_log_begin(struct dc_context *ctx);
384 void dm_dtn_log_append_v(struct dc_context *ctx, const char *msg, ...);
385 void dm_dtn_log_end(struct dc_context *ctx);
387 #endif /* __DM_SERVICES_H__ */