1 /* bpf_jit_comp.c: BPF JIT compiler
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; version 2
13 #include <linux/moduleloader.h>
14 #include <asm/cacheflush.h>
15 #include <asm/asm-compat.h>
16 #include <linux/netdevice.h>
17 #include <linux/filter.h>
18 #include <linux/if_vlan.h>
20 #include "bpf_jit32.h"
22 static inline void bpf_flush_icache(void *start, void *end)
25 flush_icache_range((unsigned long)start, (unsigned long)end);
28 static void bpf_jit_build_prologue(struct bpf_prog *fp, u32 *image,
29 struct codegen_context *ctx)
32 const struct sock_filter *filter = fp->insns;
34 if (ctx->seen & (SEEN_MEM | SEEN_DATAREF)) {
36 if (ctx->seen & SEEN_DATAREF) {
37 /* If we call any helpers (for loads), save LR */
38 EMIT(PPC_INST_MFLR | __PPC_RT(R0));
39 PPC_BPF_STL(0, 1, PPC_LR_STKOFF);
41 /* Back up non-volatile regs. */
42 PPC_BPF_STL(r_D, 1, -(REG_SZ*(32-r_D)));
43 PPC_BPF_STL(r_HL, 1, -(REG_SZ*(32-r_HL)));
45 if (ctx->seen & SEEN_MEM) {
47 * Conditionally save regs r15-r31 as some will be used
50 for (i = r_M; i < (r_M+16); i++) {
51 if (ctx->seen & (1 << (i-r_M)))
52 PPC_BPF_STL(i, 1, -(REG_SZ*(32-i)));
55 PPC_BPF_STLU(1, 1, -BPF_PPC_STACKFRAME);
58 if (ctx->seen & SEEN_DATAREF) {
60 * If this filter needs to access skb data,
61 * prepare r_D and r_HL:
62 * r_HL = skb->len - skb->data_len
65 PPC_LWZ_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff,
67 PPC_LWZ_OFFS(r_HL, r_skb, offsetof(struct sk_buff, len));
68 PPC_SUB(r_HL, r_HL, r_scratch1);
69 PPC_LL_OFFS(r_D, r_skb, offsetof(struct sk_buff, data));
72 if (ctx->seen & SEEN_XREG) {
74 * TODO: Could also detect whether first instr. sets X and
75 * avoid this (as below, with A).
80 /* make sure we dont leak kernel information to user */
81 if (bpf_needs_clear_a(&filter[0]))
85 static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
89 if (ctx->seen & (SEEN_MEM | SEEN_DATAREF)) {
90 PPC_ADDI(1, 1, BPF_PPC_STACKFRAME);
91 if (ctx->seen & SEEN_DATAREF) {
92 PPC_BPF_LL(0, 1, PPC_LR_STKOFF);
94 PPC_BPF_LL(r_D, 1, -(REG_SZ*(32-r_D)));
95 PPC_BPF_LL(r_HL, 1, -(REG_SZ*(32-r_HL)));
97 if (ctx->seen & SEEN_MEM) {
98 /* Restore any saved non-vol registers */
99 for (i = r_M; i < (r_M+16); i++) {
100 if (ctx->seen & (1 << (i-r_M)))
101 PPC_BPF_LL(i, 1, -(REG_SZ*(32-i)));
105 /* The RETs have left a return value in R3. */
110 #define CHOOSE_LOAD_FUNC(K, func) \
111 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
113 /* Assemble the body code between the prologue & epilogue. */
114 static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
115 struct codegen_context *ctx,
118 const struct sock_filter *filter = fp->insns;
121 unsigned int true_cond;
124 /* Start of epilogue code */
125 unsigned int exit_addr = addrs[flen];
127 for (i = 0; i < flen; i++) {
128 unsigned int K = filter[i].k;
129 u16 code = bpf_anc_helper(&filter[i]);
132 * addrs[] maps a BPF bytecode address into a real offset from
133 * the start of the body code.
135 addrs[i] = ctx->idx * 4;
139 case BPF_ALU | BPF_ADD | BPF_X: /* A += X; */
140 ctx->seen |= SEEN_XREG;
141 PPC_ADD(r_A, r_A, r_X);
143 case BPF_ALU | BPF_ADD | BPF_K: /* A += K; */
146 PPC_ADDI(r_A, r_A, IMM_L(K));
148 PPC_ADDIS(r_A, r_A, IMM_HA(K));
150 case BPF_ALU | BPF_SUB | BPF_X: /* A -= X; */
151 ctx->seen |= SEEN_XREG;
152 PPC_SUB(r_A, r_A, r_X);
154 case BPF_ALU | BPF_SUB | BPF_K: /* A -= K */
157 PPC_ADDI(r_A, r_A, IMM_L(-K));
159 PPC_ADDIS(r_A, r_A, IMM_HA(-K));
161 case BPF_ALU | BPF_MUL | BPF_X: /* A *= X; */
162 ctx->seen |= SEEN_XREG;
163 PPC_MULW(r_A, r_A, r_X);
165 case BPF_ALU | BPF_MUL | BPF_K: /* A *= K */
167 PPC_MULI(r_A, r_A, K);
169 PPC_LI32(r_scratch1, K);
170 PPC_MULW(r_A, r_A, r_scratch1);
173 case BPF_ALU | BPF_MOD | BPF_X: /* A %= X; */
174 case BPF_ALU | BPF_DIV | BPF_X: /* A /= X; */
175 ctx->seen |= SEEN_XREG;
177 if (ctx->pc_ret0 != -1) {
178 PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
180 PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
184 if (code == (BPF_ALU | BPF_MOD | BPF_X)) {
185 PPC_DIVWU(r_scratch1, r_A, r_X);
186 PPC_MULW(r_scratch1, r_X, r_scratch1);
187 PPC_SUB(r_A, r_A, r_scratch1);
189 PPC_DIVWU(r_A, r_A, r_X);
192 case BPF_ALU | BPF_MOD | BPF_K: /* A %= K; */
193 PPC_LI32(r_scratch2, K);
194 PPC_DIVWU(r_scratch1, r_A, r_scratch2);
195 PPC_MULW(r_scratch1, r_scratch2, r_scratch1);
196 PPC_SUB(r_A, r_A, r_scratch1);
198 case BPF_ALU | BPF_DIV | BPF_K: /* A /= K */
201 PPC_LI32(r_scratch1, K);
202 PPC_DIVWU(r_A, r_A, r_scratch1);
204 case BPF_ALU | BPF_AND | BPF_X:
205 ctx->seen |= SEEN_XREG;
206 PPC_AND(r_A, r_A, r_X);
208 case BPF_ALU | BPF_AND | BPF_K:
210 PPC_ANDI(r_A, r_A, K);
212 PPC_LI32(r_scratch1, K);
213 PPC_AND(r_A, r_A, r_scratch1);
216 case BPF_ALU | BPF_OR | BPF_X:
217 ctx->seen |= SEEN_XREG;
218 PPC_OR(r_A, r_A, r_X);
220 case BPF_ALU | BPF_OR | BPF_K:
222 PPC_ORI(r_A, r_A, IMM_L(K));
224 PPC_ORIS(r_A, r_A, IMM_H(K));
226 case BPF_ANC | SKF_AD_ALU_XOR_X:
227 case BPF_ALU | BPF_XOR | BPF_X: /* A ^= X */
228 ctx->seen |= SEEN_XREG;
229 PPC_XOR(r_A, r_A, r_X);
231 case BPF_ALU | BPF_XOR | BPF_K: /* A ^= K */
233 PPC_XORI(r_A, r_A, IMM_L(K));
235 PPC_XORIS(r_A, r_A, IMM_H(K));
237 case BPF_ALU | BPF_LSH | BPF_X: /* A <<= X; */
238 ctx->seen |= SEEN_XREG;
239 PPC_SLW(r_A, r_A, r_X);
241 case BPF_ALU | BPF_LSH | BPF_K:
245 PPC_SLWI(r_A, r_A, K);
247 case BPF_ALU | BPF_RSH | BPF_X: /* A >>= X; */
248 ctx->seen |= SEEN_XREG;
249 PPC_SRW(r_A, r_A, r_X);
251 case BPF_ALU | BPF_RSH | BPF_K: /* A >>= K; */
255 PPC_SRWI(r_A, r_A, K);
257 case BPF_ALU | BPF_NEG:
260 case BPF_RET | BPF_K:
263 if (ctx->pc_ret0 == -1)
267 * If this isn't the very last instruction, branch to
268 * the epilogue if we've stuff to clean up. Otherwise,
269 * if there's nothing to tidy, just return. If we /are/
270 * the last instruction, we're about to fall through to
271 * the epilogue to return.
275 * Note: 'seen' is properly valid only on pass
276 * #2. Both parts of this conditional are the
277 * same instruction size though, meaning the
278 * first pass will still correctly determine the
279 * code size/addresses.
287 case BPF_RET | BPF_A:
296 case BPF_MISC | BPF_TAX: /* X = A */
299 case BPF_MISC | BPF_TXA: /* A = X */
300 ctx->seen |= SEEN_XREG;
304 /*** Constant loads/M[] access ***/
305 case BPF_LD | BPF_IMM: /* A = K */
308 case BPF_LDX | BPF_IMM: /* X = K */
311 case BPF_LD | BPF_MEM: /* A = mem[K] */
312 PPC_MR(r_A, r_M + (K & 0xf));
313 ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
315 case BPF_LDX | BPF_MEM: /* X = mem[K] */
316 PPC_MR(r_X, r_M + (K & 0xf));
317 ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
319 case BPF_ST: /* mem[K] = A */
320 PPC_MR(r_M + (K & 0xf), r_A);
321 ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
323 case BPF_STX: /* mem[K] = X */
324 PPC_MR(r_M + (K & 0xf), r_X);
325 ctx->seen |= SEEN_XREG | SEEN_MEM | (1<<(K & 0xf));
327 case BPF_LD | BPF_W | BPF_LEN: /* A = skb->len; */
328 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
329 PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff, len));
331 case BPF_LDX | BPF_W | BPF_ABS: /* A = *((u32 *)(seccomp_data + K)); */
332 PPC_LWZ_OFFS(r_A, r_skb, K);
334 case BPF_LDX | BPF_W | BPF_LEN: /* X = skb->len; */
335 PPC_LWZ_OFFS(r_X, r_skb, offsetof(struct sk_buff, len));
338 /*** Ancillary info loads ***/
339 case BPF_ANC | SKF_AD_PROTOCOL: /* A = ntohs(skb->protocol); */
340 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
342 PPC_NTOHS_OFFS(r_A, r_skb, offsetof(struct sk_buff,
345 case BPF_ANC | SKF_AD_IFINDEX:
346 case BPF_ANC | SKF_AD_HATYPE:
347 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
349 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
351 PPC_LL_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff,
353 PPC_CMPDI(r_scratch1, 0);
354 if (ctx->pc_ret0 != -1) {
355 PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
357 /* Exit, returning 0; first pass hits here. */
358 PPC_BCC_SHORT(COND_NE, ctx->idx * 4 + 12);
362 if (code == (BPF_ANC | SKF_AD_IFINDEX)) {
363 PPC_LWZ_OFFS(r_A, r_scratch1,
364 offsetof(struct net_device, ifindex));
366 PPC_LHZ_OFFS(r_A, r_scratch1,
367 offsetof(struct net_device, type));
371 case BPF_ANC | SKF_AD_MARK:
372 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
373 PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
376 case BPF_ANC | SKF_AD_RXHASH:
377 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4);
378 PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
381 case BPF_ANC | SKF_AD_VLAN_TAG:
382 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2);
384 PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
387 case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
388 PPC_LBZ_OFFS(r_A, r_skb, PKT_VLAN_PRESENT_OFFSET());
389 if (PKT_VLAN_PRESENT_BIT)
390 PPC_SRWI(r_A, r_A, PKT_VLAN_PRESENT_BIT);
391 if (PKT_VLAN_PRESENT_BIT < 7)
392 PPC_ANDI(r_A, r_A, 1);
394 case BPF_ANC | SKF_AD_QUEUE:
395 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
396 queue_mapping) != 2);
397 PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
400 case BPF_ANC | SKF_AD_PKTTYPE:
401 PPC_LBZ_OFFS(r_A, r_skb, PKT_TYPE_OFFSET());
402 PPC_ANDI(r_A, r_A, PKT_TYPE_MAX);
403 PPC_SRWI(r_A, r_A, 5);
405 case BPF_ANC | SKF_AD_CPU:
406 PPC_BPF_LOAD_CPU(r_A);
408 /*** Absolute loads from packet header/data ***/
409 case BPF_LD | BPF_W | BPF_ABS:
410 func = CHOOSE_LOAD_FUNC(K, sk_load_word);
412 case BPF_LD | BPF_H | BPF_ABS:
413 func = CHOOSE_LOAD_FUNC(K, sk_load_half);
415 case BPF_LD | BPF_B | BPF_ABS:
416 func = CHOOSE_LOAD_FUNC(K, sk_load_byte);
419 ctx->seen |= SEEN_DATAREF;
420 PPC_FUNC_ADDR(r_scratch1, func);
421 PPC_MTLR(r_scratch1);
425 * Helper returns 'lt' condition on error, and an
426 * appropriate return value in r3
428 PPC_BCC(COND_LT, exit_addr);
431 /*** Indirect loads from packet header/data ***/
432 case BPF_LD | BPF_W | BPF_IND:
434 goto common_load_ind;
435 case BPF_LD | BPF_H | BPF_IND:
437 goto common_load_ind;
438 case BPF_LD | BPF_B | BPF_IND:
442 * Load from [X + K]. Negative offsets are tested for
443 * in the helper functions.
445 ctx->seen |= SEEN_DATAREF | SEEN_XREG;
446 PPC_FUNC_ADDR(r_scratch1, func);
447 PPC_MTLR(r_scratch1);
448 PPC_ADDI(r_addr, r_X, IMM_L(K));
450 PPC_ADDIS(r_addr, r_addr, IMM_HA(K));
452 /* If error, cr0.LT set */
453 PPC_BCC(COND_LT, exit_addr);
456 case BPF_LDX | BPF_B | BPF_MSH:
457 func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);
461 /*** Jump and branches ***/
462 case BPF_JMP | BPF_JA:
464 PPC_JMP(addrs[i + 1 + K]);
467 case BPF_JMP | BPF_JGT | BPF_K:
468 case BPF_JMP | BPF_JGT | BPF_X:
471 case BPF_JMP | BPF_JGE | BPF_K:
472 case BPF_JMP | BPF_JGE | BPF_X:
475 case BPF_JMP | BPF_JEQ | BPF_K:
476 case BPF_JMP | BPF_JEQ | BPF_X:
479 case BPF_JMP | BPF_JSET | BPF_K:
480 case BPF_JMP | BPF_JSET | BPF_X:
484 /* same targets, can avoid doing the test :) */
485 if (filter[i].jt == filter[i].jf) {
486 if (filter[i].jt > 0)
487 PPC_JMP(addrs[i + 1 + filter[i].jt]);
492 case BPF_JMP | BPF_JGT | BPF_X:
493 case BPF_JMP | BPF_JGE | BPF_X:
494 case BPF_JMP | BPF_JEQ | BPF_X:
495 ctx->seen |= SEEN_XREG;
498 case BPF_JMP | BPF_JSET | BPF_X:
499 ctx->seen |= SEEN_XREG;
500 PPC_AND_DOT(r_scratch1, r_A, r_X);
502 case BPF_JMP | BPF_JEQ | BPF_K:
503 case BPF_JMP | BPF_JGT | BPF_K:
504 case BPF_JMP | BPF_JGE | BPF_K:
508 PPC_LI32(r_scratch1, K);
509 PPC_CMPLW(r_A, r_scratch1);
512 case BPF_JMP | BPF_JSET | BPF_K:
514 /* PPC_ANDI is /only/ dot-form */
515 PPC_ANDI(r_scratch1, r_A, K);
517 PPC_LI32(r_scratch1, K);
518 PPC_AND_DOT(r_scratch1, r_A,
523 /* Sometimes branches are constructed "backward", with
524 * the false path being the branch and true path being
525 * a fallthrough to the next instruction.
527 if (filter[i].jt == 0)
528 /* Swap the sense of the branch */
529 PPC_BCC(true_cond ^ COND_CMP_TRUE,
530 addrs[i + 1 + filter[i].jf]);
532 PPC_BCC(true_cond, addrs[i + 1 + filter[i].jt]);
533 if (filter[i].jf != 0)
534 PPC_JMP(addrs[i + 1 + filter[i].jf]);
538 /* The filter contains something cruel & unusual.
539 * We don't handle it, but also there shouldn't be
540 * anything missing from our list.
542 if (printk_ratelimit())
543 pr_err("BPF filter opcode %04x (@%d) unsupported\n",
549 /* Set end-of-body-code address for exit. */
550 addrs[i] = ctx->idx * 4;
555 void bpf_jit_compile(struct bpf_prog *fp)
557 unsigned int proglen;
558 unsigned int alloclen;
562 struct codegen_context cgctx;
569 addrs = kcalloc(flen + 1, sizeof(*addrs), GFP_KERNEL);
574 * There are multiple assembly passes as the generated code will change
575 * size as it settles down, figuring out the max branch offsets/exit
578 * The range of standard conditional branches is +/- 32Kbytes. Since
579 * BPF_MAXINSNS = 4096, we can only jump from (worst case) start to
580 * finish with 8 bytes/instruction. Not feasible, so long jumps are
581 * used, distinct from short branches.
585 * For now, both branch types assemble to 2 words (short branches padded
586 * with a NOP); this is less efficient, but assembly will always complete
587 * after exactly 3 passes:
589 * First pass: No code buffer; Program is "faux-generated" -- no code
590 * emitted but maximum size of output determined (and addrs[] filled
591 * in). Also, we note whether we use M[], whether we use skb data, etc.
592 * All generation choices assumed to be 'worst-case', e.g. branches all
593 * far (2 instructions), return path code reduction not available, etc.
595 * Second pass: Code buffer allocated with size determined previously.
596 * Prologue generated to support features we have seen used. Exit paths
597 * determined and addrs[] is filled in again, as code may be slightly
598 * smaller as a result.
600 * Third pass: Code generated 'for real', and branch destinations
601 * determined from now-accurate addrs[] map.
605 * If we optimise this, near branches will be shorter. On the
606 * first assembly pass, we should err on the side of caution and
607 * generate the biggest code. On subsequent passes, branches will be
608 * generated short or long and code size will reduce. With smaller
609 * code, more branches may fall into the short category, and code will
612 * Finally, if we see one pass generate code the same size as the
613 * previous pass we have converged and should now generate code for
614 * real. Allocating at the end will also save the memory that would
615 * otherwise be wasted by the (small) current code shrinkage.
616 * Preferably, we should do a small number of passes (e.g. 5) and if we
617 * haven't converged by then, get impatient and force code to generate
618 * as-is, even if the odd branch would be left long. The chances of a
619 * long jump are tiny with all but the most enormous of BPF filter
620 * inputs, so we should usually converge on the third pass.
626 /* Scouting faux-generate pass 0 */
627 if (bpf_jit_build_body(fp, 0, &cgctx, addrs))
628 /* We hit something illegal or unsupported. */
632 * Pretend to build prologue, given the features we've seen. This will
633 * update ctgtx.idx as it pretends to output instructions, then we can
634 * calculate total size from idx.
636 bpf_jit_build_prologue(fp, 0, &cgctx);
637 bpf_jit_build_epilogue(0, &cgctx);
639 proglen = cgctx.idx * 4;
640 alloclen = proglen + FUNCTION_DESCR_SIZE;
641 image = module_alloc(alloclen);
645 code_base = image + (FUNCTION_DESCR_SIZE/4);
647 /* Code generation passes 1-2 */
648 for (pass = 1; pass < 3; pass++) {
649 /* Now build the prologue, body code & epilogue for real. */
651 bpf_jit_build_prologue(fp, code_base, &cgctx);
652 bpf_jit_build_body(fp, code_base, &cgctx, addrs);
653 bpf_jit_build_epilogue(code_base, &cgctx);
655 if (bpf_jit_enable > 1)
656 pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass,
657 proglen - (cgctx.idx * 4), cgctx.seen);
660 if (bpf_jit_enable > 1)
661 /* Note that we output the base address of the code_base
662 * rather than image, since opcodes are in code_base.
664 bpf_jit_dump(flen, proglen, pass, code_base);
666 bpf_flush_icache(code_base, code_base + (proglen/4));
669 /* Function descriptor nastiness: Address + TOC */
670 ((u64 *)image)[0] = (u64)code_base;
671 ((u64 *)image)[1] = local_paca->kernel_toc;
674 fp->bpf_func = (void *)image;
682 void bpf_jit_free(struct bpf_prog *fp)
685 module_memfree(fp->bpf_func);
687 bpf_prog_unlock_free(fp);