2 * Copyright (c) 2009 Nuvoton technology.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/workqueue.h>
15 #include <linux/interrupt.h>
16 #include <linux/delay.h>
17 #include <linux/errno.h>
18 #include <linux/err.h>
19 #include <linux/clk.h>
20 #include <linux/device.h>
21 #include <linux/platform_device.h>
22 #include <linux/gpio.h>
24 #include <linux/slab.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi_bitbang.h>
29 #include <linux/platform_data/spi-nuc900.h>
31 /* usi registers offset */
38 /* usi register bit */
39 #define ENINT (0x01 << 17)
40 #define ENFLG (0x01 << 16)
41 #define TXNUM (0x03 << 8)
42 #define TXNEG (0x01 << 2)
43 #define RXNEG (0x01 << 1)
44 #define LSB (0x01 << 10)
45 #define SELECTLEV (0x01 << 2)
46 #define SELECTPOL (0x01 << 31)
47 #define SELECTSLAVE 0x01
51 struct spi_bitbang bitbang;
52 struct completion done;
57 const unsigned char *tx;
60 struct resource *ioarea;
61 struct spi_master *master;
62 struct spi_device *curdev;
64 struct nuc900_spi_info *pdata;
69 static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
71 return spi_master_get_devdata(sdev->master);
74 static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
76 struct nuc900_spi *hw = to_hw(spi);
78 unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
79 unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
82 spin_lock_irqsave(&hw->lock, flags);
84 val = __raw_readl(hw->regs + USI_SSR);
96 __raw_writel(val, hw->regs + USI_SSR);
98 val = __raw_readl(hw->regs + USI_CNT);
105 __raw_writel(val, hw->regs + USI_CNT);
107 spin_unlock_irqrestore(&hw->lock, flags);
110 static void nuc900_spi_chipsel(struct spi_device *spi, int value)
113 case BITBANG_CS_INACTIVE:
114 nuc900_slave_select(spi, 0);
117 case BITBANG_CS_ACTIVE:
118 nuc900_slave_select(spi, 1);
123 static void nuc900_spi_setup_txnum(struct nuc900_spi *hw,
129 spin_lock_irqsave(&hw->lock, flags);
131 val = __raw_readl(hw->regs + USI_CNT);
136 val |= txnum << 0x08;
138 __raw_writel(val, hw->regs + USI_CNT);
140 spin_unlock_irqrestore(&hw->lock, flags);
144 static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
145 unsigned int txbitlen)
150 spin_lock_irqsave(&hw->lock, flags);
152 val = __raw_readl(hw->regs + USI_CNT);
154 val |= (txbitlen << 0x03);
156 __raw_writel(val, hw->regs + USI_CNT);
158 spin_unlock_irqrestore(&hw->lock, flags);
161 static void nuc900_spi_gobusy(struct nuc900_spi *hw)
166 spin_lock_irqsave(&hw->lock, flags);
168 val = __raw_readl(hw->regs + USI_CNT);
172 __raw_writel(val, hw->regs + USI_CNT);
174 spin_unlock_irqrestore(&hw->lock, flags);
177 static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
179 return hw->tx ? hw->tx[count] : 0;
182 static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
184 struct nuc900_spi *hw = to_hw(spi);
191 __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
193 nuc900_spi_gobusy(hw);
195 wait_for_completion(&hw->done);
200 static irqreturn_t nuc900_spi_irq(int irq, void *dev)
202 struct nuc900_spi *hw = dev;
204 unsigned int count = hw->count;
206 status = __raw_readl(hw->regs + USI_CNT);
207 __raw_writel(status, hw->regs + USI_CNT);
209 if (status & ENFLG) {
213 hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
216 if (count < hw->len) {
217 __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
218 nuc900_spi_gobusy(hw);
230 static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
235 spin_lock_irqsave(&hw->lock, flags);
237 val = __raw_readl(hw->regs + USI_CNT);
243 __raw_writel(val, hw->regs + USI_CNT);
245 spin_unlock_irqrestore(&hw->lock, flags);
248 static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
253 spin_lock_irqsave(&hw->lock, flags);
255 val = __raw_readl(hw->regs + USI_CNT);
261 __raw_writel(val, hw->regs + USI_CNT);
263 spin_unlock_irqrestore(&hw->lock, flags);
266 static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
271 spin_lock_irqsave(&hw->lock, flags);
273 val = __raw_readl(hw->regs + USI_CNT);
279 __raw_writel(val, hw->regs + USI_CNT);
281 spin_unlock_irqrestore(&hw->lock, flags);
284 static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
289 spin_lock_irqsave(&hw->lock, flags);
291 val = __raw_readl(hw->regs + USI_CNT);
294 val |= (sleep << 12);
296 val &= ~(0x0f << 12);
297 __raw_writel(val, hw->regs + USI_CNT);
299 spin_unlock_irqrestore(&hw->lock, flags);
302 static void nuc900_enable_int(struct nuc900_spi *hw)
307 spin_lock_irqsave(&hw->lock, flags);
309 val = __raw_readl(hw->regs + USI_CNT);
313 __raw_writel(val, hw->regs + USI_CNT);
315 spin_unlock_irqrestore(&hw->lock, flags);
318 static void nuc900_set_divider(struct nuc900_spi *hw)
320 __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
323 static void nuc900_init_spi(struct nuc900_spi *hw)
326 spin_lock_init(&hw->lock);
328 nuc900_tx_edge(hw, hw->pdata->txneg);
329 nuc900_rx_edge(hw, hw->pdata->rxneg);
330 nuc900_send_first(hw, hw->pdata->lsb);
331 nuc900_set_sleep(hw, hw->pdata->sleep);
332 nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
333 nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
334 nuc900_set_divider(hw);
335 nuc900_enable_int(hw);
338 static int nuc900_spi_probe(struct platform_device *pdev)
340 struct nuc900_spi *hw;
341 struct spi_master *master;
344 master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
345 if (master == NULL) {
346 dev_err(&pdev->dev, "No memory for spi_master\n");
351 hw = spi_master_get_devdata(master);
353 hw->pdata = dev_get_platdata(&pdev->dev);
354 hw->dev = &pdev->dev;
356 if (hw->pdata == NULL) {
357 dev_err(&pdev->dev, "No platform data supplied\n");
362 platform_set_drvdata(pdev, hw);
363 init_completion(&hw->done);
365 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
366 master->num_chipselect = hw->pdata->num_cs;
367 master->bus_num = hw->pdata->bus_num;
368 hw->bitbang.master = hw->master;
369 hw->bitbang.chipselect = nuc900_spi_chipsel;
370 hw->bitbang.txrx_bufs = nuc900_spi_txrx;
372 hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
373 if (hw->res == NULL) {
374 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
379 hw->ioarea = request_mem_region(hw->res->start,
380 resource_size(hw->res), pdev->name);
382 if (hw->ioarea == NULL) {
383 dev_err(&pdev->dev, "Cannot reserve region\n");
388 hw->regs = ioremap(hw->res->start, resource_size(hw->res));
389 if (hw->regs == NULL) {
390 dev_err(&pdev->dev, "Cannot map IO\n");
395 hw->irq = platform_get_irq(pdev, 0);
397 dev_err(&pdev->dev, "No IRQ specified\n");
402 err = request_irq(hw->irq, nuc900_spi_irq, 0, pdev->name, hw);
404 dev_err(&pdev->dev, "Cannot claim IRQ\n");
408 hw->clk = clk_get(&pdev->dev, "spi");
409 if (IS_ERR(hw->clk)) {
410 dev_err(&pdev->dev, "No clock for device\n");
411 err = PTR_ERR(hw->clk);
415 mfp_set_groupg(&pdev->dev, NULL);
418 err = spi_bitbang_start(&hw->bitbang);
420 dev_err(&pdev->dev, "Failed to register SPI master\n");
427 clk_disable(hw->clk);
430 free_irq(hw->irq, hw);
434 release_mem_region(hw->res->start, resource_size(hw->res));
437 spi_master_put(hw->master);
442 static int nuc900_spi_remove(struct platform_device *dev)
444 struct nuc900_spi *hw = platform_get_drvdata(dev);
446 free_irq(hw->irq, hw);
448 spi_bitbang_stop(&hw->bitbang);
450 clk_disable(hw->clk);
455 release_mem_region(hw->res->start, resource_size(hw->res));
458 spi_master_put(hw->master);
462 static struct platform_driver nuc900_spi_driver = {
463 .probe = nuc900_spi_probe,
464 .remove = nuc900_spi_remove,
466 .name = "nuc900-spi",
467 .owner = THIS_MODULE,
470 module_platform_driver(nuc900_spi_driver);
473 MODULE_DESCRIPTION("nuc900 spi driver!");
474 MODULE_LICENSE("GPL");
475 MODULE_ALIAS("platform:nuc900-spi");