2 * RTC driver for Maxim MAX77686 and MAX77802
4 * Copyright (C) 2012 Samsung Electronics Co.Ltd
6 * based on rtc-max8997.c
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
15 #include <linux/i2c.h>
16 #include <linux/slab.h>
17 #include <linux/rtc.h>
18 #include <linux/delay.h>
19 #include <linux/mutex.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/mfd/max77686-private.h>
23 #include <linux/irqdomain.h>
24 #include <linux/regmap.h>
26 #define MAX77686_I2C_ADDR_RTC (0x0C >> 1)
27 #define MAX77620_I2C_ADDR_RTC 0x68
28 #define MAX77686_INVALID_I2C_ADDR (-1)
30 /* Define non existing register */
31 #define MAX77686_INVALID_REG (-1)
33 /* RTC Control Register */
34 #define BCD_EN_SHIFT 0
35 #define BCD_EN_MASK BIT(BCD_EN_SHIFT)
36 #define MODEL24_SHIFT 1
37 #define MODEL24_MASK BIT(MODEL24_SHIFT)
38 /* RTC Update Register1 */
39 #define RTC_UDR_SHIFT 0
40 #define RTC_UDR_MASK BIT(RTC_UDR_SHIFT)
41 #define RTC_RBUDR_SHIFT 4
42 #define RTC_RBUDR_MASK BIT(RTC_RBUDR_SHIFT)
43 /* RTC Hour register */
44 #define HOUR_PM_SHIFT 6
45 #define HOUR_PM_MASK BIT(HOUR_PM_SHIFT)
46 /* RTC Alarm Enable */
47 #define ALARM_ENABLE_SHIFT 7
48 #define ALARM_ENABLE_MASK BIT(ALARM_ENABLE_SHIFT)
50 #define REG_RTC_NONE 0xdeadbeef
53 * MAX77802 has separate register (RTCAE1) for alarm enable instead
54 * using 1 bit from registers RTC{SEC,MIN,HOUR,DAY,MONTH,YEAR,DATE}
55 * as in done in MAX77686.
57 #define MAX77802_ALARM_ENABLE_VALUE 0x77
70 struct max77686_rtc_driver_data {
71 /* Minimum usecs needed for a RTC update */
73 /* Mask used to read RTC registers value */
75 /* Registers offset to I2C addresses map */
76 const unsigned int *map;
77 /* Has a separate alarm enable register? */
78 bool alarm_enable_reg;
79 /* I2C address for RTC block */
81 /* RTC interrupt via platform resource */
82 bool rtc_irq_from_platform;
83 /* Pending alarm status register */
84 int alarm_pending_status_reg;
85 /* RTC IRQ CHIP for regmap */
86 const struct regmap_irq_chip *rtc_irq_chip;
89 struct max77686_rtc_info {
91 struct i2c_client *rtc;
92 struct rtc_device *rtc_dev;
95 struct regmap *regmap;
96 struct regmap *rtc_regmap;
98 const struct max77686_rtc_driver_data *drv_data;
99 struct regmap_irq_chip_data *rtc_irq_data;
106 enum MAX77686_RTC_OP {
111 /* These are not registers but just offsets that are mapped to addresses */
112 enum max77686_rtc_reg_offset {
113 REG_RTC_CONTROLM = 0,
142 /* Maps RTC registers offset to the MAX77686 register addresses */
143 static const unsigned int max77686_map[REG_RTC_END] = {
144 [REG_RTC_CONTROLM] = MAX77686_RTC_CONTROLM,
145 [REG_RTC_CONTROL] = MAX77686_RTC_CONTROL,
146 [REG_RTC_UPDATE0] = MAX77686_RTC_UPDATE0,
147 [REG_WTSR_SMPL_CNTL] = MAX77686_WTSR_SMPL_CNTL,
148 [REG_RTC_SEC] = MAX77686_RTC_SEC,
149 [REG_RTC_MIN] = MAX77686_RTC_MIN,
150 [REG_RTC_HOUR] = MAX77686_RTC_HOUR,
151 [REG_RTC_WEEKDAY] = MAX77686_RTC_WEEKDAY,
152 [REG_RTC_MONTH] = MAX77686_RTC_MONTH,
153 [REG_RTC_YEAR] = MAX77686_RTC_YEAR,
154 [REG_RTC_DATE] = MAX77686_RTC_DATE,
155 [REG_ALARM1_SEC] = MAX77686_ALARM1_SEC,
156 [REG_ALARM1_MIN] = MAX77686_ALARM1_MIN,
157 [REG_ALARM1_HOUR] = MAX77686_ALARM1_HOUR,
158 [REG_ALARM1_WEEKDAY] = MAX77686_ALARM1_WEEKDAY,
159 [REG_ALARM1_MONTH] = MAX77686_ALARM1_MONTH,
160 [REG_ALARM1_YEAR] = MAX77686_ALARM1_YEAR,
161 [REG_ALARM1_DATE] = MAX77686_ALARM1_DATE,
162 [REG_ALARM2_SEC] = MAX77686_ALARM2_SEC,
163 [REG_ALARM2_MIN] = MAX77686_ALARM2_MIN,
164 [REG_ALARM2_HOUR] = MAX77686_ALARM2_HOUR,
165 [REG_ALARM2_WEEKDAY] = MAX77686_ALARM2_WEEKDAY,
166 [REG_ALARM2_MONTH] = MAX77686_ALARM2_MONTH,
167 [REG_ALARM2_YEAR] = MAX77686_ALARM2_YEAR,
168 [REG_ALARM2_DATE] = MAX77686_ALARM2_DATE,
169 [REG_RTC_AE1] = REG_RTC_NONE,
172 static const struct regmap_irq max77686_rtc_irqs[] = {
174 REGMAP_IRQ_REG(0, 0, MAX77686_RTCINT_RTC60S_MSK),
175 REGMAP_IRQ_REG(1, 0, MAX77686_RTCINT_RTCA1_MSK),
176 REGMAP_IRQ_REG(2, 0, MAX77686_RTCINT_RTCA2_MSK),
177 REGMAP_IRQ_REG(3, 0, MAX77686_RTCINT_SMPL_MSK),
178 REGMAP_IRQ_REG(4, 0, MAX77686_RTCINT_RTC1S_MSK),
179 REGMAP_IRQ_REG(5, 0, MAX77686_RTCINT_WTSR_MSK),
182 static const struct regmap_irq_chip max77686_rtc_irq_chip = {
183 .name = "max77686-rtc",
184 .status_base = MAX77686_RTC_INT,
185 .mask_base = MAX77686_RTC_INTM,
187 .irqs = max77686_rtc_irqs,
188 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
191 static const struct max77686_rtc_driver_data max77686_drv_data = {
195 .alarm_enable_reg = false,
196 .rtc_irq_from_platform = false,
197 .alarm_pending_status_reg = MAX77686_REG_STATUS2,
198 .rtc_i2c_addr = MAX77686_I2C_ADDR_RTC,
199 .rtc_irq_chip = &max77686_rtc_irq_chip,
202 static const struct max77686_rtc_driver_data max77620_drv_data = {
206 .alarm_enable_reg = false,
207 .rtc_irq_from_platform = true,
208 .alarm_pending_status_reg = MAX77686_INVALID_REG,
209 .rtc_i2c_addr = MAX77620_I2C_ADDR_RTC,
210 .rtc_irq_chip = &max77686_rtc_irq_chip,
213 static const unsigned int max77802_map[REG_RTC_END] = {
214 [REG_RTC_CONTROLM] = MAX77802_RTC_CONTROLM,
215 [REG_RTC_CONTROL] = MAX77802_RTC_CONTROL,
216 [REG_RTC_UPDATE0] = MAX77802_RTC_UPDATE0,
217 [REG_WTSR_SMPL_CNTL] = MAX77802_WTSR_SMPL_CNTL,
218 [REG_RTC_SEC] = MAX77802_RTC_SEC,
219 [REG_RTC_MIN] = MAX77802_RTC_MIN,
220 [REG_RTC_HOUR] = MAX77802_RTC_HOUR,
221 [REG_RTC_WEEKDAY] = MAX77802_RTC_WEEKDAY,
222 [REG_RTC_MONTH] = MAX77802_RTC_MONTH,
223 [REG_RTC_YEAR] = MAX77802_RTC_YEAR,
224 [REG_RTC_DATE] = MAX77802_RTC_DATE,
225 [REG_ALARM1_SEC] = MAX77802_ALARM1_SEC,
226 [REG_ALARM1_MIN] = MAX77802_ALARM1_MIN,
227 [REG_ALARM1_HOUR] = MAX77802_ALARM1_HOUR,
228 [REG_ALARM1_WEEKDAY] = MAX77802_ALARM1_WEEKDAY,
229 [REG_ALARM1_MONTH] = MAX77802_ALARM1_MONTH,
230 [REG_ALARM1_YEAR] = MAX77802_ALARM1_YEAR,
231 [REG_ALARM1_DATE] = MAX77802_ALARM1_DATE,
232 [REG_ALARM2_SEC] = MAX77802_ALARM2_SEC,
233 [REG_ALARM2_MIN] = MAX77802_ALARM2_MIN,
234 [REG_ALARM2_HOUR] = MAX77802_ALARM2_HOUR,
235 [REG_ALARM2_WEEKDAY] = MAX77802_ALARM2_WEEKDAY,
236 [REG_ALARM2_MONTH] = MAX77802_ALARM2_MONTH,
237 [REG_ALARM2_YEAR] = MAX77802_ALARM2_YEAR,
238 [REG_ALARM2_DATE] = MAX77802_ALARM2_DATE,
239 [REG_RTC_AE1] = MAX77802_RTC_AE1,
242 static const struct regmap_irq_chip max77802_rtc_irq_chip = {
243 .name = "max77802-rtc",
244 .status_base = MAX77802_RTC_INT,
245 .mask_base = MAX77802_RTC_INTM,
247 .irqs = max77686_rtc_irqs, /* same masks as 77686 */
248 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
251 static const struct max77686_rtc_driver_data max77802_drv_data = {
255 .alarm_enable_reg = true,
256 .rtc_irq_from_platform = false,
257 .alarm_pending_status_reg = MAX77686_REG_STATUS2,
258 .rtc_i2c_addr = MAX77686_INVALID_I2C_ADDR,
259 .rtc_irq_chip = &max77802_rtc_irq_chip,
262 static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm,
263 struct max77686_rtc_info *info)
265 u8 mask = info->drv_data->mask;
267 tm->tm_sec = data[RTC_SEC] & mask;
268 tm->tm_min = data[RTC_MIN] & mask;
269 if (info->rtc_24hr_mode) {
270 tm->tm_hour = data[RTC_HOUR] & 0x1f;
272 tm->tm_hour = data[RTC_HOUR] & 0x0f;
273 if (data[RTC_HOUR] & HOUR_PM_MASK)
277 /* Only a single bit is set in data[], so fls() would be equivalent */
278 tm->tm_wday = ffs(data[RTC_WEEKDAY] & mask) - 1;
279 tm->tm_mday = data[RTC_DATE] & 0x1f;
280 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
281 tm->tm_year = data[RTC_YEAR] & mask;
286 * MAX77686 uses 1 bit from sec/min/hour/etc RTC registers and the
287 * year values are just 0..99 so add 100 to support up to 2099.
289 if (!info->drv_data->alarm_enable_reg)
293 static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data,
294 struct max77686_rtc_info *info)
296 data[RTC_SEC] = tm->tm_sec;
297 data[RTC_MIN] = tm->tm_min;
298 data[RTC_HOUR] = tm->tm_hour;
299 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
300 data[RTC_DATE] = tm->tm_mday;
301 data[RTC_MONTH] = tm->tm_mon + 1;
303 if (info->drv_data->alarm_enable_reg) {
304 data[RTC_YEAR] = tm->tm_year;
308 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
310 if (tm->tm_year < 100) {
311 dev_err(info->dev, "RTC cannot handle the year %d.\n",
319 static int max77686_rtc_update(struct max77686_rtc_info *info,
320 enum MAX77686_RTC_OP op)
324 unsigned long delay = info->drv_data->delay;
326 if (op == MAX77686_RTC_WRITE)
327 data = 1 << RTC_UDR_SHIFT;
329 data = 1 << RTC_RBUDR_SHIFT;
331 ret = regmap_update_bits(info->rtc_regmap,
332 info->drv_data->map[REG_RTC_UPDATE0],
335 dev_err(info->dev, "Fail to write update reg(ret=%d, data=0x%x)\n",
338 /* Minimum delay required before RTC update. */
339 usleep_range(delay, delay * 2);
345 static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm)
347 struct max77686_rtc_info *info = dev_get_drvdata(dev);
348 u8 data[RTC_NR_TIME];
351 mutex_lock(&info->lock);
353 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
357 ret = regmap_bulk_read(info->rtc_regmap,
358 info->drv_data->map[REG_RTC_SEC],
359 data, ARRAY_SIZE(data));
361 dev_err(info->dev, "Fail to read time reg(%d)\n", ret);
365 max77686_rtc_data_to_tm(data, tm, info);
367 ret = rtc_valid_tm(tm);
370 mutex_unlock(&info->lock);
374 static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm)
376 struct max77686_rtc_info *info = dev_get_drvdata(dev);
377 u8 data[RTC_NR_TIME];
380 ret = max77686_rtc_tm_to_data(tm, data, info);
384 mutex_lock(&info->lock);
386 ret = regmap_bulk_write(info->rtc_regmap,
387 info->drv_data->map[REG_RTC_SEC],
388 data, ARRAY_SIZE(data));
390 dev_err(info->dev, "Fail to write time reg(%d)\n", ret);
394 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
397 mutex_unlock(&info->lock);
401 static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
403 struct max77686_rtc_info *info = dev_get_drvdata(dev);
404 u8 data[RTC_NR_TIME];
406 const unsigned int *map = info->drv_data->map;
409 mutex_lock(&info->lock);
411 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
415 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
416 data, ARRAY_SIZE(data));
418 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
422 max77686_rtc_data_to_tm(data, &alrm->time, info);
426 if (info->drv_data->alarm_enable_reg) {
427 if (map[REG_RTC_AE1] == REG_RTC_NONE) {
430 "alarm enable register not set(%d)\n", ret);
434 ret = regmap_read(info->rtc_regmap, map[REG_RTC_AE1], &val);
437 "fail to read alarm enable(%d)\n", ret);
444 for (i = 0; i < ARRAY_SIZE(data); i++) {
445 if (data[i] & ALARM_ENABLE_MASK) {
454 if (info->drv_data->alarm_pending_status_reg == MAX77686_INVALID_REG)
457 ret = regmap_read(info->regmap,
458 info->drv_data->alarm_pending_status_reg, &val);
461 "Fail to read alarm pending status reg(%d)\n", ret);
465 if (val & (1 << 4)) /* RTCA1 */
469 mutex_unlock(&info->lock);
473 static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info)
475 u8 data[RTC_NR_TIME];
478 const unsigned int *map = info->drv_data->map;
480 if (!mutex_is_locked(&info->lock))
481 dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
483 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
487 if (info->drv_data->alarm_enable_reg) {
488 if (map[REG_RTC_AE1] == REG_RTC_NONE) {
491 "alarm enable register not set(%d)\n", ret);
495 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 0);
497 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
498 data, ARRAY_SIZE(data));
500 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
504 max77686_rtc_data_to_tm(data, &tm, info);
506 for (i = 0; i < ARRAY_SIZE(data); i++)
507 data[i] &= ~ALARM_ENABLE_MASK;
509 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC],
510 data, ARRAY_SIZE(data));
514 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
518 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
523 static int max77686_rtc_start_alarm(struct max77686_rtc_info *info)
525 u8 data[RTC_NR_TIME];
528 const unsigned int *map = info->drv_data->map;
530 if (!mutex_is_locked(&info->lock))
531 dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
533 ret = max77686_rtc_update(info, MAX77686_RTC_READ);
537 if (info->drv_data->alarm_enable_reg) {
538 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1],
539 MAX77802_ALARM_ENABLE_VALUE);
541 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
542 data, ARRAY_SIZE(data));
544 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
548 max77686_rtc_data_to_tm(data, &tm, info);
550 data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT);
551 data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT);
552 data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT);
553 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
554 if (data[RTC_MONTH] & 0xf)
555 data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT);
556 if (data[RTC_YEAR] & info->drv_data->mask)
557 data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT);
558 if (data[RTC_DATE] & 0x1f)
559 data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT);
561 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC],
562 data, ARRAY_SIZE(data));
566 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
570 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
575 static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
577 struct max77686_rtc_info *info = dev_get_drvdata(dev);
578 u8 data[RTC_NR_TIME];
581 ret = max77686_rtc_tm_to_data(&alrm->time, data, info);
585 mutex_lock(&info->lock);
587 ret = max77686_rtc_stop_alarm(info);
591 ret = regmap_bulk_write(info->rtc_regmap,
592 info->drv_data->map[REG_ALARM1_SEC],
593 data, ARRAY_SIZE(data));
596 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
600 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
605 ret = max77686_rtc_start_alarm(info);
607 mutex_unlock(&info->lock);
611 static int max77686_rtc_alarm_irq_enable(struct device *dev,
612 unsigned int enabled)
614 struct max77686_rtc_info *info = dev_get_drvdata(dev);
617 mutex_lock(&info->lock);
619 ret = max77686_rtc_start_alarm(info);
621 ret = max77686_rtc_stop_alarm(info);
622 mutex_unlock(&info->lock);
627 static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data)
629 struct max77686_rtc_info *info = data;
631 dev_dbg(info->dev, "RTC alarm IRQ: %d\n", irq);
633 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
638 static const struct rtc_class_ops max77686_rtc_ops = {
639 .read_time = max77686_rtc_read_time,
640 .set_time = max77686_rtc_set_time,
641 .read_alarm = max77686_rtc_read_alarm,
642 .set_alarm = max77686_rtc_set_alarm,
643 .alarm_irq_enable = max77686_rtc_alarm_irq_enable,
646 static int max77686_rtc_init_reg(struct max77686_rtc_info *info)
651 /* Set RTC control register : Binary mode, 24hour mdoe */
652 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
653 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
655 info->rtc_24hr_mode = 1;
657 ret = regmap_bulk_write(info->rtc_regmap,
658 info->drv_data->map[REG_RTC_CONTROLM],
659 data, ARRAY_SIZE(data));
661 dev_err(info->dev, "Fail to write controlm reg(%d)\n", ret);
665 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
669 static const struct regmap_config max77686_rtc_regmap_config = {
674 static int max77686_init_rtc_regmap(struct max77686_rtc_info *info)
676 struct device *parent = info->dev->parent;
677 struct i2c_client *parent_i2c = to_i2c_client(parent);
680 if (info->drv_data->rtc_irq_from_platform) {
681 struct platform_device *pdev = to_platform_device(info->dev);
683 info->rtc_irq = platform_get_irq(pdev, 0);
684 if (info->rtc_irq < 0) {
685 dev_err(info->dev, "Failed to get rtc interrupts: %d\n",
687 return info->rtc_irq;
690 info->rtc_irq = parent_i2c->irq;
693 info->regmap = dev_get_regmap(parent, NULL);
695 dev_err(info->dev, "Failed to get rtc regmap\n");
699 if (info->drv_data->rtc_i2c_addr == MAX77686_INVALID_I2C_ADDR) {
700 info->rtc_regmap = info->regmap;
704 info->rtc = i2c_new_dummy(parent_i2c->adapter,
705 info->drv_data->rtc_i2c_addr);
707 dev_err(info->dev, "Failed to allocate I2C device for RTC\n");
711 info->rtc_regmap = devm_regmap_init_i2c(info->rtc,
712 &max77686_rtc_regmap_config);
713 if (IS_ERR(info->rtc_regmap)) {
714 ret = PTR_ERR(info->rtc_regmap);
715 dev_err(info->dev, "Failed to allocate RTC regmap: %d\n", ret);
716 goto err_unregister_i2c;
720 ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq,
721 IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
722 IRQF_SHARED, 0, info->drv_data->rtc_irq_chip,
723 &info->rtc_irq_data);
725 dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret);
726 goto err_unregister_i2c;
733 i2c_unregister_device(info->rtc);
737 static int max77686_rtc_probe(struct platform_device *pdev)
739 struct max77686_rtc_info *info;
740 const struct platform_device_id *id = platform_get_device_id(pdev);
743 info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info),
748 mutex_init(&info->lock);
749 info->dev = &pdev->dev;
750 info->drv_data = (const struct max77686_rtc_driver_data *)
753 ret = max77686_init_rtc_regmap(info);
757 platform_set_drvdata(pdev, info);
759 ret = max77686_rtc_init_reg(info);
761 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret);
765 device_init_wakeup(&pdev->dev, 1);
767 info->rtc_dev = devm_rtc_device_register(&pdev->dev, id->name,
768 &max77686_rtc_ops, THIS_MODULE);
770 if (IS_ERR(info->rtc_dev)) {
771 ret = PTR_ERR(info->rtc_dev);
772 dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
778 info->virq = regmap_irq_get_virq(info->rtc_irq_data,
779 MAX77686_RTCIRQ_RTCA1);
780 if (info->virq <= 0) {
785 ret = request_threaded_irq(info->virq, NULL, max77686_rtc_alarm_irq, 0,
788 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
796 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data);
798 i2c_unregister_device(info->rtc);
803 static int max77686_rtc_remove(struct platform_device *pdev)
805 struct max77686_rtc_info *info = platform_get_drvdata(pdev);
807 free_irq(info->virq, info);
808 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data);
810 i2c_unregister_device(info->rtc);
815 #ifdef CONFIG_PM_SLEEP
816 static int max77686_rtc_suspend(struct device *dev)
818 if (device_may_wakeup(dev)) {
819 struct max77686_rtc_info *info = dev_get_drvdata(dev);
821 return enable_irq_wake(info->virq);
827 static int max77686_rtc_resume(struct device *dev)
829 if (device_may_wakeup(dev)) {
830 struct max77686_rtc_info *info = dev_get_drvdata(dev);
832 return disable_irq_wake(info->virq);
839 static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops,
840 max77686_rtc_suspend, max77686_rtc_resume);
842 static const struct platform_device_id rtc_id[] = {
843 { "max77686-rtc", .driver_data = (kernel_ulong_t)&max77686_drv_data, },
844 { "max77802-rtc", .driver_data = (kernel_ulong_t)&max77802_drv_data, },
845 { "max77620-rtc", .driver_data = (kernel_ulong_t)&max77620_drv_data, },
848 MODULE_DEVICE_TABLE(platform, rtc_id);
850 static struct platform_driver max77686_rtc_driver = {
852 .name = "max77686-rtc",
853 .pm = &max77686_rtc_pm_ops,
855 .probe = max77686_rtc_probe,
856 .remove = max77686_rtc_remove,
860 module_platform_driver(max77686_rtc_driver);
862 MODULE_DESCRIPTION("Maxim MAX77686 RTC driver");
864 MODULE_LICENSE("GPL");