2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/scatterlist.h>
47 #include <linux/spinlock.h>
48 #include <linux/workqueue.h>
52 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
54 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
55 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
58 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
60 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
61 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
64 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
66 sd_ctrl_write32(host, CTL_STATUS, ~i);
69 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
71 host->sg_len = data->sg_len;
72 host->sg_ptr = data->sg;
73 host->sg_orig = data->sg;
77 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
79 host->sg_ptr = sg_next(host->sg_ptr);
81 return --host->sg_len;
84 #ifdef CONFIG_MMC_DEBUG
86 #define STATUS_TO_TEXT(a, status, i) \
88 if (status & TMIO_STAT_##a) { \
95 static void pr_debug_status(u32 status)
98 pr_debug("status: %08x = ", status);
99 STATUS_TO_TEXT(CARD_REMOVE, status, i);
100 STATUS_TO_TEXT(CARD_INSERT, status, i);
101 STATUS_TO_TEXT(SIGSTATE, status, i);
102 STATUS_TO_TEXT(WRPROTECT, status, i);
103 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
104 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
105 STATUS_TO_TEXT(SIGSTATE_A, status, i);
106 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
107 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
108 STATUS_TO_TEXT(ILL_FUNC, status, i);
109 STATUS_TO_TEXT(CMD_BUSY, status, i);
110 STATUS_TO_TEXT(CMDRESPEND, status, i);
111 STATUS_TO_TEXT(DATAEND, status, i);
112 STATUS_TO_TEXT(CRCFAIL, status, i);
113 STATUS_TO_TEXT(DATATIMEOUT, status, i);
114 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
115 STATUS_TO_TEXT(RXOVERFLOW, status, i);
116 STATUS_TO_TEXT(TXUNDERRUN, status, i);
117 STATUS_TO_TEXT(RXRDY, status, i);
118 STATUS_TO_TEXT(TXRQ, status, i);
119 STATUS_TO_TEXT(ILL_ACCESS, status, i);
124 #define pr_debug_status(s) do { } while (0)
127 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
129 struct tmio_mmc_host *host = mmc_priv(mmc);
132 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
133 ~TMIO_SDIO_STAT_IOIRQ;
134 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
135 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
137 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
138 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
139 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
143 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
148 for (clock = host->mmc->f_min, clk = 0x80000080;
149 new_clock >= (clock<<1); clk >>= 1)
154 if (host->set_clk_div)
155 host->set_clk_div(host->pdev, (clk>>22) & 1);
157 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
160 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
162 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
164 /* implicit BUG_ON(!res) */
165 if (resource_size(res) > 0x100) {
166 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
170 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
171 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
175 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
177 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
179 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
180 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
183 /* implicit BUG_ON(!res) */
184 if (resource_size(res) > 0x100) {
185 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
190 static void tmio_mmc_reset(struct tmio_mmc_host *host)
192 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
194 /* FIXME - should we set stop clock reg here */
195 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
196 /* implicit BUG_ON(!res) */
197 if (resource_size(res) > 0x100)
198 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
200 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
201 if (resource_size(res) > 0x100)
202 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
206 static void tmio_mmc_reset_work(struct work_struct *work)
208 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
209 delayed_reset_work.work);
210 struct mmc_request *mrq;
213 spin_lock_irqsave(&host->lock, flags);
217 * is request already finished? Since we use a non-blocking
218 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
219 * us, so, have to check for IS_ERR(host->mrq)
221 if (IS_ERR_OR_NULL(mrq)
222 || time_is_after_jiffies(host->last_req_ts +
223 msecs_to_jiffies(2000))) {
224 spin_unlock_irqrestore(&host->lock, flags);
228 dev_warn(&host->pdev->dev,
229 "timeout waiting for hardware interrupt (CMD%u)\n",
233 host->data->error = -ETIMEDOUT;
235 host->cmd->error = -ETIMEDOUT;
237 mrq->cmd->error = -ETIMEDOUT;
241 host->force_pio = false;
243 spin_unlock_irqrestore(&host->lock, flags);
245 tmio_mmc_reset(host);
247 /* Ready for new calls */
250 tmio_mmc_abort_dma(host);
251 mmc_request_done(host->mmc, mrq);
254 /* called with host->lock held, interrupts disabled */
255 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
257 struct mmc_request *mrq;
260 spin_lock_irqsave(&host->lock, flags);
263 if (IS_ERR_OR_NULL(mrq)) {
264 spin_unlock_irqrestore(&host->lock, flags);
270 host->force_pio = false;
272 cancel_delayed_work(&host->delayed_reset_work);
275 spin_unlock_irqrestore(&host->lock, flags);
277 if (mrq->cmd->error || (mrq->data && mrq->data->error))
278 tmio_mmc_abort_dma(host);
280 mmc_request_done(host->mmc, mrq);
283 static void tmio_mmc_done_work(struct work_struct *work)
285 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
287 tmio_mmc_finish_request(host);
290 /* These are the bitmasks the tmio chip requires to implement the MMC response
291 * types. Note that R1 and R6 are the same in this scheme. */
292 #define APP_CMD 0x0040
293 #define RESP_NONE 0x0300
294 #define RESP_R1 0x0400
295 #define RESP_R1B 0x0500
296 #define RESP_R2 0x0600
297 #define RESP_R3 0x0700
298 #define DATA_PRESENT 0x0800
299 #define TRANSFER_READ 0x1000
300 #define TRANSFER_MULTI 0x2000
301 #define SECURITY_CMD 0x4000
303 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
305 struct mmc_data *data = host->data;
307 u32 irq_mask = TMIO_MASK_CMD;
309 /* CMD12 is handled by hardware */
310 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
311 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
315 switch (mmc_resp_type(cmd)) {
316 case MMC_RSP_NONE: c |= RESP_NONE; break;
317 case MMC_RSP_R1: c |= RESP_R1; break;
318 case MMC_RSP_R1B: c |= RESP_R1B; break;
319 case MMC_RSP_R2: c |= RESP_R2; break;
320 case MMC_RSP_R3: c |= RESP_R3; break;
322 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
328 /* FIXME - this seems to be ok commented out but the spec suggest this bit
329 * should be set when issuing app commands.
330 * if(cmd->flags & MMC_FLAG_ACMD)
335 if (data->blocks > 1) {
336 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
339 if (data->flags & MMC_DATA_READ)
343 if (!host->native_hotplug)
344 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
345 tmio_mmc_enable_mmc_irqs(host, irq_mask);
347 /* Fire off the command */
348 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
349 sd_ctrl_write16(host, CTL_SD_CMD, c);
355 * This chip always returns (at least?) as much data as you ask for.
356 * I'm unsure what happens if you ask for less than a block. This should be
357 * looked into to ensure that a funny length read doesn't hose the controller.
359 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
361 struct mmc_data *data = host->data;
367 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
368 pr_err("PIO IRQ in DMA mode!\n");
371 pr_debug("Spurious PIO IRQ\n");
375 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
376 buf = (unsigned short *)(sg_virt + host->sg_off);
378 count = host->sg_ptr->length - host->sg_off;
379 if (count > data->blksz)
382 pr_debug("count: %08x offset: %08x flags %08x\n",
383 count, host->sg_off, data->flags);
385 /* Transfer the data */
386 if (data->flags & MMC_DATA_READ)
387 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
389 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
391 host->sg_off += count;
393 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
395 if (host->sg_off == host->sg_ptr->length)
396 tmio_mmc_next_sg(host);
401 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
403 if (host->sg_ptr == &host->bounce_sg) {
405 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
406 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
407 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
411 /* needs to be called with host->lock held */
412 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
414 struct mmc_data *data = host->data;
415 struct mmc_command *stop;
420 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
425 /* FIXME - return correct transfer count on errors */
427 data->bytes_xfered = data->blocks * data->blksz;
429 data->bytes_xfered = 0;
431 pr_debug("Completed data request\n");
434 * FIXME: other drivers allow an optional stop command of any given type
435 * which we dont do, as the chip can auto generate them.
436 * Perhaps we can be smarter about when to use auto CMD12 and
437 * only issue the auto request when we know this is the desired
438 * stop command, allowing fallback to the stop command the
439 * upper layers expect. For now, we do what works.
442 if (data->flags & MMC_DATA_READ) {
443 if (host->chan_rx && !host->force_pio)
444 tmio_mmc_check_bounce_buffer(host);
445 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
448 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
453 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
454 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
459 schedule_work(&host->done);
462 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
464 struct mmc_data *data;
465 spin_lock(&host->lock);
471 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
473 * Has all data been written out yet? Testing on SuperH showed,
474 * that in most cases the first interrupt comes already with the
475 * BUSY status bit clear, but on some operations, like mount or
476 * in the beginning of a write / sync / umount, there is one
477 * DATAEND interrupt with the BUSY bit set, in this cases
478 * waiting for one more interrupt fixes the problem.
480 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
481 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
482 tasklet_schedule(&host->dma_complete);
484 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
485 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
486 tasklet_schedule(&host->dma_complete);
488 tmio_mmc_do_data_irq(host);
489 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
492 spin_unlock(&host->lock);
495 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
498 struct mmc_command *cmd = host->cmd;
501 spin_lock(&host->lock);
504 pr_debug("Spurious CMD irq\n");
510 /* This controller is sicker than the PXA one. Not only do we need to
511 * drop the top 8 bits of the first response word, we also need to
512 * modify the order of the response for short response command types.
515 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
516 cmd->resp[i] = sd_ctrl_read32(host, addr);
518 if (cmd->flags & MMC_RSP_136) {
519 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
520 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
521 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
523 } else if (cmd->flags & MMC_RSP_R3) {
524 cmd->resp[0] = cmd->resp[3];
527 if (stat & TMIO_STAT_CMDTIMEOUT)
528 cmd->error = -ETIMEDOUT;
529 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
530 cmd->error = -EILSEQ;
532 /* If there is data to handle we enable data IRQs here, and
533 * we will ultimatley finish the request in the data_end handler.
534 * If theres no data or we encountered an error, finish now.
536 if (host->data && !cmd->error) {
537 if (host->data->flags & MMC_DATA_READ) {
538 if (host->force_pio || !host->chan_rx)
539 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
541 tasklet_schedule(&host->dma_issue);
543 if (host->force_pio || !host->chan_tx)
544 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
546 tasklet_schedule(&host->dma_issue);
549 schedule_work(&host->done);
553 spin_unlock(&host->lock);
556 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
557 int *ireg, int *status)
559 *status = sd_ctrl_read32(host, CTL_STATUS);
560 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
562 pr_debug_status(*status);
563 pr_debug_status(*ireg);
566 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
567 int ireg, int status)
569 struct mmc_host *mmc = host->mmc;
571 /* Card insert / remove attempts */
572 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
573 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
574 TMIO_STAT_CARD_REMOVE);
575 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
576 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
577 !work_pending(&mmc->detect.work))
578 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
585 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
587 unsigned int ireg, status;
588 struct tmio_mmc_host *host = devid;
590 tmio_mmc_card_irq_status(host, &ireg, &status);
591 __tmio_mmc_card_detect_irq(host, ireg, status);
595 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
597 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
598 int ireg, int status)
600 /* Command completion */
601 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
602 tmio_mmc_ack_mmc_irqs(host,
603 TMIO_STAT_CMDRESPEND |
604 TMIO_STAT_CMDTIMEOUT);
605 tmio_mmc_cmd_irq(host, status);
610 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
611 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
612 tmio_mmc_pio_irq(host);
616 /* Data transfer completion */
617 if (ireg & TMIO_STAT_DATAEND) {
618 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
619 tmio_mmc_data_irq(host);
626 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
628 unsigned int ireg, status;
629 struct tmio_mmc_host *host = devid;
631 tmio_mmc_card_irq_status(host, &ireg, &status);
632 __tmio_mmc_sdcard_irq(host, ireg, status);
636 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
638 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
640 struct tmio_mmc_host *host = devid;
641 struct mmc_host *mmc = host->mmc;
642 struct tmio_mmc_data *pdata = host->pdata;
643 unsigned int ireg, status;
645 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
648 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
649 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
651 sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
653 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
654 mmc_signal_sdio_irq(mmc);
658 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
660 irqreturn_t tmio_mmc_irq(int irq, void *devid)
662 struct tmio_mmc_host *host = devid;
663 unsigned int ireg, status;
665 pr_debug("MMC IRQ begin\n");
667 tmio_mmc_card_irq_status(host, &ireg, &status);
668 if (__tmio_mmc_card_detect_irq(host, ireg, status))
670 if (__tmio_mmc_sdcard_irq(host, ireg, status))
673 tmio_mmc_sdio_irq(irq, devid);
677 EXPORT_SYMBOL(tmio_mmc_irq);
679 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
680 struct mmc_data *data)
682 struct tmio_mmc_data *pdata = host->pdata;
684 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
685 data->blksz, data->blocks);
687 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
688 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
689 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
691 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
692 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
693 mmc_hostname(host->mmc), data->blksz);
698 tmio_mmc_init_sg(host, data);
701 /* Set transfer length / blocksize */
702 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
703 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
705 tmio_mmc_start_dma(host, data);
710 /* Process requests from the MMC layer */
711 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
713 struct tmio_mmc_host *host = mmc_priv(mmc);
717 spin_lock_irqsave(&host->lock, flags);
720 pr_debug("request not null\n");
721 if (IS_ERR(host->mrq)) {
722 spin_unlock_irqrestore(&host->lock, flags);
723 mrq->cmd->error = -EAGAIN;
724 mmc_request_done(mmc, mrq);
729 host->last_req_ts = jiffies;
733 spin_unlock_irqrestore(&host->lock, flags);
736 ret = tmio_mmc_start_data(host, mrq->data);
741 ret = tmio_mmc_start_command(host, mrq->cmd);
743 schedule_delayed_work(&host->delayed_reset_work,
744 msecs_to_jiffies(2000));
749 host->force_pio = false;
751 mrq->cmd->error = ret;
752 mmc_request_done(mmc, mrq);
755 static int tmio_mmc_clk_update(struct mmc_host *mmc)
757 struct tmio_mmc_host *host = mmc_priv(mmc);
758 struct tmio_mmc_data *pdata = host->pdata;
761 if (!pdata->clk_enable)
764 ret = pdata->clk_enable(host->pdev, &mmc->f_max);
766 mmc->f_min = mmc->f_max / 512;
771 static void tmio_mmc_set_power(struct tmio_mmc_host *host, struct mmc_ios *ios)
773 struct mmc_host *mmc = host->mmc;
776 host->set_pwr(host->pdev, ios->power_mode != MMC_POWER_OFF);
777 if (!IS_ERR(mmc->supply.vmmc))
778 /* Errors ignored... */
779 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc,
780 ios->power_mode ? ios->vdd : 0);
783 /* Set MMC clock / power.
784 * Note: This controller uses a simple divider scheme therefore it cannot
785 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
786 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
789 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
791 struct tmio_mmc_host *host = mmc_priv(mmc);
792 struct device *dev = &host->pdev->dev;
795 mutex_lock(&host->ios_lock);
797 spin_lock_irqsave(&host->lock, flags);
799 if (IS_ERR(host->mrq)) {
801 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
802 current->comm, task_pid_nr(current),
803 ios->clock, ios->power_mode);
804 host->mrq = ERR_PTR(-EINTR);
807 "%s.%d: CMD%u active since %lu, now %lu!\n",
808 current->comm, task_pid_nr(current),
809 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
811 spin_unlock_irqrestore(&host->lock, flags);
813 mutex_unlock(&host->ios_lock);
817 host->mrq = ERR_PTR(-EBUSY);
819 spin_unlock_irqrestore(&host->lock, flags);
822 * host->power toggles between false and true in both cases - either
823 * or not the controller can be runtime-suspended during inactivity.
824 * But if the controller has to be kept on, the runtime-pm usage_count
825 * is kept positive, so no suspending actually takes place.
827 if (ios->power_mode == MMC_POWER_ON && ios->clock) {
829 tmio_mmc_clk_update(mmc);
830 pm_runtime_get_sync(dev);
833 tmio_mmc_set_clock(host, ios->clock);
834 /* power up SD bus */
835 tmio_mmc_set_power(host, ios);
836 /* start bus clock */
837 tmio_mmc_clk_start(host);
838 } else if (ios->power_mode != MMC_POWER_UP) {
839 if (ios->power_mode == MMC_POWER_OFF)
840 tmio_mmc_set_power(host, ios);
842 struct tmio_mmc_data *pdata = host->pdata;
843 tmio_mmc_clk_stop(host);
846 if (pdata->clk_disable)
847 pdata->clk_disable(host->pdev);
852 switch (ios->bus_width) {
853 case MMC_BUS_WIDTH_1:
854 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
856 case MMC_BUS_WIDTH_4:
857 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
862 /* Let things settle. delay taken from winCE driver */
864 if (PTR_ERR(host->mrq) == -EINTR)
865 dev_dbg(&host->pdev->dev,
866 "%s.%d: IOS interrupted: clk %u, mode %u",
867 current->comm, task_pid_nr(current),
868 ios->clock, ios->power_mode);
871 mutex_unlock(&host->ios_lock);
874 static int tmio_mmc_get_ro(struct mmc_host *mmc)
876 struct tmio_mmc_host *host = mmc_priv(mmc);
877 struct tmio_mmc_data *pdata = host->pdata;
879 return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
880 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
883 static int tmio_mmc_get_cd(struct mmc_host *mmc)
885 struct tmio_mmc_host *host = mmc_priv(mmc);
886 struct tmio_mmc_data *pdata = host->pdata;
891 return pdata->get_cd(host->pdev);
894 static const struct mmc_host_ops tmio_mmc_ops = {
895 .request = tmio_mmc_request,
896 .set_ios = tmio_mmc_set_ios,
897 .get_ro = tmio_mmc_get_ro,
898 .get_cd = tmio_mmc_get_cd,
899 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
902 static void tmio_mmc_init_ocr(struct tmio_mmc_host *host)
904 struct tmio_mmc_data *pdata = host->pdata;
905 struct mmc_host *mmc = host->mmc;
907 mmc_regulator_get_supply(mmc);
910 mmc->ocr_avail = pdata->ocr_mask ? : MMC_VDD_32_33 | MMC_VDD_33_34;
911 else if (pdata->ocr_mask)
912 dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n");
915 int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host,
916 struct platform_device *pdev,
917 struct tmio_mmc_data *pdata)
919 struct tmio_mmc_host *_host;
920 struct mmc_host *mmc;
921 struct resource *res_ctl;
923 u32 irq_mask = TMIO_MASK_CMD;
925 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
929 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
933 pdata->dev = &pdev->dev;
934 _host = mmc_priv(mmc);
935 _host->pdata = pdata;
938 platform_set_drvdata(pdev, mmc);
940 _host->set_pwr = pdata->set_pwr;
941 _host->set_clk_div = pdata->set_clk_div;
943 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
944 _host->bus_shift = resource_size(res_ctl) >> 10;
946 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
952 mmc->ops = &tmio_mmc_ops;
953 mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities;
954 mmc->caps2 = pdata->capabilities2;
956 mmc->max_blk_size = 512;
957 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
959 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
960 mmc->max_seg_size = mmc->max_req_size;
961 tmio_mmc_init_ocr(_host);
963 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
964 mmc->caps & MMC_CAP_NEEDS_POLL ||
965 mmc->caps & MMC_CAP_NONREMOVABLE);
967 _host->power = false;
968 pm_runtime_enable(&pdev->dev);
969 ret = pm_runtime_resume(&pdev->dev);
973 if (tmio_mmc_clk_update(mmc) < 0) {
974 mmc->f_max = pdata->hclk;
975 mmc->f_min = mmc->f_max / 512;
979 * There are 4 different scenarios for the card detection:
980 * 1) an external gpio irq handles the cd (best for power savings)
981 * 2) internal sdhi irq handles the cd
982 * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
983 * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
985 * While we increment the runtime PM counter for all scenarios when
986 * the mmc core activates us by calling an appropriate set_ios(), we
987 * must additionally ensure that in case 2) the tmio mmc hardware stays
988 * powered on during runtime for the card detection to work.
990 if (_host->native_hotplug)
991 pm_runtime_get_noresume(&pdev->dev);
993 tmio_mmc_clk_stop(_host);
994 tmio_mmc_reset(_host);
996 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
997 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
999 /* Unmask the IRQs we want to know about */
1000 if (!_host->chan_rx)
1001 irq_mask |= TMIO_MASK_READOP;
1002 if (!_host->chan_tx)
1003 irq_mask |= TMIO_MASK_WRITEOP;
1004 if (!_host->native_hotplug)
1005 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1007 _host->sdcard_irq_mask &= ~irq_mask;
1009 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1010 tmio_mmc_enable_sdio_irq(mmc, 0);
1012 spin_lock_init(&_host->lock);
1013 mutex_init(&_host->ios_lock);
1015 /* Init delayed work for request timeouts */
1016 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1017 INIT_WORK(&_host->done, tmio_mmc_done_work);
1019 /* See if we also get DMA */
1020 tmio_mmc_request_dma(_host, pdata);
1022 ret = mmc_add_host(mmc);
1023 if (pdata->clk_disable)
1024 pdata->clk_disable(pdev);
1026 tmio_mmc_host_remove(_host);
1030 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1032 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1033 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio);
1035 tmio_mmc_host_remove(_host);
1045 pm_runtime_disable(&pdev->dev);
1046 iounmap(_host->ctl);
1052 EXPORT_SYMBOL(tmio_mmc_host_probe);
1054 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1056 struct platform_device *pdev = host->pdev;
1057 struct tmio_mmc_data *pdata = host->pdata;
1058 struct mmc_host *mmc = host->mmc;
1060 if (pdata->flags & TMIO_MMC_USE_GPIO_CD)
1062 * This means we can miss a card-eject, but this is anyway
1063 * possible, because of delayed processing of hotplug events.
1065 mmc_gpio_free_cd(mmc);
1067 if (!host->native_hotplug)
1068 pm_runtime_get_sync(&pdev->dev);
1070 dev_pm_qos_hide_latency_limit(&pdev->dev);
1072 mmc_remove_host(mmc);
1073 cancel_work_sync(&host->done);
1074 cancel_delayed_work_sync(&host->delayed_reset_work);
1075 tmio_mmc_release_dma(host);
1077 pm_runtime_put_sync(&pdev->dev);
1078 pm_runtime_disable(&pdev->dev);
1083 EXPORT_SYMBOL(tmio_mmc_host_remove);
1086 int tmio_mmc_host_suspend(struct device *dev)
1088 struct mmc_host *mmc = dev_get_drvdata(dev);
1089 struct tmio_mmc_host *host = mmc_priv(mmc);
1090 int ret = mmc_suspend_host(mmc);
1093 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1097 EXPORT_SYMBOL(tmio_mmc_host_suspend);
1099 int tmio_mmc_host_resume(struct device *dev)
1101 struct mmc_host *mmc = dev_get_drvdata(dev);
1102 struct tmio_mmc_host *host = mmc_priv(mmc);
1104 tmio_mmc_reset(host);
1105 tmio_mmc_enable_dma(host, true);
1107 /* The MMC core will perform the complete set up */
1108 return mmc_resume_host(mmc);
1110 EXPORT_SYMBOL(tmio_mmc_host_resume);
1112 #endif /* CONFIG_PM */
1114 int tmio_mmc_host_runtime_suspend(struct device *dev)
1118 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1120 int tmio_mmc_host_runtime_resume(struct device *dev)
1122 struct mmc_host *mmc = dev_get_drvdata(dev);
1123 struct tmio_mmc_host *host = mmc_priv(mmc);
1125 tmio_mmc_reset(host);
1126 tmio_mmc_enable_dma(host, true);
1130 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1132 MODULE_LICENSE("GPL v2");