2 * PCA953x 4/8/16/24/40 bit I/O ports
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/acpi.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/slab.h>
27 #include <asm/unaligned.h>
29 #define PCA953X_INPUT 0x00
30 #define PCA953X_OUTPUT 0x01
31 #define PCA953X_INVERT 0x02
32 #define PCA953X_DIRECTION 0x03
34 #define REG_ADDR_MASK 0x3f
35 #define REG_ADDR_EXT 0x40
36 #define REG_ADDR_AI 0x80
38 #define PCA957X_IN 0x00
39 #define PCA957X_INVRT 0x01
40 #define PCA957X_BKEN 0x02
41 #define PCA957X_PUPD 0x03
42 #define PCA957X_CFG 0x04
43 #define PCA957X_OUT 0x05
44 #define PCA957X_MSK 0x06
45 #define PCA957X_INTS 0x07
47 #define PCAL953X_OUT_STRENGTH 0x20
48 #define PCAL953X_IN_LATCH 0x22
49 #define PCAL953X_PULL_EN 0x23
50 #define PCAL953X_PULL_SEL 0x24
51 #define PCAL953X_INT_MASK 0x25
52 #define PCAL953X_INT_STAT 0x26
53 #define PCAL953X_OUT_CONF 0x27
55 #define PCAL6524_INT_EDGE 0x28
56 #define PCAL6524_INT_CLR 0x2a
57 #define PCAL6524_IN_STATUS 0x2b
58 #define PCAL6524_OUT_INDCONF 0x2c
59 #define PCAL6524_DEBOUNCE 0x2d
61 #define PCA_GPIO_MASK 0x00FF
63 #define PCAL_GPIO_MASK 0x1f
64 #define PCAL_PINCTRL_MASK 0x60
66 #define PCA_INT 0x0100
67 #define PCA_PCAL 0x0200
68 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
69 #define PCA953X_TYPE 0x1000
70 #define PCA957X_TYPE 0x2000
71 #define PCA_TYPE_MASK 0xF000
73 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
75 static const struct i2c_device_id pca953x_id[] = {
76 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
77 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
78 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
79 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
80 { "pca9536", 4 | PCA953X_TYPE, },
81 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
82 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
83 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
84 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
85 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
86 { "pca9556", 8 | PCA953X_TYPE, },
87 { "pca9557", 8 | PCA953X_TYPE, },
88 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
89 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
90 { "pca9698", 40 | PCA953X_TYPE, },
92 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
93 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
94 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
96 { "max7310", 8 | PCA953X_TYPE, },
97 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
98 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
99 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
100 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
101 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
102 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
103 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
104 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
105 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
106 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
107 { "xra1202", 8 | PCA953X_TYPE },
110 MODULE_DEVICE_TABLE(i2c, pca953x_id);
112 static const struct acpi_device_id pca953x_acpi_ids[] = {
113 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
116 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
121 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
123 struct pca953x_reg_config {
130 static const struct pca953x_reg_config pca953x_regs = {
131 .direction = PCA953X_DIRECTION,
132 .output = PCA953X_OUTPUT,
133 .input = PCA953X_INPUT,
134 .invert = PCA953X_INVERT,
137 static const struct pca953x_reg_config pca957x_regs = {
138 .direction = PCA957X_CFG,
139 .output = PCA957X_OUT,
141 .invert = PCA957X_INVRT,
144 struct pca953x_chip {
146 struct mutex i2c_lock;
147 struct regmap *regmap;
149 #ifdef CONFIG_GPIO_PCA953X_IRQ
150 struct mutex irq_lock;
151 u8 irq_mask[MAX_BANK];
152 u8 irq_stat[MAX_BANK];
153 u8 irq_trig_raise[MAX_BANK];
154 u8 irq_trig_fall[MAX_BANK];
155 struct irq_chip irq_chip;
157 atomic_t wakeup_path;
159 struct i2c_client *client;
160 struct gpio_chip gpio_chip;
161 const char *const *names;
162 unsigned long driver_data;
163 struct regulator *regulator;
165 const struct pca953x_reg_config *regs;
168 static int pca953x_bank_shift(struct pca953x_chip *chip)
170 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
173 #define PCA953x_BANK_INPUT BIT(0)
174 #define PCA953x_BANK_OUTPUT BIT(1)
175 #define PCA953x_BANK_POLARITY BIT(2)
176 #define PCA953x_BANK_CONFIG BIT(3)
178 #define PCA957x_BANK_INPUT BIT(0)
179 #define PCA957x_BANK_POLARITY BIT(1)
180 #define PCA957x_BANK_BUSHOLD BIT(2)
181 #define PCA957x_BANK_CONFIG BIT(4)
182 #define PCA957x_BANK_OUTPUT BIT(5)
184 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
185 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
186 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
187 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
188 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
191 * We care about the following registers:
192 * - Standard set, below 0x40, each port can be replicated up to 8 times
194 * Input port 0x00 + 0 * bank_size R
195 * Output port 0x00 + 1 * bank_size RW
196 * Polarity Inversion port 0x00 + 2 * bank_size RW
197 * Configuration port 0x00 + 3 * bank_size RW
198 * - PCA957x with mixed up registers
199 * Input port 0x00 + 0 * bank_size R
200 * Polarity Inversion port 0x00 + 1 * bank_size RW
201 * Bus hold port 0x00 + 2 * bank_size RW
202 * Configuration port 0x00 + 4 * bank_size RW
203 * Output port 0x00 + 5 * bank_size RW
205 * - Extended set, above 0x40, often chip specific.
206 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
207 * Input latch register 0x40 + 2 * bank_size RW
208 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
209 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
210 * Interrupt mask register 0x40 + 5 * bank_size RW
211 * Interrupt status register 0x40 + 6 * bank_size R
213 * - Registers with bit 0x80 set, the AI bit
214 * The bit is cleared and the registers fall into one of the
218 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
221 int bank_shift = pca953x_bank_shift(chip);
222 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
223 int offset = reg & (BIT(bank_shift) - 1);
225 /* Special PCAL extended register check. */
226 if (reg & REG_ADDR_EXT) {
227 if (!(chip->driver_data & PCA_PCAL))
232 /* Register is not in the matching bank. */
233 if (!(BIT(bank) & checkbank))
236 /* Register is not within allowed range of bank. */
237 if (offset >= NBANK(chip))
243 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
245 struct pca953x_chip *chip = dev_get_drvdata(dev);
248 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
249 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
250 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
252 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
253 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
254 PCA957x_BANK_BUSHOLD;
257 if (chip->driver_data & PCA_PCAL) {
258 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
259 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
260 PCAL9xxx_BANK_IRQ_STAT;
263 return pca953x_check_register(chip, reg, bank);
266 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
268 struct pca953x_chip *chip = dev_get_drvdata(dev);
271 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
272 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
275 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
276 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
279 if (chip->driver_data & PCA_PCAL)
280 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
281 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
283 return pca953x_check_register(chip, reg, bank);
286 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
288 struct pca953x_chip *chip = dev_get_drvdata(dev);
291 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
292 bank = PCA953x_BANK_INPUT;
294 bank = PCA957x_BANK_INPUT;
296 if (chip->driver_data & PCA_PCAL)
297 bank |= PCAL9xxx_BANK_IRQ_STAT;
299 return pca953x_check_register(chip, reg, bank);
302 static const struct regmap_config pca953x_i2c_regmap = {
306 .readable_reg = pca953x_readable_register,
307 .writeable_reg = pca953x_writeable_register,
308 .volatile_reg = pca953x_volatile_register,
310 .cache_type = REGCACHE_RBTREE,
311 .max_register = 0x7f,
314 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
315 bool write, bool addrinc)
317 int bank_shift = pca953x_bank_shift(chip);
318 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
319 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
320 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
322 /* Single byte read doesn't need AI bit set. */
326 /* Chips with 24 and more GPIOs always support Auto Increment */
327 if (write && NBANK(chip) > 2)
328 regaddr |= REG_ADDR_AI;
330 /* PCA9575 needs address-increment on multi-byte writes */
331 if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
332 regaddr |= REG_ADDR_AI;
337 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
339 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
342 ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
344 dev_err(&chip->client->dev, "failed writing register\n");
351 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
353 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
356 ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
358 dev_err(&chip->client->dev, "failed reading register\n");
365 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
367 struct pca953x_chip *chip = gpiochip_get_data(gc);
368 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
370 u8 bit = BIT(off % BANK_SZ);
373 mutex_lock(&chip->i2c_lock);
374 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
375 mutex_unlock(&chip->i2c_lock);
379 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
380 unsigned off, int val)
382 struct pca953x_chip *chip = gpiochip_get_data(gc);
383 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
385 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
387 u8 bit = BIT(off % BANK_SZ);
390 mutex_lock(&chip->i2c_lock);
391 /* set output level */
392 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
397 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
399 mutex_unlock(&chip->i2c_lock);
403 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
405 struct pca953x_chip *chip = gpiochip_get_data(gc);
406 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
408 u8 bit = BIT(off % BANK_SZ);
412 mutex_lock(&chip->i2c_lock);
413 ret = regmap_read(chip->regmap, inreg, ®_val);
414 mutex_unlock(&chip->i2c_lock);
416 /* NOTE: diagnostic already emitted; that's all we should
417 * do unless gpio_*_value_cansleep() calls become different
418 * from their nonsleeping siblings (and report faults).
423 return !!(reg_val & bit);
426 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
428 struct pca953x_chip *chip = gpiochip_get_data(gc);
429 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
431 u8 bit = BIT(off % BANK_SZ);
433 mutex_lock(&chip->i2c_lock);
434 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
435 mutex_unlock(&chip->i2c_lock);
438 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
440 struct pca953x_chip *chip = gpiochip_get_data(gc);
441 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
443 u8 bit = BIT(off % BANK_SZ);
447 mutex_lock(&chip->i2c_lock);
448 ret = regmap_read(chip->regmap, dirreg, ®_val);
449 mutex_unlock(&chip->i2c_lock);
453 return !!(reg_val & bit);
456 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
457 unsigned long *mask, unsigned long *bits)
459 struct pca953x_chip *chip = gpiochip_get_data(gc);
460 unsigned int bank_mask, bank_val;
462 u8 reg_val[MAX_BANK];
465 mutex_lock(&chip->i2c_lock);
466 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
470 for (bank = 0; bank < NBANK(chip); bank++) {
471 bank_mask = mask[bank / sizeof(*mask)] >>
472 ((bank % sizeof(*mask)) * 8);
474 bank_val = bits[bank / sizeof(*bits)] >>
475 ((bank % sizeof(*bits)) * 8);
476 bank_val &= bank_mask;
477 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
481 pca953x_write_regs(chip, chip->regs->output, reg_val);
483 mutex_unlock(&chip->i2c_lock);
486 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
488 unsigned long config)
490 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
492 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
494 u8 bit = BIT(offset % BANK_SZ);
498 * pull-up/pull-down configuration requires PCAL extended
501 if (!(chip->driver_data & PCA_PCAL))
504 mutex_lock(&chip->i2c_lock);
506 /* Disable pull-up/pull-down */
507 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
511 /* Configure pull-up/pull-down */
512 if (config == PIN_CONFIG_BIAS_PULL_UP)
513 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
514 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
515 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
519 /* Enable pull-up/pull-down */
520 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
523 mutex_unlock(&chip->i2c_lock);
527 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
528 unsigned long config)
530 struct pca953x_chip *chip = gpiochip_get_data(gc);
533 case PIN_CONFIG_BIAS_PULL_UP:
534 case PIN_CONFIG_BIAS_PULL_DOWN:
535 return pca953x_gpio_set_pull_up_down(chip, offset, config);
541 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
543 struct gpio_chip *gc;
545 gc = &chip->gpio_chip;
547 gc->direction_input = pca953x_gpio_direction_input;
548 gc->direction_output = pca953x_gpio_direction_output;
549 gc->get = pca953x_gpio_get_value;
550 gc->set = pca953x_gpio_set_value;
551 gc->get_direction = pca953x_gpio_get_direction;
552 gc->set_multiple = pca953x_gpio_set_multiple;
553 gc->set_config = pca953x_gpio_set_config;
554 gc->can_sleep = true;
556 gc->base = chip->gpio_start;
558 gc->label = dev_name(&chip->client->dev);
559 gc->parent = &chip->client->dev;
560 gc->owner = THIS_MODULE;
561 gc->names = chip->names;
564 #ifdef CONFIG_GPIO_PCA953X_IRQ
565 static void pca953x_irq_mask(struct irq_data *d)
567 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
568 struct pca953x_chip *chip = gpiochip_get_data(gc);
570 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
573 static void pca953x_irq_unmask(struct irq_data *d)
575 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
576 struct pca953x_chip *chip = gpiochip_get_data(gc);
578 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
581 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
583 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
584 struct pca953x_chip *chip = gpiochip_get_data(gc);
587 atomic_inc(&chip->wakeup_path);
589 atomic_dec(&chip->wakeup_path);
591 return irq_set_irq_wake(chip->client->irq, on);
594 static void pca953x_irq_bus_lock(struct irq_data *d)
596 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
597 struct pca953x_chip *chip = gpiochip_get_data(gc);
599 mutex_lock(&chip->irq_lock);
602 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
604 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
605 struct pca953x_chip *chip = gpiochip_get_data(gc);
608 u8 invert_irq_mask[MAX_BANK];
609 int reg_direction[MAX_BANK];
611 regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
614 if (chip->driver_data & PCA_PCAL) {
615 /* Enable latch on interrupt-enabled inputs */
616 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
618 for (i = 0; i < NBANK(chip); i++)
619 invert_irq_mask[i] = ~chip->irq_mask[i];
621 /* Unmask enabled interrupts */
622 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
625 /* Look for any newly setup interrupt */
626 for (i = 0; i < NBANK(chip); i++) {
627 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
628 new_irqs &= reg_direction[i];
631 level = __ffs(new_irqs);
632 pca953x_gpio_direction_input(&chip->gpio_chip,
633 level + (BANK_SZ * i));
634 new_irqs &= ~(1 << level);
638 mutex_unlock(&chip->irq_lock);
641 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
643 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
644 struct pca953x_chip *chip = gpiochip_get_data(gc);
645 int bank_nb = d->hwirq / BANK_SZ;
646 u8 mask = 1 << (d->hwirq % BANK_SZ);
648 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
649 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
654 if (type & IRQ_TYPE_EDGE_FALLING)
655 chip->irq_trig_fall[bank_nb] |= mask;
657 chip->irq_trig_fall[bank_nb] &= ~mask;
659 if (type & IRQ_TYPE_EDGE_RISING)
660 chip->irq_trig_raise[bank_nb] |= mask;
662 chip->irq_trig_raise[bank_nb] &= ~mask;
667 static void pca953x_irq_shutdown(struct irq_data *d)
669 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
670 struct pca953x_chip *chip = gpiochip_get_data(gc);
671 u8 mask = 1 << (d->hwirq % BANK_SZ);
673 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
674 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
677 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
679 u8 cur_stat[MAX_BANK];
680 u8 old_stat[MAX_BANK];
681 bool pending_seen = false;
682 bool trigger_seen = false;
683 u8 trigger[MAX_BANK];
684 int reg_direction[MAX_BANK];
687 if (chip->driver_data & PCA_PCAL) {
688 /* Read the current interrupt status from the device */
689 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
693 /* Check latched inputs and clear interrupt status */
694 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
698 for (i = 0; i < NBANK(chip); i++) {
699 /* Apply filter for rising/falling edge selection */
700 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
701 (cur_stat[i] & chip->irq_trig_raise[i]);
702 pending[i] &= trigger[i];
710 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
714 /* Remove output pins from the equation */
715 regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
717 for (i = 0; i < NBANK(chip); i++)
718 cur_stat[i] &= reg_direction[i];
720 memcpy(old_stat, chip->irq_stat, NBANK(chip));
722 for (i = 0; i < NBANK(chip); i++) {
723 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
731 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
733 for (i = 0; i < NBANK(chip); i++) {
734 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
735 (cur_stat[i] & chip->irq_trig_raise[i]);
736 pending[i] &= trigger[i];
744 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
746 struct pca953x_chip *chip = devid;
747 u8 pending[MAX_BANK];
749 unsigned nhandled = 0;
752 if (!pca953x_irq_pending(chip, pending))
755 for (i = 0; i < NBANK(chip); i++) {
757 level = __ffs(pending[i]);
758 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
759 level + (BANK_SZ * i)));
760 pending[i] &= ~(1 << level);
765 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
768 static int pca953x_irq_setup(struct pca953x_chip *chip,
771 struct i2c_client *client = chip->client;
772 struct irq_chip *irq_chip = &chip->irq_chip;
773 int reg_direction[MAX_BANK];
782 if (!(chip->driver_data & PCA_INT))
785 ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
790 * There is no way to know which GPIO line generated the
791 * interrupt. We have to rely on the previous read for
794 regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
796 for (i = 0; i < NBANK(chip); i++)
797 chip->irq_stat[i] &= reg_direction[i];
798 mutex_init(&chip->irq_lock);
800 ret = devm_request_threaded_irq(&client->dev, client->irq,
801 NULL, pca953x_irq_handler,
802 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
804 dev_name(&client->dev), chip);
806 dev_err(&client->dev, "failed to request irq %d\n",
811 irq_chip->name = dev_name(&chip->client->dev);
812 irq_chip->irq_mask = pca953x_irq_mask;
813 irq_chip->irq_unmask = pca953x_irq_unmask;
814 irq_chip->irq_set_wake = pca953x_irq_set_wake;
815 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
816 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
817 irq_chip->irq_set_type = pca953x_irq_set_type;
818 irq_chip->irq_shutdown = pca953x_irq_shutdown;
820 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
821 irq_base, handle_simple_irq,
824 dev_err(&client->dev,
825 "could not connect irqchip to gpiochip\n");
829 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
834 #else /* CONFIG_GPIO_PCA953X_IRQ */
835 static int pca953x_irq_setup(struct pca953x_chip *chip,
838 struct i2c_client *client = chip->client;
840 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
841 dev_warn(&client->dev, "interrupt support not compiled in\n");
847 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
852 ret = regcache_sync_region(chip->regmap, chip->regs->output,
853 chip->regs->output + NBANK(chip));
857 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
858 chip->regs->direction + NBANK(chip));
862 /* set platform specific polarity inversion */
864 memset(val, 0xFF, NBANK(chip));
866 memset(val, 0, NBANK(chip));
868 ret = pca953x_write_regs(chip, chip->regs->invert, val);
873 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
878 ret = device_pca95xx_init(chip, invert);
882 /* To enable register 6, 7 to control pull up and pull down */
883 memset(val, 0x02, NBANK(chip));
884 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
893 static const struct of_device_id pca953x_dt_ids[];
895 static int pca953x_probe(struct i2c_client *client,
896 const struct i2c_device_id *i2c_id)
898 struct pca953x_platform_data *pdata;
899 struct pca953x_chip *chip;
903 struct regulator *reg;
905 chip = devm_kzalloc(&client->dev,
906 sizeof(struct pca953x_chip), GFP_KERNEL);
910 pdata = dev_get_platdata(&client->dev);
912 irq_base = pdata->irq_base;
913 chip->gpio_start = pdata->gpio_base;
914 invert = pdata->invert;
915 chip->names = pdata->names;
917 struct gpio_desc *reset_gpio;
919 chip->gpio_start = -1;
923 * See if we need to de-assert a reset pin.
925 * There is no known ACPI-enabled platforms that are
926 * using "reset" GPIO. Otherwise any of those platform
927 * must use _DSD method with corresponding property.
929 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
931 if (IS_ERR(reset_gpio))
932 return PTR_ERR(reset_gpio);
935 chip->client = client;
937 reg = devm_regulator_get(&client->dev, "vcc");
940 if (ret != -EPROBE_DEFER)
941 dev_err(&client->dev, "reg get err: %d\n", ret);
944 ret = regulator_enable(reg);
946 dev_err(&client->dev, "reg en err: %d\n", ret);
949 chip->regulator = reg;
952 chip->driver_data = i2c_id->driver_data;
954 const struct acpi_device_id *acpi_id;
955 struct device *dev = &client->dev;
957 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
958 if (!chip->driver_data) {
959 acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
965 chip->driver_data = acpi_id->driver_data;
969 i2c_set_clientdata(client, chip);
971 chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
972 if (IS_ERR(chip->regmap)) {
973 ret = PTR_ERR(chip->regmap);
977 regcache_mark_dirty(chip->regmap);
979 mutex_init(&chip->i2c_lock);
981 * In case we have an i2c-mux controlled by a GPIO provided by an
982 * expander using the same driver higher on the device tree, read the
983 * i2c adapter nesting depth and use the retrieved value as lockdep
984 * subclass for chip->i2c_lock.
986 * REVISIT: This solution is not complete. It protects us from lockdep
987 * false positives when the expander controlling the i2c-mux is on
988 * a different level on the device tree, but not when it's on the same
989 * level on a different branch (in which case the subclass number
990 * would be the same).
992 * TODO: Once a correct solution is developed, a similar fix should be
993 * applied to all other i2c-controlled GPIO expanders (and potentially
996 lockdep_set_subclass(&chip->i2c_lock,
997 i2c_adapter_depth(client->adapter));
999 /* initialize cached registers from their original values.
1000 * we can't share this chip with another i2c master.
1002 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1004 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1005 chip->regs = &pca953x_regs;
1006 ret = device_pca95xx_init(chip, invert);
1008 chip->regs = &pca957x_regs;
1009 ret = device_pca957x_init(chip, invert);
1014 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1018 ret = pca953x_irq_setup(chip, irq_base);
1022 if (pdata && pdata->setup) {
1023 ret = pdata->setup(client, chip->gpio_chip.base,
1024 chip->gpio_chip.ngpio, pdata->context);
1026 dev_warn(&client->dev, "setup failed, %d\n", ret);
1032 regulator_disable(chip->regulator);
1036 static int pca953x_remove(struct i2c_client *client)
1038 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1039 struct pca953x_chip *chip = i2c_get_clientdata(client);
1042 if (pdata && pdata->teardown) {
1043 ret = pdata->teardown(client, chip->gpio_chip.base,
1044 chip->gpio_chip.ngpio, pdata->context);
1046 dev_err(&client->dev, "%s failed, %d\n",
1052 regulator_disable(chip->regulator);
1057 #ifdef CONFIG_PM_SLEEP
1058 static int pca953x_regcache_sync(struct device *dev)
1060 struct pca953x_chip *chip = dev_get_drvdata(dev);
1064 * The ordering between direction and output is important,
1065 * sync these registers first and only then sync the rest.
1067 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1068 chip->regs->direction + NBANK(chip));
1070 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1074 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1075 chip->regs->output + NBANK(chip));
1077 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1081 #ifdef CONFIG_GPIO_PCA953X_IRQ
1082 if (chip->driver_data & PCA_PCAL) {
1083 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1084 PCAL953X_IN_LATCH + NBANK(chip));
1086 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1091 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1092 PCAL953X_INT_MASK + NBANK(chip));
1094 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1104 static int pca953x_suspend(struct device *dev)
1106 struct pca953x_chip *chip = dev_get_drvdata(dev);
1108 regcache_cache_only(chip->regmap, true);
1110 if (atomic_read(&chip->wakeup_path))
1111 device_set_wakeup_path(dev);
1113 regulator_disable(chip->regulator);
1118 static int pca953x_resume(struct device *dev)
1120 struct pca953x_chip *chip = dev_get_drvdata(dev);
1123 if (!atomic_read(&chip->wakeup_path)) {
1124 ret = regulator_enable(chip->regulator);
1126 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1131 regcache_cache_only(chip->regmap, false);
1132 regcache_mark_dirty(chip->regmap);
1133 ret = pca953x_regcache_sync(dev);
1137 ret = regcache_sync(chip->regmap);
1139 dev_err(dev, "Failed to restore register map: %d\n", ret);
1147 /* convenience to stop overlong match-table lines */
1148 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1149 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1151 static const struct of_device_id pca953x_dt_ids[] = {
1152 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1153 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1154 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1155 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1156 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1157 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1158 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1159 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1160 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1161 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1162 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1163 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1164 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1165 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1166 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1168 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1169 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1170 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1172 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1173 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1174 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1175 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1176 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1178 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1179 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1180 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1181 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1182 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1184 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1185 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1187 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1191 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1193 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1195 static struct i2c_driver pca953x_driver = {
1198 .pm = &pca953x_pm_ops,
1199 .of_match_table = pca953x_dt_ids,
1200 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1202 .probe = pca953x_probe,
1203 .remove = pca953x_remove,
1204 .id_table = pca953x_id,
1207 static int __init pca953x_init(void)
1209 return i2c_add_driver(&pca953x_driver);
1211 /* register after i2c postcore initcall and before
1212 * subsys initcalls that may rely on these GPIOs
1214 subsys_initcall(pca953x_init);
1216 static void __exit pca953x_exit(void)
1218 i2c_del_driver(&pca953x_driver);
1220 module_exit(pca953x_exit);
1223 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1224 MODULE_LICENSE("GPL");