drivers/tty/serial/uartlite.c

   1 /*
   2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
   3  *
   4  * Copyright (C) 2006 Peter Korsgaard <[email protected]>
   5  * Copyright (C) 2007 Secret Lab Technologies Ltd.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/module.h>
  14 #include <linux/console.h>
  15 #include <linux/serial.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/tty.h>
  18 #include <linux/tty_flip.h>
  19 #include <linux/delay.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/of.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_device.h>
  26 #include <linux/of_platform.h>
  27
  28 #define ULITE_NAME              "ttyUL"
  29 #define ULITE_MAJOR             204
  30 #define ULITE_MINOR             187
  31 #define ULITE_NR_UARTS          4
  32
  33 /* ---------------------------------------------------------------------
  34  * Register definitions
  35  *
  36  * For register details see datasheet:
  37  * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
  38  */
  39
  40 #define ULITE_RX                0x00
  41 #define ULITE_TX                0x04
  42 #define ULITE_STATUS            0x08
  43 #define ULITE_CONTROL           0x0c
  44
  45 #define ULITE_REGION            16
  46
  47 #define ULITE_STATUS_RXVALID    0x01
  48 #define ULITE_STATUS_RXFULL     0x02
  49 #define ULITE_STATUS_TXEMPTY    0x04
  50 #define ULITE_STATUS_TXFULL     0x08
  51 #define ULITE_STATUS_IE         0x10
  52 #define ULITE_STATUS_OVERRUN    0x20
  53 #define ULITE_STATUS_FRAME      0x40
  54 #define ULITE_STATUS_PARITY     0x80
  55
  56 #define ULITE_CONTROL_RST_TX    0x01
  57 #define ULITE_CONTROL_RST_RX    0x02
  58 #define ULITE_CONTROL_IE        0x10
  59
  60 struct uartlite_reg_ops {
  61         u32 (*in)(void __iomem *addr);
  62         void (*out)(u32 val, void __iomem *addr);
  63 };
  64
  65 static u32 uartlite_inbe32(void __iomem *addr)
  66 {
  67         return ioread32be(addr);
  68 }
  69
  70 static void uartlite_outbe32(u32 val, void __iomem *addr)
  71 {
  72         iowrite32be(val, addr);
  73 }
  74
  75 static struct uartlite_reg_ops uartlite_be = {
  76         .in = uartlite_inbe32,
  77         .out = uartlite_outbe32,
  78 };
  79
  80 static u32 uartlite_inle32(void __iomem *addr)
  81 {
  82         return ioread32(addr);
  83 }
  84
  85 static void uartlite_outle32(u32 val, void __iomem *addr)
  86 {
  87         iowrite32(val, addr);
  88 }
  89
  90 static struct uartlite_reg_ops uartlite_le = {
  91         .in = uartlite_inle32,
  92         .out = uartlite_outle32,
  93 };
  94
  95 static inline u32 uart_in32(u32 offset, struct uart_port *port)
  96 {
  97         struct uartlite_reg_ops *reg_ops = port->private_data;
  98
  99         return reg_ops->in(port->membase + offset);
 100 }
 101
 102 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
 103 {
 104         struct uartlite_reg_ops *reg_ops = port->private_data;
 105
 106         reg_ops->out(val, port->membase + offset);
 107 }
 108
 109 static struct uart_port ulite_ports[ULITE_NR_UARTS];
 110
 111 /* ---------------------------------------------------------------------
 112  * Core UART driver operations
 113  */
 114
 115 static int ulite_receive(struct uart_port *port, int stat)
 116 {
 117         struct tty_port *tport = &port->state->port;
 118         unsigned char ch = 0;
 119         char flag = TTY_NORMAL;
 120
 121         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 122                      | ULITE_STATUS_FRAME)) == 0)
 123                 return 0;
 124
 125         /* stats */
 126         if (stat & ULITE_STATUS_RXVALID) {
 127                 port->icount.rx++;
 128                 ch = uart_in32(ULITE_RX, port);
 129
 130                 if (stat & ULITE_STATUS_PARITY)
 131                         port->icount.parity++;
 132         }
 133
 134         if (stat & ULITE_STATUS_OVERRUN)
 135                 port->icount.overrun++;
 136
 137         if (stat & ULITE_STATUS_FRAME)
 138                 port->icount.frame++;
 139
 140
 141         /* drop byte with parity error if IGNPAR specificed */
 142         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
 143                 stat &= ~ULITE_STATUS_RXVALID;
 144
 145         stat &= port->read_status_mask;
 146
 147         if (stat & ULITE_STATUS_PARITY)
 148                 flag = TTY_PARITY;
 149
 150
 151         stat &= ~port->ignore_status_mask;
 152
 153         if (stat & ULITE_STATUS_RXVALID)
 154                 tty_insert_flip_char(tport, ch, flag);
 155
 156         if (stat & ULITE_STATUS_FRAME)
 157                 tty_insert_flip_char(tport, 0, TTY_FRAME);
 158
 159         if (stat & ULITE_STATUS_OVERRUN)
 160                 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
 161
 162         return 1;
 163 }
 164
 165 static int ulite_transmit(struct uart_port *port, int stat)
 166 {
 167         struct circ_buf *xmit  = &port->state->xmit;
 168
 169         if (stat & ULITE_STATUS_TXFULL)
 170                 return 0;
 171
 172         if (port->x_char) {
 173                 uart_out32(port->x_char, ULITE_TX, port);
 174                 port->x_char = 0;
 175                 port->icount.tx++;
 176                 return 1;
 177         }
 178
 179         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 180                 return 0;
 181
 182         uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
 183         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 184         port->icount.tx++;
 185
 186         /* wake up */
 187         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 188                 uart_write_wakeup(port);
 189
 190         return 1;
 191 }
 192
 193 static irqreturn_t ulite_isr(int irq, void *dev_id)
 194 {
 195         struct uart_port *port = dev_id;
 196         int busy, n = 0;
 197
 198         do {
 199                 int stat = uart_in32(ULITE_STATUS, port);
 200                 busy  = ulite_receive(port, stat);
 201                 busy |= ulite_transmit(port, stat);
 202                 n++;
 203         } while (busy);
 204
 205         /* work done? */
 206         if (n > 1) {
 207                 tty_flip_buffer_push(&port->state->port);
 208                 return IRQ_HANDLED;
 209         } else {
 210                 return IRQ_NONE;
 211         }
 212 }
 213
 214 static unsigned int ulite_tx_empty(struct uart_port *port)
 215 {
 216         unsigned long flags;
 217         unsigned int ret;
 218
 219         spin_lock_irqsave(&port->lock, flags);
 220         ret = uart_in32(ULITE_STATUS, port);
 221         spin_unlock_irqrestore(&port->lock, flags);
 222
 223         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
 224 }
 225
 226 static unsigned int ulite_get_mctrl(struct uart_port *port)
 227 {
 228         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 229 }
 230
 231 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
 232 {
 233         /* N/A */
 234 }
 235
 236 static void ulite_stop_tx(struct uart_port *port)
 237 {
 238         /* N/A */
 239 }
 240
 241 static void ulite_start_tx(struct uart_port *port)
 242 {
 243         ulite_transmit(port, uart_in32(ULITE_STATUS, port));
 244 }
 245
 246 static void ulite_stop_rx(struct uart_port *port)
 247 {
 248         /* don't forward any more data (like !CREAD) */
 249         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 250                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 251 }
 252
 253 static void ulite_enable_ms(struct uart_port *port)
 254 {
 255         /* N/A */
 256 }
 257
 258 static void ulite_break_ctl(struct uart_port *port, int ctl)
 259 {
 260         /* N/A */
 261 }
 262
 263 static int ulite_startup(struct uart_port *port)
 264 {
 265         int ret;
 266
 267         ret = request_irq(port->irq, ulite_isr, IRQF_SHARED, "uartlite", port);
 268         if (ret)
 269                 return ret;
 270
 271         uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 272                 ULITE_CONTROL, port);
 273         uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 274
 275         return 0;
 276 }
 277
 278 static void ulite_shutdown(struct uart_port *port)
 279 {
 280         uart_out32(0, ULITE_CONTROL, port);
 281         uart_in32(ULITE_CONTROL, port); /* dummy */
 282         free_irq(port->irq, port);
 283 }
 284
 285 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
 286                               struct ktermios *old)
 287 {
 288         unsigned long flags;
 289         unsigned int baud;
 290
 291         spin_lock_irqsave(&port->lock, flags);
 292
 293         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 294                 | ULITE_STATUS_TXFULL;
 295
 296         if (termios->c_iflag & INPCK)
 297                 port->read_status_mask |=
 298                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
 299
 300         port->ignore_status_mask = 0;
 301         if (termios->c_iflag & IGNPAR)
 302                 port->ignore_status_mask |= ULITE_STATUS_PARITY
 303                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 304
 305         /* ignore all characters if CREAD is not set */
 306         if ((termios->c_cflag & CREAD) == 0)
 307                 port->ignore_status_mask |=
 308                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 309                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 310
 311         /* update timeout */
 312         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
 313         uart_update_timeout(port, termios->c_cflag, baud);
 314
 315         spin_unlock_irqrestore(&port->lock, flags);
 316 }
 317
 318 static const char *ulite_type(struct uart_port *port)
 319 {
 320         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
 321 }
 322
 323 static void ulite_release_port(struct uart_port *port)
 324 {
 325         release_mem_region(port->mapbase, ULITE_REGION);
 326         iounmap(port->membase);
 327         port->membase = NULL;
 328 }
 329
 330 static int ulite_request_port(struct uart_port *port)
 331 {
 332         int ret;
 333
 334         pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
 335                  port, (unsigned long long) port->mapbase);
 336
 337         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
 338                 dev_err(port->dev, "Memory region busy\n");
 339                 return -EBUSY;
 340         }
 341
 342         port->membase = ioremap(port->mapbase, ULITE_REGION);
 343         if (!port->membase) {
 344                 dev_err(port->dev, "Unable to map registers\n");
 345                 release_mem_region(port->mapbase, ULITE_REGION);
 346                 return -EBUSY;
 347         }
 348
 349         port->private_data = &uartlite_be;
 350         ret = uart_in32(ULITE_CONTROL, port);
 351         uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
 352         ret = uart_in32(ULITE_STATUS, port);
 353         /* Endianess detection */
 354         if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
 355                 port->private_data = &uartlite_le;
 356
 357         return 0;
 358 }
 359
 360 static void ulite_config_port(struct uart_port *port, int flags)
 361 {
 362         if (!ulite_request_port(port))
 363                 port->type = PORT_UARTLITE;
 364 }
 365
 366 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 367 {
 368         /* we don't want the core code to modify any port params */
 369         return -EINVAL;
 370 }
 371
 372 #ifdef CONFIG_CONSOLE_POLL
 373 static int ulite_get_poll_char(struct uart_port *port)
 374 {
 375         if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
 376                 return NO_POLL_CHAR;
 377
 378         return uart_in32(ULITE_RX, port);
 379 }
 380
 381 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
 382 {
 383         while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
 384                 cpu_relax();
 385
 386         /* write char to device */
 387         uart_out32(ch, ULITE_TX, port);
 388 }
 389 #endif
 390
 391 static struct uart_ops ulite_ops = {
 392         .tx_empty       = ulite_tx_empty,
 393         .set_mctrl      = ulite_set_mctrl,
 394         .get_mctrl      = ulite_get_mctrl,
 395         .stop_tx        = ulite_stop_tx,
 396         .start_tx       = ulite_start_tx,
 397         .stop_rx        = ulite_stop_rx,
 398         .enable_ms      = ulite_enable_ms,
 399         .break_ctl      = ulite_break_ctl,
 400         .startup        = ulite_startup,
 401         .shutdown       = ulite_shutdown,
 402         .set_termios    = ulite_set_termios,
 403         .type           = ulite_type,
 404         .release_port   = ulite_release_port,
 405         .request_port   = ulite_request_port,
 406         .config_port    = ulite_config_port,
 407         .verify_port    = ulite_verify_port,
 408 #ifdef CONFIG_CONSOLE_POLL
 409         .poll_get_char  = ulite_get_poll_char,
 410         .poll_put_char  = ulite_put_poll_char,
 411 #endif
 412 };
 413
 414 /* ---------------------------------------------------------------------
 415  * Console driver operations
 416  */
 417
 418 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 419 static void ulite_console_wait_tx(struct uart_port *port)
 420 {
 421         u8 val;
 422         unsigned long timeout;
 423
 424         /*
 425          * Spin waiting for TX fifo to have space available.
 426          * When using the Microblaze Debug Module this can take up to 1s
 427          */
 428         timeout = jiffies + msecs_to_jiffies(1000);
 429         while (1) {
 430                 val = uart_in32(ULITE_STATUS, port);
 431                 if ((val & ULITE_STATUS_TXFULL) == 0)
 432                         break;
 433                 if (time_after(jiffies, timeout)) {
 434                         dev_warn(port->dev,
 435                                  "timeout waiting for TX buffer empty\n");
 436                         break;
 437                 }
 438                 cpu_relax();
 439         }
 440 }
 441
 442 static void ulite_console_putchar(struct uart_port *port, int ch)
 443 {
 444         ulite_console_wait_tx(port);
 445         uart_out32(ch, ULITE_TX, port);
 446 }
 447
 448 static void ulite_console_write(struct console *co, const char *s,
 449                                 unsigned int count)
 450 {
 451         struct uart_port *port = &ulite_ports[co->index];
 452         unsigned long flags;
 453         unsigned int ier;
 454         int locked = 1;
 455
 456         if (oops_in_progress) {
 457                 locked = spin_trylock_irqsave(&port->lock, flags);
 458         } else
 459                 spin_lock_irqsave(&port->lock, flags);
 460
 461         /* save and disable interrupt */
 462         ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
 463         uart_out32(0, ULITE_CONTROL, port);
 464
 465         uart_console_write(port, s, count, ulite_console_putchar);
 466
 467         ulite_console_wait_tx(port);
 468
 469         /* restore interrupt state */
 470         if (ier)
 471                 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 472
 473         if (locked)
 474                 spin_unlock_irqrestore(&port->lock, flags);
 475 }
 476
 477 static int ulite_console_setup(struct console *co, char *options)
 478 {
 479         struct uart_port *port;
 480         int baud = 9600;
 481         int bits = 8;
 482         int parity = 'n';
 483         int flow = 'n';
 484
 485         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
 486                 return -EINVAL;
 487
 488         port = &ulite_ports[co->index];
 489
 490         /* Has the device been initialized yet? */
 491         if (!port->mapbase) {
 492                 pr_debug("console on ttyUL%i not present\n", co->index);
 493                 return -ENODEV;
 494         }
 495
 496         /* not initialized yet? */
 497         if (!port->membase) {
 498                 if (ulite_request_port(port))
 499                         return -ENODEV;
 500         }
 501
 502         if (options)
 503                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 504
 505         return uart_set_options(port, co, baud, parity, bits, flow);
 506 }
 507
 508 static struct uart_driver ulite_uart_driver;
 509
 510 static struct console ulite_console = {
 511         .name   = ULITE_NAME,
 512         .write  = ulite_console_write,
 513         .device = uart_console_device,
 514         .setup  = ulite_console_setup,
 515         .flags  = CON_PRINTBUFFER,
 516         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
 517         .data   = &ulite_uart_driver,
 518 };
 519
 520 static int __init ulite_console_init(void)
 521 {
 522         register_console(&ulite_console);
 523         return 0;
 524 }
 525
 526 console_initcall(ulite_console_init);
 527
 528 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 529
 530 static struct uart_driver ulite_uart_driver = {
 531         .owner          = THIS_MODULE,
 532         .driver_name    = "uartlite",
 533         .dev_name       = ULITE_NAME,
 534         .major          = ULITE_MAJOR,
 535         .minor          = ULITE_MINOR,
 536         .nr             = ULITE_NR_UARTS,
 537 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 538         .cons           = &ulite_console,
 539 #endif
 540 };
 541
 542 /* ---------------------------------------------------------------------
 543  * Port assignment functions (mapping devices to uart_port structures)
 544  */
 545
 546 /** ulite_assign: register a uartlite device with the driver
 547  *
 548  * @dev: pointer to device structure
 549  * @id: requested id number.  Pass -1 for automatic port assignment
 550  * @base: base address of uartlite registers
 551  * @irq: irq number for uartlite
 552  *
 553  * Returns: 0 on success, <0 otherwise
 554  */
 555 static int ulite_assign(struct device *dev, int id, u32 base, int irq)
 556 {
 557         struct uart_port *port;
 558         int rc;
 559
 560         /* if id = -1; then scan for a free id and use that */
 561         if (id < 0) {
 562                 for (id = 0; id < ULITE_NR_UARTS; id++)
 563                         if (ulite_ports[id].mapbase == 0)
 564                                 break;
 565         }
 566         if (id < 0 || id >= ULITE_NR_UARTS) {
 567                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
 568                 return -EINVAL;
 569         }
 570
 571         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
 572                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
 573                         ULITE_NAME, id);
 574                 return -EBUSY;
 575         }
 576
 577         port = &ulite_ports[id];
 578
 579         spin_lock_init(&port->lock);
 580         port->fifosize = 16;
 581         port->regshift = 2;
 582         port->iotype = UPIO_MEM;
 583         port->iobase = 1; /* mark port in use */
 584         port->mapbase = base;
 585         port->membase = NULL;
 586         port->ops = &ulite_ops;
 587         port->irq = irq;
 588         port->flags = UPF_BOOT_AUTOCONF;
 589         port->dev = dev;
 590         port->type = PORT_UNKNOWN;
 591         port->line = id;
 592
 593         dev_set_drvdata(dev, port);
 594
 595         /* Register the port */
 596         rc = uart_add_one_port(&ulite_uart_driver, port);
 597         if (rc) {
 598                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
 599                 port->mapbase = 0;
 600                 dev_set_drvdata(dev, NULL);
 601                 return rc;
 602         }
 603
 604         return 0;
 605 }
 606
 607 /** ulite_release: register a uartlite device with the driver
 608  *
 609  * @dev: pointer to device structure
 610  */
 611 static int ulite_release(struct device *dev)
 612 {
 613         struct uart_port *port = dev_get_drvdata(dev);
 614         int rc = 0;
 615
 616         if (port) {
 617                 rc = uart_remove_one_port(&ulite_uart_driver, port);
 618                 dev_set_drvdata(dev, NULL);
 619                 port->mapbase = 0;
 620         }
 621
 622         return rc;
 623 }
 624
 625 /* ---------------------------------------------------------------------
 626  * Platform bus binding
 627  */
 628
 629 #if defined(CONFIG_OF)
 630 /* Match table for of_platform binding */
 631 static struct of_device_id ulite_of_match[] = {
 632         { .compatible = "xlnx,opb-uartlite-1.00.b", },
 633         { .compatible = "xlnx,xps-uartlite-1.00.a", },
 634         {}
 635 };
 636 MODULE_DEVICE_TABLE(of, ulite_of_match);
 637 #endif /* CONFIG_OF */
 638
 639 static int ulite_probe(struct platform_device *pdev)
 640 {
 641         struct resource *res, *res2;
 642         int id = pdev->id;
 643 #ifdef CONFIG_OF
 644         const __be32 *prop;
 645
 646         prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
 647         if (prop)
 648                 id = be32_to_cpup(prop);
 649 #endif
 650
 651         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 652         if (!res)
 653                 return -ENODEV;
 654
 655         res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 656         if (!res2)
 657                 return -ENODEV;
 658
 659         return ulite_assign(&pdev->dev, id, res->start, res2->start);
 660 }
 661
 662 static int ulite_remove(struct platform_device *pdev)
 663 {
 664         return ulite_release(&pdev->dev);
 665 }
 666
 667 /* work with hotplug and coldplug */
 668 MODULE_ALIAS("platform:uartlite");
 669
 670 static struct platform_driver ulite_platform_driver = {
 671         .probe = ulite_probe,
 672         .remove = ulite_remove,
 673         .driver = {
 674                 .owner = THIS_MODULE,
 675                 .name  = "uartlite",
 676                 .of_match_table = of_match_ptr(ulite_of_match),
 677         },
 678 };
 679
 680 /* ---------------------------------------------------------------------
 681  * Module setup/teardown
 682  */
 683
 684 static int __init ulite_init(void)
 685 {
 686         int ret;
 687
 688         pr_debug("uartlite: calling uart_register_driver()\n");
 689         ret = uart_register_driver(&ulite_uart_driver);
 690         if (ret)
 691                 goto err_uart;
 692
 693         pr_debug("uartlite: calling platform_driver_register()\n");
 694         ret = platform_driver_register(&ulite_platform_driver);
 695         if (ret)
 696                 goto err_plat;
 697
 698         return 0;
 699
 700 err_plat:
 701         uart_unregister_driver(&ulite_uart_driver);
 702 err_uart:
 703         pr_err("registering uartlite driver failed: err=%i", ret);
 704         return ret;
 705 }
 706
 707 static void __exit ulite_exit(void)
 708 {
 709         platform_driver_unregister(&ulite_platform_driver);
 710         uart_unregister_driver(&ulite_uart_driver);
 711 }
 712
 713 module_init(ulite_init);
 714 module_exit(ulite_exit);
 715
 716 MODULE_AUTHOR("Peter Korsgaard <[email protected]>");
 717 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
 718 MODULE_LICENSE("GPL");