2 * Xtensa xtfpga SPI controller driver
4 * Copyright (c) 2014 Cadence Design Systems Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/delay.h>
13 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/spi_bitbang.h>
19 #define XTFPGA_SPI_NAME "xtfpga_spi"
21 #define XTFPGA_SPI_START 0x0
22 #define XTFPGA_SPI_BUSY 0x4
23 #define XTFPGA_SPI_DATA 0x8
25 #define BUSY_WAIT_US 100
28 struct spi_bitbang bitbang;
34 static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
35 unsigned addr, u32 val)
37 __raw_writel(val, spi->regs + addr);
40 static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
43 return __raw_readl(spi->regs + addr);
46 static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)
50 for (i = 0; xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY) &&
51 i < BUSY_WAIT_US; ++i)
53 WARN_ON_ONCE(i == BUSY_WAIT_US);
56 static u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs,
59 struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master);
61 xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0));
62 xspi->data_sz += bits;
63 if (xspi->data_sz >= 16) {
64 xtfpga_spi_write32(xspi, XTFPGA_SPI_DATA,
65 xspi->data >> (xspi->data_sz - 16));
67 xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 1);
68 xtfpga_spi_wait_busy(xspi);
69 xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
75 static void xtfpga_spi_chipselect(struct spi_device *spi, int is_on)
77 struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master);
79 WARN_ON(xspi->data_sz != 0);
83 static int xtfpga_spi_probe(struct platform_device *pdev)
85 struct xtfpga_spi *xspi;
88 struct spi_master *master;
90 master = spi_alloc_master(&pdev->dev, sizeof(struct xtfpga_spi));
94 master->flags = SPI_MASTER_NO_RX;
95 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
96 master->bus_num = pdev->dev.id;
97 master->dev.of_node = pdev->dev.of_node;
99 xspi = spi_master_get_devdata(master);
100 xspi->bitbang.master = master;
101 xspi->bitbang.chipselect = xtfpga_spi_chipselect;
102 xspi->bitbang.txrx_word[SPI_MODE_0] = xtfpga_spi_txrx_word;
104 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
106 dev_err(&pdev->dev, "No memory resource\n");
110 xspi->regs = devm_ioremap_resource(&pdev->dev, mem);
111 if (IS_ERR(xspi->regs)) {
112 ret = PTR_ERR(xspi->regs);
116 xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
117 usleep_range(1000, 2000);
118 if (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) {
119 dev_err(&pdev->dev, "Device stuck in busy state\n");
124 ret = spi_bitbang_start(&xspi->bitbang);
126 dev_err(&pdev->dev, "spi_bitbang_start failed\n");
130 platform_set_drvdata(pdev, master);
133 spi_master_put(master);
137 static int xtfpga_spi_remove(struct platform_device *pdev)
139 struct spi_master *master = platform_get_drvdata(pdev);
140 struct xtfpga_spi *xspi = spi_master_get_devdata(master);
142 spi_bitbang_stop(&xspi->bitbang);
143 spi_master_put(master);
148 MODULE_ALIAS("platform:" XTFPGA_SPI_NAME);
151 static const struct of_device_id xtfpga_spi_of_match[] = {
152 { .compatible = "cdns,xtfpga-spi", },
155 MODULE_DEVICE_TABLE(of, xtfpga_spi_of_match);
158 static struct platform_driver xtfpga_spi_driver = {
159 .probe = xtfpga_spi_probe,
160 .remove = xtfpga_spi_remove,
162 .name = XTFPGA_SPI_NAME,
163 .of_match_table = of_match_ptr(xtfpga_spi_of_match),
166 module_platform_driver(xtfpga_spi_driver);
169 MODULE_DESCRIPTION("xtensa xtfpga SPI driver");
170 MODULE_LICENSE("GPL");