]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <[email protected]> | |
7 | * Copyright (C) 2000 Goutham Rao <[email protected]> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <[email protected]> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 LT |
22 | #include <linux/mm.h> |
23 | #include <linux/module.h> | |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
1da177e4 LT |
31 | |
32 | #include <asm/io.h> | |
1da177e4 | 33 | #include <asm/dma.h> |
17e5ad6c | 34 | #include <asm/scatterlist.h> |
1da177e4 LT |
35 | |
36 | #include <linux/init.h> | |
37 | #include <linux/bootmem.h> | |
a8522509 | 38 | #include <linux/iommu-helper.h> |
1da177e4 LT |
39 | |
40 | #define OFFSET(val,align) ((unsigned long) \ | |
41 | ( (val) & ( (align) - 1))) | |
42 | ||
0b9afede AW |
43 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
44 | ||
45 | /* | |
46 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
47 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
48 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
49 | */ | |
50 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
51 | ||
de69e0f0 JL |
52 | /* |
53 | * Enumeration for sync targets | |
54 | */ | |
55 | enum dma_sync_target { | |
56 | SYNC_FOR_CPU = 0, | |
57 | SYNC_FOR_DEVICE = 1, | |
58 | }; | |
59 | ||
1da177e4 LT |
60 | int swiotlb_force; |
61 | ||
62 | /* | |
63 | * Used to do a quick range check in swiotlb_unmap_single and | |
64 | * swiotlb_sync_single_*, to see if the memory was in fact allocated by this | |
65 | * API. | |
66 | */ | |
67 | static char *io_tlb_start, *io_tlb_end; | |
68 | ||
69 | /* | |
70 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
71 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
72 | */ | |
73 | static unsigned long io_tlb_nslabs; | |
74 | ||
75 | /* | |
76 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
77 | */ | |
78 | static unsigned long io_tlb_overflow = 32*1024; | |
79 | ||
80 | void *io_tlb_overflow_buffer; | |
81 | ||
82 | /* | |
83 | * This is a free list describing the number of free entries available from | |
84 | * each index | |
85 | */ | |
86 | static unsigned int *io_tlb_list; | |
87 | static unsigned int io_tlb_index; | |
88 | ||
89 | /* | |
90 | * We need to save away the original address corresponding to a mapped entry | |
91 | * for the sync operations. | |
92 | */ | |
bc40ac66 | 93 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
94 | |
95 | /* | |
96 | * Protect the above data structures in the map and unmap calls | |
97 | */ | |
98 | static DEFINE_SPINLOCK(io_tlb_lock); | |
99 | ||
100 | static int __init | |
101 | setup_io_tlb_npages(char *str) | |
102 | { | |
103 | if (isdigit(*str)) { | |
e8579e72 | 104 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
105 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
106 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
107 | } | |
108 | if (*str == ',') | |
109 | ++str; | |
110 | if (!strcmp(str, "force")) | |
111 | swiotlb_force = 1; | |
112 | return 1; | |
113 | } | |
114 | __setup("swiotlb=", setup_io_tlb_npages); | |
115 | /* make io_tlb_overflow tunable too? */ | |
116 | ||
79ff56eb | 117 | void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs) |
8c5df16b JF |
118 | { |
119 | return alloc_bootmem_low_pages(size); | |
120 | } | |
121 | ||
122 | void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs) | |
123 | { | |
124 | return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order); | |
125 | } | |
126 | ||
70a7d3cc | 127 | dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr) |
e08e1f7a IC |
128 | { |
129 | return paddr; | |
130 | } | |
131 | ||
132 | phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr) | |
133 | { | |
134 | return baddr; | |
135 | } | |
136 | ||
70a7d3cc JF |
137 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
138 | volatile void *address) | |
e08e1f7a | 139 | { |
70a7d3cc | 140 | return swiotlb_phys_to_bus(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
141 | } |
142 | ||
143 | static void *swiotlb_bus_to_virt(dma_addr_t address) | |
144 | { | |
145 | return phys_to_virt(swiotlb_bus_to_phys(address)); | |
146 | } | |
147 | ||
b81ea27b IC |
148 | int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size) |
149 | { | |
150 | return 0; | |
151 | } | |
152 | ||
2e5b2b86 IC |
153 | static void swiotlb_print_info(unsigned long bytes) |
154 | { | |
155 | phys_addr_t pstart, pend; | |
2e5b2b86 IC |
156 | |
157 | pstart = virt_to_phys(io_tlb_start); | |
158 | pend = virt_to_phys(io_tlb_end); | |
159 | ||
2e5b2b86 IC |
160 | printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", |
161 | bytes >> 20, io_tlb_start, io_tlb_end); | |
70a7d3cc JF |
162 | printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", |
163 | (unsigned long long)pstart, | |
164 | (unsigned long long)pend); | |
2e5b2b86 IC |
165 | } |
166 | ||
1da177e4 LT |
167 | /* |
168 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 169 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 170 | */ |
563aaf06 JB |
171 | void __init |
172 | swiotlb_init_with_default_size(size_t default_size) | |
1da177e4 | 173 | { |
563aaf06 | 174 | unsigned long i, bytes; |
1da177e4 LT |
175 | |
176 | if (!io_tlb_nslabs) { | |
e8579e72 | 177 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
178 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
179 | } | |
180 | ||
563aaf06 JB |
181 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
182 | ||
1da177e4 LT |
183 | /* |
184 | * Get IO TLB memory from the low pages | |
185 | */ | |
8c5df16b | 186 | io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs); |
1da177e4 LT |
187 | if (!io_tlb_start) |
188 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 189 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
190 | |
191 | /* | |
192 | * Allocate and initialize the free list array. This array is used | |
193 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
194 | * between io_tlb_start and io_tlb_end. | |
195 | */ | |
196 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 197 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
198 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
199 | io_tlb_index = 0; | |
bc40ac66 | 200 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); |
1da177e4 LT |
201 | |
202 | /* | |
203 | * Get the overflow emergency buffer | |
204 | */ | |
205 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
206 | if (!io_tlb_overflow_buffer) |
207 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
208 | ||
2e5b2b86 | 209 | swiotlb_print_info(bytes); |
1da177e4 LT |
210 | } |
211 | ||
563aaf06 JB |
212 | void __init |
213 | swiotlb_init(void) | |
1da177e4 | 214 | { |
25667d67 | 215 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ |
1da177e4 LT |
216 | } |
217 | ||
0b9afede AW |
218 | /* |
219 | * Systems with larger DMA zones (those that don't support ISA) can | |
220 | * initialize the swiotlb later using the slab allocator if needed. | |
221 | * This should be just like above, but with some error catching. | |
222 | */ | |
223 | int | |
563aaf06 | 224 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 225 | { |
563aaf06 | 226 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
227 | unsigned int order; |
228 | ||
229 | if (!io_tlb_nslabs) { | |
230 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
231 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
232 | } | |
233 | ||
234 | /* | |
235 | * Get IO TLB memory from the low pages | |
236 | */ | |
563aaf06 | 237 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 238 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 239 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
240 | |
241 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
8c5df16b | 242 | io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs); |
0b9afede AW |
243 | if (io_tlb_start) |
244 | break; | |
245 | order--; | |
246 | } | |
247 | ||
248 | if (!io_tlb_start) | |
249 | goto cleanup1; | |
250 | ||
563aaf06 | 251 | if (order != get_order(bytes)) { |
0b9afede AW |
252 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
253 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
254 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 255 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 256 | } |
563aaf06 JB |
257 | io_tlb_end = io_tlb_start + bytes; |
258 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
259 | |
260 | /* | |
261 | * Allocate and initialize the free list array. This array is used | |
262 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
263 | * between io_tlb_start and io_tlb_end. | |
264 | */ | |
265 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
266 | get_order(io_tlb_nslabs * sizeof(int))); | |
267 | if (!io_tlb_list) | |
268 | goto cleanup2; | |
269 | ||
270 | for (i = 0; i < io_tlb_nslabs; i++) | |
271 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
272 | io_tlb_index = 0; | |
273 | ||
bc40ac66 BB |
274 | io_tlb_orig_addr = (phys_addr_t *) |
275 | __get_free_pages(GFP_KERNEL, | |
276 | get_order(io_tlb_nslabs * | |
277 | sizeof(phys_addr_t))); | |
0b9afede AW |
278 | if (!io_tlb_orig_addr) |
279 | goto cleanup3; | |
280 | ||
bc40ac66 | 281 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
0b9afede AW |
282 | |
283 | /* | |
284 | * Get the overflow emergency buffer | |
285 | */ | |
286 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
287 | get_order(io_tlb_overflow)); | |
288 | if (!io_tlb_overflow_buffer) | |
289 | goto cleanup4; | |
290 | ||
2e5b2b86 | 291 | swiotlb_print_info(bytes); |
0b9afede AW |
292 | |
293 | return 0; | |
294 | ||
295 | cleanup4: | |
bc40ac66 BB |
296 | free_pages((unsigned long)io_tlb_orig_addr, |
297 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
0b9afede AW |
298 | io_tlb_orig_addr = NULL; |
299 | cleanup3: | |
25667d67 TL |
300 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
301 | sizeof(int))); | |
0b9afede | 302 | io_tlb_list = NULL; |
0b9afede | 303 | cleanup2: |
563aaf06 | 304 | io_tlb_end = NULL; |
0b9afede AW |
305 | free_pages((unsigned long)io_tlb_start, order); |
306 | io_tlb_start = NULL; | |
307 | cleanup1: | |
308 | io_tlb_nslabs = req_nslabs; | |
309 | return -ENOMEM; | |
310 | } | |
311 | ||
be6b0267 | 312 | static int |
2797982e | 313 | address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size) |
1da177e4 | 314 | { |
07a2c01a | 315 | return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); |
1da177e4 LT |
316 | } |
317 | ||
b81ea27b IC |
318 | static inline int range_needs_mapping(void *ptr, size_t size) |
319 | { | |
320 | return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size); | |
321 | } | |
322 | ||
640aebfe FT |
323 | static int is_swiotlb_buffer(char *addr) |
324 | { | |
325 | return addr >= io_tlb_start && addr < io_tlb_end; | |
326 | } | |
327 | ||
fb05a379 BB |
328 | /* |
329 | * Bounce: copy the swiotlb buffer back to the original dma location | |
330 | */ | |
331 | static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, | |
332 | enum dma_data_direction dir) | |
333 | { | |
334 | unsigned long pfn = PFN_DOWN(phys); | |
335 | ||
336 | if (PageHighMem(pfn_to_page(pfn))) { | |
337 | /* The buffer does not have a mapping. Map it in and copy */ | |
338 | unsigned int offset = phys & ~PAGE_MASK; | |
339 | char *buffer; | |
340 | unsigned int sz = 0; | |
341 | unsigned long flags; | |
342 | ||
343 | while (size) { | |
344 | sz = min(PAGE_SIZE - offset, size); | |
345 | ||
346 | local_irq_save(flags); | |
347 | buffer = kmap_atomic(pfn_to_page(pfn), | |
348 | KM_BOUNCE_READ); | |
349 | if (dir == DMA_TO_DEVICE) | |
350 | memcpy(dma_addr, buffer + offset, sz); | |
ef9b1893 | 351 | else |
fb05a379 BB |
352 | memcpy(buffer + offset, dma_addr, sz); |
353 | kunmap_atomic(buffer, KM_BOUNCE_READ); | |
ef9b1893 | 354 | local_irq_restore(flags); |
fb05a379 BB |
355 | |
356 | size -= sz; | |
357 | pfn++; | |
358 | dma_addr += sz; | |
359 | offset = 0; | |
ef9b1893 JF |
360 | } |
361 | } else { | |
ef9b1893 | 362 | if (dir == DMA_TO_DEVICE) |
fb05a379 | 363 | memcpy(dma_addr, phys_to_virt(phys), size); |
ef9b1893 | 364 | else |
fb05a379 | 365 | memcpy(phys_to_virt(phys), dma_addr, size); |
ef9b1893 | 366 | } |
1b548f66 JF |
367 | } |
368 | ||
1da177e4 LT |
369 | /* |
370 | * Allocates bounce buffer and returns its kernel virtual address. | |
371 | */ | |
372 | static void * | |
bc40ac66 | 373 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) |
1da177e4 LT |
374 | { |
375 | unsigned long flags; | |
376 | char *dma_addr; | |
377 | unsigned int nslots, stride, index, wrap; | |
378 | int i; | |
681cc5cd FT |
379 | unsigned long start_dma_addr; |
380 | unsigned long mask; | |
381 | unsigned long offset_slots; | |
382 | unsigned long max_slots; | |
383 | ||
384 | mask = dma_get_seg_boundary(hwdev); | |
70a7d3cc | 385 | start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; |
681cc5cd FT |
386 | |
387 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
388 | |
389 | /* | |
390 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
391 | */ | |
b15a3891 JB |
392 | max_slots = mask + 1 |
393 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
394 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
395 | |
396 | /* | |
397 | * For mappings greater than a page, we limit the stride (and | |
398 | * hence alignment) to a page size. | |
399 | */ | |
400 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
401 | if (size > PAGE_SIZE) | |
402 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
403 | else | |
404 | stride = 1; | |
405 | ||
34814545 | 406 | BUG_ON(!nslots); |
1da177e4 LT |
407 | |
408 | /* | |
409 | * Find suitable number of IO TLB entries size that will fit this | |
410 | * request and allocate a buffer from that IO TLB pool. | |
411 | */ | |
412 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
413 | index = ALIGN(io_tlb_index, stride); |
414 | if (index >= io_tlb_nslabs) | |
415 | index = 0; | |
416 | wrap = index; | |
417 | ||
418 | do { | |
a8522509 FT |
419 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
420 | max_slots)) { | |
b15a3891 JB |
421 | index += stride; |
422 | if (index >= io_tlb_nslabs) | |
423 | index = 0; | |
a7133a15 AM |
424 | if (index == wrap) |
425 | goto not_found; | |
426 | } | |
427 | ||
428 | /* | |
429 | * If we find a slot that indicates we have 'nslots' number of | |
430 | * contiguous buffers, we allocate the buffers from that slot | |
431 | * and mark the entries as '0' indicating unavailable. | |
432 | */ | |
433 | if (io_tlb_list[index] >= nslots) { | |
434 | int count = 0; | |
435 | ||
436 | for (i = index; i < (int) (index + nslots); i++) | |
437 | io_tlb_list[i] = 0; | |
438 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
439 | io_tlb_list[i] = ++count; | |
440 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 441 | |
a7133a15 AM |
442 | /* |
443 | * Update the indices to avoid searching in the next | |
444 | * round. | |
445 | */ | |
446 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
447 | ? (index + nslots) : 0); | |
448 | ||
449 | goto found; | |
450 | } | |
451 | index += stride; | |
452 | if (index >= io_tlb_nslabs) | |
453 | index = 0; | |
454 | } while (index != wrap); | |
455 | ||
456 | not_found: | |
457 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
458 | return NULL; | |
459 | found: | |
1da177e4 LT |
460 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
461 | ||
462 | /* | |
463 | * Save away the mapping from the original address to the DMA address. | |
464 | * This is needed when we sync the memory. Then we sync the buffer if | |
465 | * needed. | |
466 | */ | |
bc40ac66 BB |
467 | for (i = 0; i < nslots; i++) |
468 | io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); | |
1da177e4 | 469 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
fb05a379 | 470 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
1da177e4 LT |
471 | |
472 | return dma_addr; | |
473 | } | |
474 | ||
475 | /* | |
476 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
477 | */ | |
478 | static void | |
479 | unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | |
480 | { | |
481 | unsigned long flags; | |
482 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
483 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
bc40ac66 | 484 | phys_addr_t phys = io_tlb_orig_addr[index]; |
1da177e4 LT |
485 | |
486 | /* | |
487 | * First, sync the memory before unmapping the entry | |
488 | */ | |
bc40ac66 | 489 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
fb05a379 | 490 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
491 | |
492 | /* | |
493 | * Return the buffer to the free list by setting the corresponding | |
494 | * entries to indicate the number of contigous entries available. | |
495 | * While returning the entries to the free list, we merge the entries | |
496 | * with slots below and above the pool being returned. | |
497 | */ | |
498 | spin_lock_irqsave(&io_tlb_lock, flags); | |
499 | { | |
500 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
501 | io_tlb_list[index + nslots] : 0); | |
502 | /* | |
503 | * Step 1: return the slots to the free list, merging the | |
504 | * slots with superceeding slots | |
505 | */ | |
506 | for (i = index + nslots - 1; i >= index; i--) | |
507 | io_tlb_list[i] = ++count; | |
508 | /* | |
509 | * Step 2: merge the returned slots with the preceding slots, | |
510 | * if available (non zero) | |
511 | */ | |
512 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
513 | io_tlb_list[i] = ++count; | |
514 | } | |
515 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
516 | } | |
517 | ||
518 | static void | |
de69e0f0 JL |
519 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
520 | int dir, int target) | |
1da177e4 | 521 | { |
bc40ac66 BB |
522 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
523 | phys_addr_t phys = io_tlb_orig_addr[index]; | |
524 | ||
525 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
df336d1c | 526 | |
de69e0f0 JL |
527 | switch (target) { |
528 | case SYNC_FOR_CPU: | |
529 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 530 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
34814545 ES |
531 | else |
532 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
533 | break; |
534 | case SYNC_FOR_DEVICE: | |
535 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 536 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
34814545 ES |
537 | else |
538 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
539 | break; |
540 | default: | |
1da177e4 | 541 | BUG(); |
de69e0f0 | 542 | } |
1da177e4 LT |
543 | } |
544 | ||
545 | void * | |
546 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 547 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 548 | { |
563aaf06 | 549 | dma_addr_t dev_addr; |
1da177e4 LT |
550 | void *ret; |
551 | int order = get_order(size); | |
1e74f300 FT |
552 | u64 dma_mask = DMA_32BIT_MASK; |
553 | ||
554 | if (hwdev && hwdev->coherent_dma_mask) | |
555 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 556 | |
25667d67 | 557 | ret = (void *)__get_free_pages(flags, order); |
70a7d3cc JF |
558 | if (ret && |
559 | !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret), | |
560 | size)) { | |
1da177e4 LT |
561 | /* |
562 | * The allocated memory isn't reachable by the device. | |
563 | * Fall back on swiotlb_map_single(). | |
564 | */ | |
565 | free_pages((unsigned long) ret, order); | |
566 | ret = NULL; | |
567 | } | |
568 | if (!ret) { | |
569 | /* | |
570 | * We are either out of memory or the device can't DMA | |
571 | * to GFP_DMA memory; fall back on | |
572 | * swiotlb_map_single(), which will grab memory from | |
573 | * the lowest available address range. | |
574 | */ | |
bc40ac66 | 575 | ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
9dfda12b | 576 | if (!ret) |
1da177e4 | 577 | return NULL; |
1da177e4 LT |
578 | } |
579 | ||
580 | memset(ret, 0, size); | |
70a7d3cc | 581 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
1da177e4 LT |
582 | |
583 | /* Confirm address can be DMA'd by device */ | |
1e74f300 | 584 | if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) { |
563aaf06 | 585 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 586 | (unsigned long long)dma_mask, |
563aaf06 | 587 | (unsigned long long)dev_addr); |
a2b89b59 FT |
588 | |
589 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
590 | unmap_single(hwdev, ret, size, DMA_TO_DEVICE); | |
591 | return NULL; | |
1da177e4 LT |
592 | } |
593 | *dma_handle = dev_addr; | |
594 | return ret; | |
595 | } | |
874d6a95 | 596 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
597 | |
598 | void | |
599 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
600 | dma_addr_t dma_handle) | |
601 | { | |
aa24886e | 602 | WARN_ON(irqs_disabled()); |
640aebfe | 603 | if (!is_swiotlb_buffer(vaddr)) |
1da177e4 LT |
604 | free_pages((unsigned long) vaddr, get_order(size)); |
605 | else | |
606 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
21f6c4de | 607 | unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 | 608 | } |
874d6a95 | 609 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
610 | |
611 | static void | |
612 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
613 | { | |
614 | /* | |
615 | * Ran out of IOMMU space for this operation. This is very bad. | |
616 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 617 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
618 | * When the mapping is small enough return a static buffer to limit |
619 | * the damage, or panic when the transfer is too big. | |
620 | */ | |
563aaf06 | 621 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
94b32486 | 622 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
1da177e4 LT |
623 | |
624 | if (size > io_tlb_overflow && do_panic) { | |
17e5ad6c TL |
625 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
626 | panic("DMA: Memory would be corrupted\n"); | |
627 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
628 | panic("DMA: Random memory would be DMAed\n"); | |
1da177e4 LT |
629 | } |
630 | } | |
631 | ||
632 | /* | |
633 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 634 | * physical address to use is returned. |
1da177e4 LT |
635 | * |
636 | * Once the device is given the dma address, the device owns this memory until | |
637 | * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed. | |
638 | */ | |
639 | dma_addr_t | |
309df0c5 AK |
640 | swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size, |
641 | int dir, struct dma_attrs *attrs) | |
1da177e4 | 642 | { |
70a7d3cc | 643 | dma_addr_t dev_addr = swiotlb_virt_to_bus(hwdev, ptr); |
1da177e4 LT |
644 | void *map; |
645 | ||
34814545 | 646 | BUG_ON(dir == DMA_NONE); |
1da177e4 LT |
647 | /* |
648 | * If the pointer passed in happens to be in the device's DMA window, | |
649 | * we can safely return the device addr and not worry about bounce | |
650 | * buffering it. | |
651 | */ | |
b81ea27b IC |
652 | if (!address_needs_mapping(hwdev, dev_addr, size) && |
653 | !range_needs_mapping(ptr, size)) | |
1da177e4 LT |
654 | return dev_addr; |
655 | ||
656 | /* | |
657 | * Oh well, have to allocate and map a bounce buffer. | |
658 | */ | |
bc40ac66 | 659 | map = map_single(hwdev, virt_to_phys(ptr), size, dir); |
1da177e4 LT |
660 | if (!map) { |
661 | swiotlb_full(hwdev, size, dir, 1); | |
662 | map = io_tlb_overflow_buffer; | |
663 | } | |
664 | ||
70a7d3cc | 665 | dev_addr = swiotlb_virt_to_bus(hwdev, map); |
1da177e4 LT |
666 | |
667 | /* | |
668 | * Ensure that the address returned is DMA'ble | |
669 | */ | |
2797982e | 670 | if (address_needs_mapping(hwdev, dev_addr, size)) |
1da177e4 LT |
671 | panic("map_single: bounce buffer is not DMA'ble"); |
672 | ||
673 | return dev_addr; | |
674 | } | |
309df0c5 AK |
675 | EXPORT_SYMBOL(swiotlb_map_single_attrs); |
676 | ||
677 | dma_addr_t | |
678 | swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir) | |
679 | { | |
680 | return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL); | |
681 | } | |
874d6a95 | 682 | EXPORT_SYMBOL(swiotlb_map_single); |
1da177e4 | 683 | |
1da177e4 LT |
684 | /* |
685 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
686 | * match what was provided for in a previous swiotlb_map_single call. All | |
687 | * other usages are undefined. | |
688 | * | |
689 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
690 | * whatever the device wrote there. | |
691 | */ | |
692 | void | |
309df0c5 AK |
693 | swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr, |
694 | size_t size, int dir, struct dma_attrs *attrs) | |
1da177e4 | 695 | { |
e08e1f7a | 696 | char *dma_addr = swiotlb_bus_to_virt(dev_addr); |
1da177e4 | 697 | |
34814545 | 698 | BUG_ON(dir == DMA_NONE); |
640aebfe | 699 | if (is_swiotlb_buffer(dma_addr)) |
1da177e4 LT |
700 | unmap_single(hwdev, dma_addr, size, dir); |
701 | else if (dir == DMA_FROM_DEVICE) | |
cde14bbf | 702 | dma_mark_clean(dma_addr, size); |
1da177e4 | 703 | } |
309df0c5 | 704 | EXPORT_SYMBOL(swiotlb_unmap_single_attrs); |
1da177e4 | 705 | |
309df0c5 AK |
706 | void |
707 | swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size, | |
708 | int dir) | |
709 | { | |
710 | return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL); | |
711 | } | |
874d6a95 FT |
712 | EXPORT_SYMBOL(swiotlb_unmap_single); |
713 | ||
1da177e4 LT |
714 | /* |
715 | * Make physical memory consistent for a single streaming mode DMA translation | |
716 | * after a transfer. | |
717 | * | |
718 | * If you perform a swiotlb_map_single() but wish to interrogate the buffer | |
17e5ad6c TL |
719 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
720 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
721 | * address back to the card, you must first perform a |
722 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
723 | */ | |
be6b0267 | 724 | static void |
8270f3f1 | 725 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 726 | size_t size, int dir, int target) |
1da177e4 | 727 | { |
e08e1f7a | 728 | char *dma_addr = swiotlb_bus_to_virt(dev_addr); |
1da177e4 | 729 | |
34814545 | 730 | BUG_ON(dir == DMA_NONE); |
640aebfe | 731 | if (is_swiotlb_buffer(dma_addr)) |
de69e0f0 | 732 | sync_single(hwdev, dma_addr, size, dir, target); |
1da177e4 | 733 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 734 | dma_mark_clean(dma_addr, size); |
1da177e4 LT |
735 | } |
736 | ||
8270f3f1 JL |
737 | void |
738 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
739 | size_t size, int dir) | |
740 | { | |
de69e0f0 | 741 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 742 | } |
874d6a95 | 743 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 744 | |
1da177e4 LT |
745 | void |
746 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
747 | size_t size, int dir) | |
748 | { | |
de69e0f0 | 749 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 750 | } |
874d6a95 | 751 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 | 752 | |
878a97cf JL |
753 | /* |
754 | * Same as above, but for a sub-range of the mapping. | |
755 | */ | |
be6b0267 | 756 | static void |
878a97cf | 757 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
758 | unsigned long offset, size_t size, |
759 | int dir, int target) | |
878a97cf | 760 | { |
e08e1f7a | 761 | char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset; |
878a97cf | 762 | |
34814545 | 763 | BUG_ON(dir == DMA_NONE); |
640aebfe | 764 | if (is_swiotlb_buffer(dma_addr)) |
de69e0f0 | 765 | sync_single(hwdev, dma_addr, size, dir, target); |
878a97cf | 766 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 767 | dma_mark_clean(dma_addr, size); |
878a97cf JL |
768 | } |
769 | ||
770 | void | |
771 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
772 | unsigned long offset, size_t size, int dir) | |
773 | { | |
de69e0f0 JL |
774 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
775 | SYNC_FOR_CPU); | |
878a97cf | 776 | } |
874d6a95 | 777 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
878a97cf JL |
778 | |
779 | void | |
780 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
781 | unsigned long offset, size_t size, int dir) | |
782 | { | |
de69e0f0 JL |
783 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
784 | SYNC_FOR_DEVICE); | |
878a97cf | 785 | } |
874d6a95 | 786 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); |
878a97cf | 787 | |
1da177e4 LT |
788 | /* |
789 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
790 | * This is the scatter-gather version of the above swiotlb_map_single | |
791 | * interface. Here the scatter gather list elements are each tagged with the | |
792 | * appropriate dma address and length. They are obtained via | |
793 | * sg_dma_{address,length}(SG). | |
794 | * | |
795 | * NOTE: An implementation may be able to use a smaller number of | |
796 | * DMA address/length pairs than there are SG table elements. | |
797 | * (for example via virtual mapping capabilities) | |
798 | * The routine returns the number of addr/length pairs actually | |
799 | * used, at most nents. | |
800 | * | |
801 | * Device ownership issues as mentioned above for swiotlb_map_single are the | |
802 | * same here. | |
803 | */ | |
804 | int | |
309df0c5 AK |
805 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
806 | int dir, struct dma_attrs *attrs) | |
1da177e4 | 807 | { |
dbfd49fe | 808 | struct scatterlist *sg; |
1da177e4 LT |
809 | int i; |
810 | ||
34814545 | 811 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 812 | |
dbfd49fe | 813 | for_each_sg(sgl, sg, nelems, i) { |
bc40ac66 BB |
814 | void *addr = sg_virt(sg); |
815 | dma_addr_t dev_addr = swiotlb_virt_to_bus(hwdev, addr); | |
816 | ||
817 | if (range_needs_mapping(addr, sg->length) || | |
2797982e | 818 | address_needs_mapping(hwdev, dev_addr, sg->length)) { |
bc40ac66 BB |
819 | void *map = map_single(hwdev, sg_phys(sg), |
820 | sg->length, dir); | |
7e870233 | 821 | if (!map) { |
1da177e4 LT |
822 | /* Don't panic here, we expect map_sg users |
823 | to do proper error handling. */ | |
824 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
825 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
826 | attrs); | |
dbfd49fe | 827 | sgl[0].dma_length = 0; |
1da177e4 LT |
828 | return 0; |
829 | } | |
70a7d3cc | 830 | sg->dma_address = swiotlb_virt_to_bus(hwdev, map); |
1da177e4 LT |
831 | } else |
832 | sg->dma_address = dev_addr; | |
833 | sg->dma_length = sg->length; | |
834 | } | |
835 | return nelems; | |
836 | } | |
309df0c5 AK |
837 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
838 | ||
839 | int | |
840 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
841 | int dir) | |
842 | { | |
843 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
844 | } | |
874d6a95 | 845 | EXPORT_SYMBOL(swiotlb_map_sg); |
1da177e4 LT |
846 | |
847 | /* | |
848 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
849 | * concerning calls here are the same as for swiotlb_unmap_single() above. | |
850 | */ | |
851 | void | |
309df0c5 AK |
852 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
853 | int nelems, int dir, struct dma_attrs *attrs) | |
1da177e4 | 854 | { |
dbfd49fe | 855 | struct scatterlist *sg; |
1da177e4 LT |
856 | int i; |
857 | ||
34814545 | 858 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 859 | |
dbfd49fe | 860 | for_each_sg(sgl, sg, nelems, i) { |
fb05a379 | 861 | if (sg->dma_address != swiotlb_virt_to_bus(hwdev, sg_virt(sg))) |
e08e1f7a | 862 | unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address), |
93fbff63 | 863 | sg->dma_length, dir); |
1da177e4 | 864 | else if (dir == DMA_FROM_DEVICE) |
fb05a379 | 865 | dma_mark_clean(sg_virt(sg), sg->dma_length); |
dbfd49fe | 866 | } |
1da177e4 | 867 | } |
309df0c5 AK |
868 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
869 | ||
870 | void | |
871 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
872 | int dir) | |
873 | { | |
874 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
875 | } | |
874d6a95 | 876 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
1da177e4 LT |
877 | |
878 | /* | |
879 | * Make physical memory consistent for a set of streaming mode DMA translations | |
880 | * after a transfer. | |
881 | * | |
882 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
883 | * and usage. | |
884 | */ | |
be6b0267 | 885 | static void |
dbfd49fe | 886 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 887 | int nelems, int dir, int target) |
1da177e4 | 888 | { |
dbfd49fe | 889 | struct scatterlist *sg; |
1da177e4 LT |
890 | int i; |
891 | ||
34814545 | 892 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 893 | |
dbfd49fe | 894 | for_each_sg(sgl, sg, nelems, i) { |
fb05a379 | 895 | if (sg->dma_address != swiotlb_virt_to_bus(hwdev, sg_virt(sg))) |
e08e1f7a | 896 | sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address), |
de69e0f0 | 897 | sg->dma_length, dir, target); |
cde14bbf | 898 | else if (dir == DMA_FROM_DEVICE) |
fb05a379 | 899 | dma_mark_clean(sg_virt(sg), sg->dma_length); |
dbfd49fe | 900 | } |
1da177e4 LT |
901 | } |
902 | ||
8270f3f1 JL |
903 | void |
904 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
905 | int nelems, int dir) | |
906 | { | |
de69e0f0 | 907 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 908 | } |
874d6a95 | 909 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 910 | |
1da177e4 LT |
911 | void |
912 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
913 | int nelems, int dir) | |
914 | { | |
de69e0f0 | 915 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 916 | } |
874d6a95 | 917 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
918 | |
919 | int | |
8d8bb39b | 920 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 921 | { |
70a7d3cc | 922 | return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 923 | } |
874d6a95 | 924 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
925 | |
926 | /* | |
17e5ad6c | 927 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 928 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 929 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
930 | * this function. |
931 | */ | |
932 | int | |
563aaf06 | 933 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 934 | { |
70a7d3cc | 935 | return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 936 | } |
1da177e4 | 937 | EXPORT_SYMBOL(swiotlb_dma_supported); |