[linux.git] / drivers / leds / leds-lp5521.c

/*
 * LP5521 LED chip driver.
 *
 * Copyright (C) 2010 Nokia Corporation
 * Copyright (C) 2012 Texas Instruments
 *
 * Contact: Samu Onkalo <[email protected]>
 *          Milo(Woogyom) Kim <[email protected]>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 */

#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_data/leds-lp55xx.h>
#include <linux/slab.h>
#include <linux/of.h>

#include "leds-lp55xx-common.h"

#define LP5521_PROGRAM_LENGTH		32
#define LP5521_MAX_LEDS			3
#define LP5521_CMD_DIRECT		0x3F

/* Registers */
#define LP5521_REG_ENABLE		0x00
#define LP5521_REG_OP_MODE		0x01
#define LP5521_REG_R_PWM		0x02
#define LP5521_REG_G_PWM		0x03
#define LP5521_REG_B_PWM		0x04
#define LP5521_REG_R_CURRENT		0x05
#define LP5521_REG_G_CURRENT		0x06
#define LP5521_REG_B_CURRENT		0x07
#define LP5521_REG_CONFIG		0x08
#define LP5521_REG_STATUS		0x0C
#define LP5521_REG_RESET		0x0D
#define LP5521_REG_R_PROG_MEM		0x10
#define LP5521_REG_G_PROG_MEM		0x30
#define LP5521_REG_B_PROG_MEM		0x50

/* Base register to set LED current */
#define LP5521_REG_LED_CURRENT_BASE	LP5521_REG_R_CURRENT
/* Base register to set the brightness */
#define LP5521_REG_LED_PWM_BASE		LP5521_REG_R_PWM

/* Bits in ENABLE register */
#define LP5521_MASTER_ENABLE		0x40	/* Chip master enable */
#define LP5521_LOGARITHMIC_PWM		0x80	/* Logarithmic PWM adjustment */
#define LP5521_EXEC_RUN			0x2A
#define LP5521_ENABLE_DEFAULT	\
	(LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
#define LP5521_ENABLE_RUN_PROGRAM	\
	(LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)

/* CONFIG register */
#define LP5521_PWM_HF			0x40	/* PWM: 0 = 256Hz, 1 = 558Hz */
#define LP5521_PWRSAVE_EN		0x20	/* 1 = Power save mode */
#define LP5521_CP_MODE_OFF		0	/* Charge pump (CP) off */
#define LP5521_CP_MODE_BYPASS		8	/* CP forced to bypass mode */
#define LP5521_CP_MODE_1X5		0x10	/* CP forced to 1.5x mode */
#define LP5521_CP_MODE_AUTO		0x18	/* Automatic mode selection */
#define LP5521_R_TO_BATT		0x04	/* R out: 0 = CP, 1 = Vbat */
#define LP5521_CLK_INT			0x01	/* Internal clock */
#define LP5521_DEFAULT_CFG		\
	(LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO)

/* Status */
#define LP5521_EXT_CLK_USED		0x08

/* default R channel current register value */
#define LP5521_REG_R_CURR_DEFAULT	0xAF

/* Reset register value */
#define LP5521_RESET			0xFF

/* Program Memory Operations */
#define LP5521_MODE_R_M			0x30	/* Operation Mode Register */
#define LP5521_MODE_G_M			0x0C
#define LP5521_MODE_B_M			0x03
#define LP5521_LOAD_R			0x10
#define LP5521_LOAD_G			0x04
#define LP5521_LOAD_B			0x01

#define LP5521_R_IS_LOADING(mode)	\
	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
#define LP5521_G_IS_LOADING(mode)	\
	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
#define LP5521_B_IS_LOADING(mode)	\
	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)

#define LP5521_EXEC_R_M			0x30	/* Enable Register */
#define LP5521_EXEC_G_M			0x0C
#define LP5521_EXEC_B_M			0x03
#define LP5521_EXEC_M			0x3F
#define LP5521_RUN_R			0x20
#define LP5521_RUN_G			0x08
#define LP5521_RUN_B			0x02

static inline void lp5521_wait_opmode_done(void)
{
	/* operation mode change needs to be longer than 153 us */
	usleep_range(200, 300);
}

static inline void lp5521_wait_enable_done(void)
{
	/* it takes more 488 us to update ENABLE register */
	usleep_range(500, 600);
}

static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
{
	led->led_current = led_current;
	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
		led_current);
}

static void lp5521_load_engine(struct lp55xx_chip *chip)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	u8 mask[] = {
		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	};

	u8 val[] = {
		[LP55XX_ENGINE_1] = LP5521_LOAD_R,
		[LP55XX_ENGINE_2] = LP5521_LOAD_G,
		[LP55XX_ENGINE_3] = LP5521_LOAD_B,
	};

	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);

	lp5521_wait_opmode_done();
}

static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
{
	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
	lp5521_wait_opmode_done();
}

static void lp5521_stop_engine(struct lp55xx_chip *chip)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	u8 mask[] = {
		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	};

	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);

	lp5521_wait_opmode_done();
}

static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
{
	int ret;
	u8 mode;
	u8 exec;

	/* stop engine */
	if (!start) {
		lp5521_stop_engine(chip);
		lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
		lp5521_wait_opmode_done();
		return;
	}

	/*
	 * To run the engine,
	 * operation mode and enable register should updated at the same time
	 */

	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
	if (ret)
		return;

	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
	if (ret)
		return;

	/* change operation mode to RUN only when each engine is loading */
	if (LP5521_R_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
		exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
	}

	if (LP5521_G_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
		exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
	}

	if (LP5521_B_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
		exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
	}

	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
	lp5521_wait_opmode_done();

	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
	lp5521_wait_enable_done();
}

static int lp5521_update_program_memory(struct lp55xx_chip *chip,
					const u8 *data, size_t size)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
	u8 addr[] = {
		[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
		[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
		[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
	};
	unsigned cmd;
	char c[3];
	int nrchars;
	int ret;
	int offset = 0;
	int i = 0;

	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
		/* separate sscanfs because length is working only for %s */
		ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
		if (ret != 1)
			goto err;

		ret = sscanf(c, "%2x", &cmd);
		if (ret != 1)
			goto err;

		pattern[i] = (u8)cmd;
		offset += nrchars;
		i++;
	}

	/* Each instruction is 16bit long. Check that length is even */
	if (i % 2)
		goto err;

	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
		ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
		if (ret)
			return -EINVAL;
	}

	return size;

err:
	dev_err(&chip->cl->dev, "wrong pattern format\n");
	return -EINVAL;
}

static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
{
	const struct firmware *fw = chip->fw;

	if (fw->size > LP5521_PROGRAM_LENGTH) {
		dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
			fw->size);
		return;
	}

	/*
	 * Program momery sequence
	 *  1) set engine mode to "LOAD"
	 *  2) write firmware data into program memory
	 */

	lp5521_load_engine(chip);
	lp5521_update_program_memory(chip, fw->data, fw->size);
}

static int lp5521_post_init_device(struct lp55xx_chip *chip)
{
	int ret;
	u8 val;

	/*
	 * Make sure that the chip is reset by reading back the r channel
	 * current reg. This is dummy read is required on some platforms -
	 * otherwise further access to the R G B channels in the
	 * LP5521_REG_ENABLE register will not have any effect - strange!
	 */
	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
	if (ret) {
		dev_err(&chip->cl->dev, "error in resetting chip\n");
		return ret;
	}
	if (val != LP5521_REG_R_CURR_DEFAULT) {
		dev_err(&chip->cl->dev,
			"unexpected data in register (expected 0x%x got 0x%x)\n",
			LP5521_REG_R_CURR_DEFAULT, val);
		ret = -EINVAL;
		return ret;
	}
	usleep_range(10000, 20000);

	/* Set all PWMs to direct control mode */
	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);

	/* Update configuration for the clock setting */
	val = LP5521_DEFAULT_CFG;
	if (!lp55xx_is_extclk_used(chip))
		val |= LP5521_CLK_INT;

	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
	if (ret)
		return ret;

	/* Initialize all channels PWM to zero -> leds off */
	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
	lp55xx_write(chip, LP5521_REG_B_PWM, 0);

	/* Set engines are set to run state when OP_MODE enables engines */
	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
	if (ret)
		return ret;

	lp5521_wait_enable_done();

	return 0;
}

static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
{
	struct lp55xx_platform_data *pdata = chip->pdata;
	int ret;
	u8 status;

	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
	if (ret < 0)
		return ret;

	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
		return 0;

	/* Check that ext clock is really in use if requested */
	if  ((status & LP5521_EXT_CLK_USED) == 0)
		return -EIO;

	return 0;
}

static void lp5521_led_brightness_work(struct work_struct *work)
{
	struct lp55xx_led *led = container_of(work, struct lp55xx_led,
					      brightness_work);
	struct lp55xx_chip *chip = led->chip;

	mutex_lock(&chip->lock);
	lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
		led->brightness);
	mutex_unlock(&chip->lock);
}

static ssize_t show_engine_mode(struct device *dev,
				struct device_attribute *attr,
				char *buf, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;

	switch (mode) {
	case LP55XX_ENGINE_RUN:
		return sprintf(buf, "run\n");
	case LP55XX_ENGINE_LOAD:
		return sprintf(buf, "load\n");
	case LP55XX_ENGINE_DISABLED:
	default:
		return sprintf(buf, "disabled\n");
	}
}
show_mode(1)
show_mode(2)
show_mode(3)

static ssize_t store_engine_mode(struct device *dev,
				 struct device_attribute *attr,
				 const char *buf, size_t len, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	struct lp55xx_engine *engine = &chip->engines[nr - 1];

	mutex_lock(&chip->lock);

	chip->engine_idx = nr;

	if (!strncmp(buf, "run", 3)) {
		lp5521_run_engine(chip, true);
		engine->mode = LP55XX_ENGINE_RUN;
	} else if (!strncmp(buf, "load", 4)) {
		lp5521_stop_engine(chip);
		lp5521_load_engine(chip);
		engine->mode = LP55XX_ENGINE_LOAD;
	} else if (!strncmp(buf, "disabled", 8)) {
		lp5521_stop_engine(chip);
		engine->mode = LP55XX_ENGINE_DISABLED;
	}

	mutex_unlock(&chip->lock);

	return len;
}
store_mode(1)
store_mode(2)
store_mode(3)

static ssize_t store_engine_load(struct device *dev,
			     struct device_attribute *attr,
			     const char *buf, size_t len, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	int ret;

	mutex_lock(&chip->lock);

	chip->engine_idx = nr;
	lp5521_load_engine(chip);
	ret = lp5521_update_program_memory(chip, buf, len);

	mutex_unlock(&chip->lock);

	return ret;
}
store_load(1)
store_load(2)
store_load(3)

static ssize_t lp5521_selftest(struct device *dev,
			       struct device_attribute *attr,
			       char *buf)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	int ret;

	mutex_lock(&chip->lock);
	ret = lp5521_run_selftest(chip, buf);
	mutex_unlock(&chip->lock);

	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
}

/* device attributes */
static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);

static struct attribute *lp5521_attributes[] = {
	&dev_attr_engine1_mode.attr,
	&dev_attr_engine2_mode.attr,
	&dev_attr_engine3_mode.attr,
	&dev_attr_engine1_load.attr,
	&dev_attr_engine2_load.attr,
	&dev_attr_engine3_load.attr,
	&dev_attr_selftest.attr,
	NULL
};

static const struct attribute_group lp5521_group = {
	.attrs = lp5521_attributes,
};

/* Chip specific configurations */
static struct lp55xx_device_config lp5521_cfg = {
	.reset = {
		.addr = LP5521_REG_RESET,
		.val  = LP5521_RESET,
	},
	.enable = {
		.addr = LP5521_REG_ENABLE,
		.val  = LP5521_ENABLE_DEFAULT,
	},
	.max_channel  = LP5521_MAX_LEDS,
	.post_init_device   = lp5521_post_init_device,
	.brightness_work_fn = lp5521_led_brightness_work,
	.set_led_current    = lp5521_set_led_current,
	.firmware_cb        = lp5521_firmware_loaded,
	.run_engine         = lp5521_run_engine,
	.dev_attr_group     = &lp5521_group,
};

static int lp5521_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	int ret;
	struct lp55xx_chip *chip;
	struct lp55xx_led *led;
	struct lp55xx_platform_data *pdata;
	struct device_node *np = client->dev.of_node;

	if (!dev_get_platdata(&client->dev)) {
		if (np) {
			ret = lp55xx_of_populate_pdata(&client->dev, np);
			if (ret < 0)
				return ret;
		} else {
			dev_err(&client->dev, "no platform data\n");
			return -EINVAL;
		}
	}
	pdata = dev_get_platdata(&client->dev);

	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	led = devm_kzalloc(&client->dev,
			sizeof(*led) * pdata->num_channels, GFP_KERNEL);
	if (!led)
		return -ENOMEM;

	chip->cl = client;
	chip->pdata = pdata;
	chip->cfg = &lp5521_cfg;

	mutex_init(&chip->lock);

	i2c_set_clientdata(client, led);

	ret = lp55xx_init_device(chip);
	if (ret)
		goto err_init;

	dev_info(&client->dev, "%s programmable led chip found\n", id->name);

	ret = lp55xx_register_leds(led, chip);
	if (ret)
		goto err_register_leds;

	ret = lp55xx_register_sysfs(chip);
	if (ret) {
		dev_err(&client->dev, "registering sysfs failed\n");
		goto err_register_sysfs;
	}

	return 0;

err_register_sysfs:
	lp55xx_unregister_leds(led, chip);
err_register_leds:
	lp55xx_deinit_device(chip);
err_init:
	return ret;
}

static int lp5521_remove(struct i2c_client *client)
{
	struct lp55xx_led *led = i2c_get_clientdata(client);
	struct lp55xx_chip *chip = led->chip;

	lp5521_stop_all_engines(chip);
	lp55xx_unregister_sysfs(chip);
	lp55xx_unregister_leds(led, chip);
	lp55xx_deinit_device(chip);

	return 0;
}

static const struct i2c_device_id lp5521_id[] = {
	{ "lp5521", 0 }, /* Three channel chip */
	{ }
};
MODULE_DEVICE_TABLE(i2c, lp5521_id);

#ifdef CONFIG_OF
static const struct of_device_id of_lp5521_leds_match[] = {
	{ .compatible = "national,lp5521", },
	{},
};

MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
#endif
static struct i2c_driver lp5521_driver = {
	.driver = {
		.name	= "lp5521",
		.of_match_table = of_match_ptr(of_lp5521_leds_match),
	},
	.probe		= lp5521_probe,
	.remove		= lp5521_remove,
	.id_table	= lp5521_id,
};

module_i2c_driver(lp5521_driver);

MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
MODULE_AUTHOR("Milo Kim <[email protected]>");
MODULE_DESCRIPTION("LP5521 LED engine");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
500fe141 SO	1	/*
	2	* LP5521 LED chip driver.
	3	*
	4	* Copyright (C) 2010 Nokia Corporation
a2387cb9	5	* Copyright (C) 2012 Texas Instruments
500fe141 SO	6	*
500fe141 SO	7	* Contact: Samu Onkalo <[email protected]>
a2387cb9	8	* Milo(Woogyom) Kim <[email protected]>
500fe141 SO	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* version 2 as published by the Free Software Foundation.
	13	*
	14	* This program is distributed in the hope that it will be useful, but
	15	* WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	17	* General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	22	* 02110-1301 USA
	23	*/
	24
500fe141	25	#include <linux/delay.h>
79bcc10b MWK	26	#include <linux/firmware.h>
79bcc10b MWK	27	#include <linux/i2c.h>
500fe141	28	#include <linux/leds.h>
79bcc10b MWK	29	#include <linux/module.h>
79bcc10b MWK	30	#include <linux/mutex.h>
6a0c9a47	31	#include <linux/platform_data/leds-lp55xx.h>
79bcc10b	32	#include <linux/slab.h>
7542a04b	33	#include <linux/of.h>
6a0c9a47 MWK	34
6a0c9a47 MWK	35	#include "leds-lp55xx-common.h"
500fe141	36
12f022d2 MWK	37	#define LP5521_PROGRAM_LENGTH 32
	38	#define LP5521_MAX_LEDS 3
	39	#define LP5521_CMD_DIRECT 0x3F
500fe141 SO	40
	41	/* Registers */
	42	#define LP5521_REG_ENABLE 0x00
	43	#define LP5521_REG_OP_MODE 0x01
	44	#define LP5521_REG_R_PWM 0x02
	45	#define LP5521_REG_G_PWM 0x03
	46	#define LP5521_REG_B_PWM 0x04
	47	#define LP5521_REG_R_CURRENT 0x05
	48	#define LP5521_REG_G_CURRENT 0x06
	49	#define LP5521_REG_B_CURRENT 0x07
	50	#define LP5521_REG_CONFIG 0x08
500fe141 SO	51	#define LP5521_REG_STATUS 0x0C
500fe141 SO	52	#define LP5521_REG_RESET 0x0D
500fe141 SO	53	#define LP5521_REG_R_PROG_MEM 0x10
	54	#define LP5521_REG_G_PROG_MEM 0x30
	55	#define LP5521_REG_B_PROG_MEM 0x50
	56
500fe141 SO	57	/* Base register to set LED current */
500fe141 SO	58	#define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT
500fe141 SO	59	/* Base register to set the brightness */
	60	#define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM
	61
	62	/* Bits in ENABLE register */
	63	#define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */
	64	#define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */
	65	#define LP5521_EXEC_RUN 0x2A
32a2f747 KM	66	#define LP5521_ENABLE_DEFAULT \
	67	(LP5521_MASTER_ENABLE \| LP5521_LOGARITHMIC_PWM)
	68	#define LP5521_ENABLE_RUN_PROGRAM \
	69	(LP5521_ENABLE_DEFAULT \| LP5521_EXEC_RUN)
500fe141	70
81f2a5b4 KM	71	/* CONFIG register */
	72	#define LP5521_PWM_HF 0x40 /* PWM: 0 = 256Hz, 1 = 558Hz */
	73	#define LP5521_PWRSAVE_EN 0x20 /* 1 = Power save mode */
	74	#define LP5521_CP_MODE_OFF 0 /* Charge pump (CP) off */
	75	#define LP5521_CP_MODE_BYPASS 8 /* CP forced to bypass mode */
	76	#define LP5521_CP_MODE_1X5 0x10 /* CP forced to 1.5x mode */
	77	#define LP5521_CP_MODE_AUTO 0x18 /* Automatic mode selection */
	78	#define LP5521_R_TO_BATT 0x04 /* R out: 0 = CP, 1 = Vbat */
	79	#define LP5521_CLK_INT 0x01 /* Internal clock */
	80	#define LP5521_DEFAULT_CFG \
	81	(LP5521_PWM_HF \| LP5521_PWRSAVE_EN \| LP5521_CP_MODE_AUTO)
	82
500fe141 SO	83	/* Status */
	84	#define LP5521_EXT_CLK_USED 0x08
	85
b3c49c05 SK	86	/* default R channel current register value */
	87	#define LP5521_REG_R_CURR_DEFAULT 0xAF
	88
48068d5d MWK	89	/* Reset register value */
	90	#define LP5521_RESET 0xFF
	91
9ce7cb17 MWK	92	/* Program Memory Operations */
	93	#define LP5521_MODE_R_M 0x30 /* Operation Mode Register */
	94	#define LP5521_MODE_G_M 0x0C
	95	#define LP5521_MODE_B_M 0x03
	96	#define LP5521_LOAD_R 0x10
	97	#define LP5521_LOAD_G 0x04
	98	#define LP5521_LOAD_B 0x01
	99
	100	#define LP5521_R_IS_LOADING(mode) \
	101	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
	102	#define LP5521_G_IS_LOADING(mode) \
	103	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
	104	#define LP5521_B_IS_LOADING(mode) \
	105	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
	106
	107	#define LP5521_EXEC_R_M 0x30 /* Enable Register */
	108	#define LP5521_EXEC_G_M 0x0C
	109	#define LP5521_EXEC_B_M 0x03
	110	#define LP5521_EXEC_M 0x3F
	111	#define LP5521_RUN_R 0x20
	112	#define LP5521_RUN_G 0x08
	113	#define LP5521_RUN_B 0x02
500fe141	114
9ce7cb17 MWK	115	static inline void lp5521_wait_opmode_done(void)
	116	{
	117	/* operation mode change needs to be longer than 153 us */
	118	usleep_range(200, 300);
	119	}
	120
94482174 MWK	121	static inline void lp5521_wait_enable_done(void)
	122	{
	123	/* it takes more 488 us to update ENABLE register */
	124	usleep_range(500, 600);
	125	}
	126
a96bfa13 MWK	127	static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
	128	{
	129	led->led_current = led_current;
	130	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
	131	led_current);
	132	}
	133
9ce7cb17	134	static void lp5521_load_engine(struct lp55xx_chip *chip)
500fe141	135	{
9ce7cb17 MWK	136	enum lp55xx_engine_index idx = chip->engine_idx;
	137	u8 mask[] = {
	138	[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
	139	[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
	140	[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	141	};
500fe141	142
9ce7cb17 MWK	143	u8 val[] = {
	144	[LP55XX_ENGINE_1] = LP5521_LOAD_R,
	145	[LP55XX_ENGINE_2] = LP5521_LOAD_G,
	146	[LP55XX_ENGINE_3] = LP5521_LOAD_B,
	147	};
500fe141	148
9ce7cb17	149	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
500fe141	150
9ce7cb17 MWK	151	lp5521_wait_opmode_done();
9ce7cb17 MWK	152	}
500fe141	153
28c9266b	154	static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
9ce7cb17 MWK	155	{
	156	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
	157	lp5521_wait_opmode_done();
500fe141 SO	158	}
500fe141 SO	159
28c9266b MK	160	static void lp5521_stop_engine(struct lp55xx_chip *chip)
	161	{
	162	enum lp55xx_engine_index idx = chip->engine_idx;
	163	u8 mask[] = {
	164	[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
	165	[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
	166	[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	167	};
	168
	169	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);
	170
	171	lp5521_wait_opmode_done();
	172	}
	173
9ce7cb17	174	static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
500fe141	175	{
500fe141	176	int ret;
500fe141	177	u8 mode;
9ce7cb17	178	u8 exec;
500fe141	179
9ce7cb17 MWK	180	/* stop engine */
	181	if (!start) {
	182	lp5521_stop_engine(chip);
	183	lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
	184	lp5521_wait_opmode_done();
	185	return;
	186	}
	187
	188	/*
	189	* To run the engine,
	190	* operation mode and enable register should updated at the same time
	191	*/
	192
	193	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
5bc9ad77	194	if (ret)
9ce7cb17	195	return;
5bc9ad77	196
9ce7cb17	197	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
5bc9ad77	198	if (ret)
9ce7cb17 MWK	199	return;
	200
	201	/* change operation mode to RUN only when each engine is loading */
	202	if (LP5521_R_IS_LOADING(mode)) {
	203	mode = (mode & ~LP5521_MODE_R_M) \| LP5521_RUN_R;
	204	exec = (exec & ~LP5521_EXEC_R_M) \| LP5521_RUN_R;
	205	}
	206
	207	if (LP5521_G_IS_LOADING(mode)) {
	208	mode = (mode & ~LP5521_MODE_G_M) \| LP5521_RUN_G;
	209	exec = (exec & ~LP5521_EXEC_G_M) \| LP5521_RUN_G;
	210	}
	211
	212	if (LP5521_B_IS_LOADING(mode)) {
	213	mode = (mode & ~LP5521_MODE_B_M) \| LP5521_RUN_B;
	214	exec = (exec & ~LP5521_EXEC_B_M) \| LP5521_RUN_B;
	215	}
	216
	217	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
	218	lp5521_wait_opmode_done();
	219
	220	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
	221	lp5521_wait_enable_done();
	222	}
	223
	224	static int lp5521_update_program_memory(struct lp55xx_chip *chip,
	225	const u8 *data, size_t size)
	226	{
	227	enum lp55xx_engine_index idx = chip->engine_idx;
	228	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
	229	u8 addr[] = {
	230	[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
	231	[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
	232	[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
	233	};
	234	unsigned cmd;
	235	char c[3];
9ce7cb17	236	int nrchars;
9ce7cb17	237	int ret;
1eca0b3a MK	238	int offset = 0;
1eca0b3a MK	239	int i = 0;
9ce7cb17	240
9ce7cb17 MWK	241	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
	242	/* separate sscanfs because length is working only for %s */
	243	ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
	244	if (ret != 1)
	245	goto err;
	246
	247	ret = sscanf(c, "%2x", &cmd);
	248	if (ret != 1)
	249	goto err;
	250
	251	pattern[i] = (u8)cmd;
	252	offset += nrchars;
	253	i++;
	254	}
	255
	256	/* Each instruction is 16bit long. Check that length is even */
	257	if (i % 2)
	258	goto err;
	259
1eca0b3a	260	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
c0e5e9b5	261	ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
e70988d1	262	if (ret)
c0e5e9b5	263	return -EINVAL;
c0e5e9b5 MK	264	}
c0e5e9b5 MK	265
c0e5e9b5	266	return size;
9ce7cb17 MWK	267
	268	err:
	269	dev_err(&chip->cl->dev, "wrong pattern format\n");
	270	return -EINVAL;
	271	}
	272
	273	static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
	274	{
	275	const struct firmware *fw = chip->fw;
	276
	277	if (fw->size > LP5521_PROGRAM_LENGTH) {
	278	dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
	279	fw->size);
	280	return;
	281	}
500fe141	282
9ce7cb17 MWK	283	/*
	284	* Program momery sequence
	285	* 1) set engine mode to "LOAD"
	286	* 2) write firmware data into program memory
	287	*/
	288
	289	lp5521_load_engine(chip);
	290	lp5521_update_program_memory(chip, fw->data, fw->size);
500fe141 SO	291	}
500fe141 SO	292
ffbdccdb	293	static int lp5521_post_init_device(struct lp55xx_chip *chip)
500fe141	294	{
500fe141	295	int ret;
94482174	296	u8 val;
500fe141	297
94482174 MWK	298	/*
	299	* Make sure that the chip is reset by reading back the r channel
	300	* current reg. This is dummy read is required on some platforms -
	301	* otherwise further access to the R G B channels in the
	302	* LP5521_REG_ENABLE register will not have any effect - strange!
	303	*/
ffbdccdb	304	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
94482174	305	if (ret) {
ffbdccdb	306	dev_err(&chip->cl->dev, "error in resetting chip\n");
94482174 MWK	307	return ret;
	308	}
	309	if (val != LP5521_REG_R_CURR_DEFAULT) {
ffbdccdb	310	dev_err(&chip->cl->dev,
94482174 MWK	311	"unexpected data in register (expected 0x%x got 0x%x)\n",
	312	LP5521_REG_R_CURR_DEFAULT, val);
	313	ret = -EINVAL;
	314	return ret;
	315	}
	316	usleep_range(10000, 20000);
500fe141	317
500fe141	318	/* Set all PWMs to direct control mode */
ffbdccdb	319	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
500fe141	320
81f2a5b4 KM	321	/* Update configuration for the clock setting */
	322	val = LP5521_DEFAULT_CFG;
	323	if (!lp55xx_is_extclk_used(chip))
	324	val \|= LP5521_CLK_INT;
	325
ffbdccdb	326	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
94482174 MWK	327	if (ret)
94482174 MWK	328	return ret;
500fe141 SO	329
500fe141 SO	330	/* Initialize all channels PWM to zero -> leds off */
ffbdccdb MWK	331	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
	332	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
	333	lp55xx_write(chip, LP5521_REG_B_PWM, 0);
500fe141 SO	334
500fe141 SO	335	/* Set engines are set to run state when OP_MODE enables engines */
ffbdccdb	336	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
94482174 MWK	337	if (ret)
94482174 MWK	338	return ret;
500fe141	339
94482174 MWK	340	lp5521_wait_enable_done();
	341
	342	return 0;
500fe141 SO	343	}
500fe141 SO	344
9ca3bd80	345	static int lp5521_run_selftest(struct lp55xx_chip chip, char buf)
500fe141	346	{
9ca3bd80	347	struct lp55xx_platform_data *pdata = chip->pdata;
500fe141 SO	348	int ret;
	349	u8 status;
	350
9ca3bd80	351	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
500fe141 SO	352	if (ret < 0)
	353	return ret;
	354
9ca3bd80 MWK	355	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
	356	return 0;
	357
500fe141	358	/* Check that ext clock is really in use if requested */
9ca3bd80 MWK	359	if ((status & LP5521_EXT_CLK_USED) == 0)
	360	return -EIO;
	361
500fe141 SO	362	return 0;
	363	}
	364
500fe141 SO	365	static void lp5521_led_brightness_work(struct work_struct *work)
500fe141 SO	366	{
a6e4679a	367	struct lp55xx_led *led = container_of(work, struct lp55xx_led,
500fe141	368	brightness_work);
a6e4679a	369	struct lp55xx_chip *chip = led->chip;
500fe141 SO	370
500fe141 SO	371	mutex_lock(&chip->lock);
a6e4679a	372	lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
500fe141 SO	373	led->brightness);
	374	mutex_unlock(&chip->lock);
	375	}
	376
c0e5e9b5 MK	377	static ssize_t show_engine_mode(struct device *dev,
	378	struct device_attribute *attr,
	379	char *buf, int nr)
	380	{
	381	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	382	struct lp55xx_chip *chip = led->chip;
	383	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
	384
	385	switch (mode) {
	386	case LP55XX_ENGINE_RUN:
	387	return sprintf(buf, "run\n");
	388	case LP55XX_ENGINE_LOAD:
	389	return sprintf(buf, "load\n");
	390	case LP55XX_ENGINE_DISABLED:
	391	default:
	392	return sprintf(buf, "disabled\n");
	393	}
	394	}
	395	show_mode(1)
	396	show_mode(2)
	397	show_mode(3)
	398
	399	static ssize_t store_engine_mode(struct device *dev,
	400	struct device_attribute *attr,
	401	const char *buf, size_t len, int nr)
	402	{
	403	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	404	struct lp55xx_chip *chip = led->chip;
	405	struct lp55xx_engine *engine = &chip->engines[nr - 1];
	406
	407	mutex_lock(&chip->lock);
	408
	409	chip->engine_idx = nr;
	410
	411	if (!strncmp(buf, "run", 3)) {
	412	lp5521_run_engine(chip, true);
	413	engine->mode = LP55XX_ENGINE_RUN;
	414	} else if (!strncmp(buf, "load", 4)) {
	415	lp5521_stop_engine(chip);
	416	lp5521_load_engine(chip);
	417	engine->mode = LP55XX_ENGINE_LOAD;
	418	} else if (!strncmp(buf, "disabled", 8)) {
	419	lp5521_stop_engine(chip);
	420	engine->mode = LP55XX_ENGINE_DISABLED;
	421	}
	422
	423	mutex_unlock(&chip->lock);
	424
	425	return len;
	426	}
	427	store_mode(1)
	428	store_mode(2)
	429	store_mode(3)
	430
	431	static ssize_t store_engine_load(struct device *dev,
	432	struct device_attribute *attr,
	433	const char *buf, size_t len, int nr)
	434	{
	435	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	436	struct lp55xx_chip *chip = led->chip;
e70988d1	437	int ret;
c0e5e9b5 MK	438
	439	mutex_lock(&chip->lock);
	440
	441	chip->engine_idx = nr;
	442	lp5521_load_engine(chip);
e70988d1	443	ret = lp5521_update_program_memory(chip, buf, len);
c0e5e9b5 MK	444
	445	mutex_unlock(&chip->lock);
	446
e70988d1	447	return ret;
c0e5e9b5 MK	448	}
	449	store_load(1)
	450	store_load(2)
	451	store_load(3)
	452
500fe141 SO	453	static ssize_t lp5521_selftest(struct device *dev,
	454	struct device_attribute *attr,
	455	char *buf)
	456	{
9ca3bd80 MWK	457	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
9ca3bd80 MWK	458	struct lp55xx_chip *chip = led->chip;
500fe141 SO	459	int ret;
	460
	461	mutex_lock(&chip->lock);
	462	ret = lp5521_run_selftest(chip, buf);
	463	mutex_unlock(&chip->lock);
24d32128 KM	464
24d32128 KM	465	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
500fe141 SO	466	}
500fe141 SO	467
500fe141	468	/* device attributes */
c0e5e9b5 MK	469	static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
	470	static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
	471	static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
	472	static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
	473	static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
	474	static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
	475	static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
500fe141 SO	476
500fe141 SO	477	static struct attribute *lp5521_attributes[] = {
c0e5e9b5 MK	478	&dev_attr_engine1_mode.attr,
	479	&dev_attr_engine2_mode.attr,
	480	&dev_attr_engine3_mode.attr,
	481	&dev_attr_engine1_load.attr,
	482	&dev_attr_engine2_load.attr,
	483	&dev_attr_engine3_load.attr,
500fe141	484	&dev_attr_selftest.attr,
500fe141 SO	485	NULL
	486	};
	487
	488	static const struct attribute_group lp5521_group = {
	489	.attrs = lp5521_attributes,
	490	};
	491
48068d5d MWK	492	/* Chip specific configurations */
	493	static struct lp55xx_device_config lp5521_cfg = {
	494	.reset = {
	495	.addr = LP5521_REG_RESET,
	496	.val = LP5521_RESET,
	497	},
e3a700d8 MWK	498	.enable = {
	499	.addr = LP5521_REG_ENABLE,
	500	.val = LP5521_ENABLE_DEFAULT,
	501	},
0e202346	502	.max_channel = LP5521_MAX_LEDS,
ffbdccdb	503	.post_init_device = lp5521_post_init_device,
a6e4679a	504	.brightness_work_fn = lp5521_led_brightness_work,
a96bfa13	505	.set_led_current = lp5521_set_led_current,
9ce7cb17 MWK	506	.firmware_cb = lp5521_firmware_loaded,
9ce7cb17 MWK	507	.run_engine = lp5521_run_engine,
e73c0ce6	508	.dev_attr_group = &lp5521_group,
48068d5d MWK	509	};
48068d5d MWK	510
98ea1ea2	511	static int lp5521_probe(struct i2c_client *client,
500fe141 SO	512	const struct i2c_device_id *id)
500fe141 SO	513	{
1904f83d	514	int ret;
6a0c9a47 MWK	515	struct lp55xx_chip *chip;
6a0c9a47 MWK	516	struct lp55xx_led *led;
7542a04b LW	517	struct lp55xx_platform_data *pdata;
	518	struct device_node *np = client->dev.of_node;
	519
87aae1ea	520	if (!dev_get_platdata(&client->dev)) {
7542a04b LW	521	if (np) {
	522	ret = lp55xx_of_populate_pdata(&client->dev, np);
	523	if (ret < 0)
	524	return ret;
	525	} else {
	526	dev_err(&client->dev, "no platform data\n");
	527	return -EINVAL;
	528	}
500fe141	529	}
87aae1ea	530	pdata = dev_get_platdata(&client->dev);
500fe141	531
6a0c9a47 MWK	532	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
	533	if (!chip)
	534	return -ENOMEM;
	535
	536	led = devm_kzalloc(&client->dev,
	537	sizeof(led) pdata->num_channels, GFP_KERNEL);
	538	if (!led)
	539	return -ENOMEM;
	540
	541	chip->cl = client;
	542	chip->pdata = pdata;
48068d5d	543	chip->cfg = &lp5521_cfg;
6a0c9a47 MWK	544
6a0c9a47 MWK	545	mutex_init(&chip->lock);
500fe141	546
6a0c9a47	547	i2c_set_clientdata(client, led);
500fe141	548
22ebeb48	549	ret = lp55xx_init_device(chip);
944f7b1d	550	if (ret)
f6c64c6f	551	goto err_init;
500fe141 SO	552
	553	dev_info(&client->dev, "%s programmable led chip found\n", id->name);
	554
9e9b3db1	555	ret = lp55xx_register_leds(led, chip);
f6524808	556	if (ret)
9e9b3db1	557	goto err_register_leds;
500fe141	558
e73c0ce6	559	ret = lp55xx_register_sysfs(chip);
500fe141 SO	560	if (ret) {
500fe141 SO	561	dev_err(&client->dev, "registering sysfs failed\n");
e73c0ce6	562	goto err_register_sysfs;
500fe141	563	}
e73c0ce6 MWK	564
	565	return 0;
	566
	567	err_register_sysfs:
c3a68ebf	568	lp55xx_unregister_leds(led, chip);
9e9b3db1	569	err_register_leds:
6ce61762	570	lp55xx_deinit_device(chip);
f6c64c6f	571	err_init:
500fe141 SO	572	return ret;
	573	}
	574
678e8a6b	575	static int lp5521_remove(struct i2c_client *client)
500fe141	576	{
6ce61762 MWK	577	struct lp55xx_led *led = i2c_get_clientdata(client);
6ce61762 MWK	578	struct lp55xx_chip *chip = led->chip;
500fe141	579
28c9266b	580	lp5521_stop_all_engines(chip);
87cc4bde	581	lp55xx_unregister_sysfs(chip);
c3a68ebf	582	lp55xx_unregister_leds(led, chip);
6ce61762	583	lp55xx_deinit_device(chip);
500fe141	584
500fe141 SO	585	return 0;
	586	}
	587
	588	static const struct i2c_device_id lp5521_id[] = {
	589	{ "lp5521", 0 }, /* Three channel chip */
	590	{ }
	591	};
	592	MODULE_DEVICE_TABLE(i2c, lp5521_id);
	593
b548a34b AL	594	#ifdef CONFIG_OF
	595	static const struct of_device_id of_lp5521_leds_match[] = {
	596	{ .compatible = "national,lp5521", },
	597	{},
	598	};
	599
	600	MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
	601	#endif
500fe141 SO	602	static struct i2c_driver lp5521_driver = {
	603	.driver = {
	604	.name = "lp5521",
b548a34b	605	.of_match_table = of_match_ptr(of_lp5521_leds_match),
500fe141 SO	606	},
500fe141 SO	607	.probe = lp5521_probe,
df07cf81	608	.remove = lp5521_remove,
500fe141 SO	609	.id_table = lp5521_id,
	610	};
	611
09a0d183	612	module_i2c_driver(lp5521_driver);
500fe141 SO	613
500fe141 SO	614	MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
a2387cb9	615	MODULE_AUTHOR("Milo Kim <[email protected]>");
500fe141 SO	616	MODULE_DESCRIPTION("LP5521 LED engine");
500fe141 SO	617	MODULE_LICENSE("GPL v2");