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1a8bfa1e TL |
1 | /* |
2 | * linux/arch/arm/plat-omap/devices.c | |
3 | * | |
4 | * Common platform device setup/initialization for OMAP1 and OMAP2 | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
1a8bfa1e TL |
12 | #include <linux/module.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/platform_device.h> | |
fced80c7 | 16 | #include <linux/io.h> |
5a0e3ad6 | 17 | #include <linux/slab.h> |
90173882 | 18 | #include <linux/memblock.h> |
1a8bfa1e | 19 | |
a09e64fb | 20 | #include <mach/hardware.h> |
1a8bfa1e TL |
21 | #include <asm/mach-types.h> |
22 | #include <asm/mach/map.h> | |
23 | ||
ce491cf8 | 24 | #include <plat/tc.h> |
ce491cf8 TL |
25 | #include <plat/board.h> |
26 | #include <plat/mmc.h> | |
a09e64fb | 27 | #include <mach/gpio.h> |
ce491cf8 TL |
28 | #include <plat/menelaus.h> |
29 | #include <plat/mcbsp.h> | |
d6a2d9b8 | 30 | #include <plat/omap44xx.h> |
1a8bfa1e | 31 | |
9b6553cd | 32 | /*-------------------------------------------------------------------------*/ |
9b6553cd | 33 | |
bc5d0c89 EV |
34 | #if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE) |
35 | ||
36 | static struct platform_device **omap_mcbsp_devices; | |
37 | ||
3cf32bba KVA |
38 | void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, |
39 | struct omap_mcbsp_platform_data *config, int size) | |
bc5d0c89 EV |
40 | { |
41 | int i; | |
42 | ||
bc5d0c89 EV |
43 | omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *), |
44 | GFP_KERNEL); | |
45 | if (!omap_mcbsp_devices) { | |
46 | printk(KERN_ERR "Could not register McBSP devices\n"); | |
47 | return; | |
48 | } | |
49 | ||
50 | for (i = 0; i < size; i++) { | |
51 | struct platform_device *new_mcbsp; | |
52 | int ret; | |
53 | ||
54 | new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1); | |
55 | if (!new_mcbsp) | |
56 | continue; | |
3cf32bba KVA |
57 | platform_device_add_resources(new_mcbsp, &res[i * res_count], |
58 | res_count); | |
bc5d0c89 EV |
59 | new_mcbsp->dev.platform_data = &config[i]; |
60 | ret = platform_device_add(new_mcbsp); | |
61 | if (ret) { | |
62 | platform_device_put(new_mcbsp); | |
63 | continue; | |
64 | } | |
65 | omap_mcbsp_devices[i] = new_mcbsp; | |
66 | } | |
67 | } | |
68 | ||
69 | #else | |
3cf32bba KVA |
70 | void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, |
71 | struct omap_mcbsp_platform_data *config, int size) | |
bc5d0c89 EV |
72 | { } |
73 | #endif | |
74 | ||
1a8bfa1e TL |
75 | /*-------------------------------------------------------------------------*/ |
76 | ||
d6a2d9b8 JEC |
77 | #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ |
78 | defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) | |
79 | ||
80 | static struct resource mcpdm_resources[] = { | |
81 | { | |
82 | .name = "mcpdm_mem", | |
83 | .start = OMAP44XX_MCPDM_BASE, | |
84 | .end = OMAP44XX_MCPDM_BASE + SZ_4K, | |
85 | .flags = IORESOURCE_MEM, | |
86 | }, | |
87 | { | |
88 | .name = "mcpdm_irq", | |
5772ca7d SS |
89 | .start = OMAP44XX_IRQ_MCPDM, |
90 | .end = OMAP44XX_IRQ_MCPDM, | |
d6a2d9b8 JEC |
91 | .flags = IORESOURCE_IRQ, |
92 | }, | |
93 | }; | |
94 | ||
95 | static struct platform_device omap_mcpdm_device = { | |
96 | .name = "omap-mcpdm", | |
97 | .id = -1, | |
98 | .num_resources = ARRAY_SIZE(mcpdm_resources), | |
99 | .resource = mcpdm_resources, | |
100 | }; | |
101 | ||
102 | static void omap_init_mcpdm(void) | |
103 | { | |
104 | (void) platform_device_register(&omap_mcpdm_device); | |
105 | } | |
106 | #else | |
107 | static inline void omap_init_mcpdm(void) {} | |
108 | #endif | |
109 | ||
110 | /*-------------------------------------------------------------------------*/ | |
111 | ||
d8874665 | 112 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ |
7736c09c | 113 | defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) |
1a8bfa1e | 114 | |
d8874665 | 115 | #define OMAP_MMC_NR_RES 2 |
7736c09c | 116 | |
d8874665 TL |
117 | /* |
118 | * Register MMC devices. Called from mach-omap1 and mach-omap2 device init. | |
119 | */ | |
0dffb5c5 TL |
120 | int __init omap_mmc_add(const char *name, int id, unsigned long base, |
121 | unsigned long size, unsigned int irq, | |
122 | struct omap_mmc_platform_data *data) | |
7736c09c | 123 | { |
d8874665 TL |
124 | struct platform_device *pdev; |
125 | struct resource res[OMAP_MMC_NR_RES]; | |
126 | int ret; | |
127 | ||
0dffb5c5 | 128 | pdev = platform_device_alloc(name, id); |
d8874665 TL |
129 | if (!pdev) |
130 | return -ENOMEM; | |
131 | ||
132 | memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource)); | |
133 | res[0].start = base; | |
134 | res[0].end = base + size - 1; | |
135 | res[0].flags = IORESOURCE_MEM; | |
136 | res[1].start = res[1].end = irq; | |
137 | res[1].flags = IORESOURCE_IRQ; | |
138 | ||
139 | ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); | |
140 | if (ret == 0) | |
141 | ret = platform_device_add_data(pdev, data, sizeof(*data)); | |
142 | if (ret) | |
143 | goto fail; | |
144 | ||
145 | ret = platform_device_add(pdev); | |
146 | if (ret) | |
147 | goto fail; | |
01971f65 DB |
148 | |
149 | /* return device handle to board setup code */ | |
150 | data->dev = &pdev->dev; | |
d8874665 | 151 | return 0; |
7736c09c | 152 | |
d8874665 TL |
153 | fail: |
154 | platform_device_put(pdev); | |
155 | return ret; | |
7736c09c RK |
156 | } |
157 | ||
1a8bfa1e TL |
158 | #endif |
159 | ||
9b6553cd TL |
160 | /*-------------------------------------------------------------------------*/ |
161 | ||
3bfe8971 LM |
162 | #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE) |
163 | ||
088ef950 | 164 | #ifdef CONFIG_ARCH_OMAP2 |
3bfe8971 LM |
165 | #define OMAP_RNG_BASE 0x480A0000 |
166 | #else | |
167 | #define OMAP_RNG_BASE 0xfffe5000 | |
168 | #endif | |
169 | ||
170 | static struct resource rng_resources[] = { | |
171 | { | |
172 | .start = OMAP_RNG_BASE, | |
173 | .end = OMAP_RNG_BASE + 0x4f, | |
174 | .flags = IORESOURCE_MEM, | |
175 | }, | |
176 | }; | |
177 | ||
178 | static struct platform_device omap_rng_device = { | |
179 | .name = "omap_rng", | |
180 | .id = -1, | |
181 | .num_resources = ARRAY_SIZE(rng_resources), | |
182 | .resource = rng_resources, | |
183 | }; | |
184 | ||
185 | static void omap_init_rng(void) | |
186 | { | |
187 | (void) platform_device_register(&omap_rng_device); | |
188 | } | |
189 | #else | |
190 | static inline void omap_init_rng(void) {} | |
191 | #endif | |
192 | ||
193 | /*-------------------------------------------------------------------------*/ | |
194 | ||
9b6553cd TL |
195 | /* Numbering for the SPI-capable controllers when used for SPI: |
196 | * spi = 1 | |
197 | * uwire = 2 | |
198 | * mmc1..2 = 3..4 | |
199 | * mcbsp1..3 = 5..7 | |
200 | */ | |
201 | ||
202 | #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE) | |
203 | ||
204 | #define OMAP_UWIRE_BASE 0xfffb3000 | |
205 | ||
206 | static struct resource uwire_resources[] = { | |
207 | { | |
208 | .start = OMAP_UWIRE_BASE, | |
209 | .end = OMAP_UWIRE_BASE + 0x20, | |
210 | .flags = IORESOURCE_MEM, | |
211 | }, | |
212 | }; | |
213 | ||
214 | static struct platform_device omap_uwire_device = { | |
215 | .name = "omap_uwire", | |
216 | .id = -1, | |
9b6553cd TL |
217 | .num_resources = ARRAY_SIZE(uwire_resources), |
218 | .resource = uwire_resources, | |
219 | }; | |
220 | ||
221 | static void omap_init_uwire(void) | |
222 | { | |
223 | /* FIXME define and use a boot tag; not all boards will be hooking | |
224 | * up devices to the microwire controller, and multi-board configs | |
225 | * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway... | |
226 | */ | |
227 | ||
228 | /* board-specific code must configure chipselects (only a few | |
229 | * are normally used) and SCLK/SDI/SDO (each has two choices). | |
230 | */ | |
231 | (void) platform_device_register(&omap_uwire_device); | |
232 | } | |
233 | #else | |
234 | static inline void omap_init_uwire(void) {} | |
235 | #endif | |
236 | ||
90173882 FC |
237 | #if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE) |
238 | ||
239 | static phys_addr_t omap_dsp_phys_mempool_base; | |
240 | ||
241 | void __init omap_dsp_reserve_sdram_memblock(void) | |
242 | { | |
243 | phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE; | |
244 | phys_addr_t paddr; | |
245 | ||
246 | if (!size) | |
247 | return; | |
248 | ||
89346f95 | 249 | paddr = memblock_alloc(size, SZ_1M); |
90173882 FC |
250 | if (!paddr) { |
251 | pr_err("%s: failed to reserve %x bytes\n", | |
252 | __func__, size); | |
253 | return; | |
254 | } | |
89346f95 FC |
255 | memblock_free(paddr, size); |
256 | memblock_remove(paddr, size); | |
90173882 FC |
257 | |
258 | omap_dsp_phys_mempool_base = paddr; | |
259 | } | |
260 | ||
261 | phys_addr_t omap_dsp_get_mempool_base(void) | |
262 | { | |
263 | return omap_dsp_phys_mempool_base; | |
264 | } | |
265 | EXPORT_SYMBOL(omap_dsp_get_mempool_base); | |
266 | #endif | |
267 | ||
1a8bfa1e TL |
268 | /* |
269 | * This gets called after board-specific INIT_MACHINE, and initializes most | |
270 | * on-chip peripherals accessible on this board (except for few like USB): | |
271 | * | |
272 | * (a) Does any "standard config" pin muxing needed. Board-specific | |
273 | * code will have muxed GPIO pins and done "nonstandard" setup; | |
274 | * that code could live in the boot loader. | |
275 | * (b) Populating board-specific platform_data with the data drivers | |
276 | * rely on to handle wiring variations. | |
277 | * (c) Creating platform devices as meaningful on this board and | |
278 | * with this kernel configuration. | |
279 | * | |
280 | * Claiming GPIOs, and setting their direction and initial values, is the | |
281 | * responsibility of the device drivers. So is responding to probe(). | |
282 | * | |
283 | * Board-specific knowlege like creating devices or pin setup is to be | |
284 | * kept out of drivers as much as possible. In particular, pin setup | |
285 | * may be handled by the boot loader, and drivers should expect it will | |
286 | * normally have been done by the time they're probed. | |
287 | */ | |
288 | static int __init omap_init_devices(void) | |
289 | { | |
290 | /* please keep these calls, and their implementations above, | |
291 | * in alphabetical order so they're easier to sort through. | |
292 | */ | |
3bfe8971 | 293 | omap_init_rng(); |
d6a2d9b8 | 294 | omap_init_mcpdm(); |
9b6553cd | 295 | omap_init_uwire(); |
1a8bfa1e TL |
296 | return 0; |
297 | } | |
298 | arch_initcall(omap_init_devices); |