[linux.git] / arch / arm / plat-omap / devices.c

/*
 * linux/arch/arm/plat-omap/devices.c
 *
 * Common platform device setup/initialization for OMAP1 and OMAP2
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>

#include <asm/arch/hardware.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>

#include <asm/arch/tc.h>
#include <asm/arch/board.h>
#include <asm/arch/mux.h>
#include <asm/arch/gpio.h>
#include <asm/arch/menelaus.h>
#include <asm/arch/mcbsp.h>

#if	defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)

#include "../plat-omap/dsp/dsp_common.h"

static struct dsp_platform_data dsp_pdata = {
	.kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
};

static struct resource omap_dsp_resources[] = {
	{
		.name	= "dsp_mmu",
		.start	= -1,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device omap_dsp_device = {
	.name		= "dsp",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(omap_dsp_resources),
	.resource	= omap_dsp_resources,
	.dev = {
		.platform_data = &dsp_pdata,
	},
};

static inline void omap_init_dsp(void)
{
	struct resource *res;
	int irq;

	if (cpu_is_omap15xx())
		irq = INT_1510_DSP_MMU;
	else if (cpu_is_omap16xx())
		irq = INT_1610_DSP_MMU;
	else if (cpu_is_omap24xx())
		irq = INT_24XX_DSP_MMU;

	res = platform_get_resource_byname(&omap_dsp_device,
					   IORESOURCE_IRQ, "dsp_mmu");
	res->start = irq;

	platform_device_register(&omap_dsp_device);
}

int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
{
	static DEFINE_MUTEX(dsp_pdata_lock);

	mutex_init(&kdev->lock);

	mutex_lock(&dsp_pdata_lock);
	list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
	mutex_unlock(&dsp_pdata_lock);

	return 0;
}
EXPORT_SYMBOL(dsp_kfunc_device_register);

#else
static inline void omap_init_dsp(void) { }
#endif	/* CONFIG_OMAP_DSP */

/*-------------------------------------------------------------------------*/
#if	defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)

static void omap_init_kp(void)
{
	if (machine_is_omap_h2() || machine_is_omap_h3()) {
		omap_cfg_reg(F18_1610_KBC0);
		omap_cfg_reg(D20_1610_KBC1);
		omap_cfg_reg(D19_1610_KBC2);
		omap_cfg_reg(E18_1610_KBC3);
		omap_cfg_reg(C21_1610_KBC4);

		omap_cfg_reg(G18_1610_KBR0);
		omap_cfg_reg(F19_1610_KBR1);
		omap_cfg_reg(H14_1610_KBR2);
		omap_cfg_reg(E20_1610_KBR3);
		omap_cfg_reg(E19_1610_KBR4);
		omap_cfg_reg(N19_1610_KBR5);
	} else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
		omap_cfg_reg(E2_730_KBR0);
		omap_cfg_reg(J7_730_KBR1);
		omap_cfg_reg(E1_730_KBR2);
		omap_cfg_reg(F3_730_KBR3);
		omap_cfg_reg(D2_730_KBR4);

		omap_cfg_reg(C2_730_KBC0);
		omap_cfg_reg(D3_730_KBC1);
		omap_cfg_reg(E4_730_KBC2);
		omap_cfg_reg(F4_730_KBC3);
		omap_cfg_reg(E3_730_KBC4);
	} else if (machine_is_omap_h4()) {
		omap_cfg_reg(T19_24XX_KBR0);
		omap_cfg_reg(R19_24XX_KBR1);
		omap_cfg_reg(V18_24XX_KBR2);
		omap_cfg_reg(M21_24XX_KBR3);
		omap_cfg_reg(E5__24XX_KBR4);
		if (omap_has_menelaus()) {
			omap_cfg_reg(B3__24XX_KBR5);
			omap_cfg_reg(AA4_24XX_KBC2);
			omap_cfg_reg(B13_24XX_KBC6);
		} else {
			omap_cfg_reg(M18_24XX_KBR5);
			omap_cfg_reg(H19_24XX_KBC2);
			omap_cfg_reg(N19_24XX_KBC6);
		}
		omap_cfg_reg(R20_24XX_KBC0);
		omap_cfg_reg(M14_24XX_KBC1);
		omap_cfg_reg(V17_24XX_KBC3);
		omap_cfg_reg(P21_24XX_KBC4);
		omap_cfg_reg(L14_24XX_KBC5);
	}
}
#else
static inline void omap_init_kp(void) {}
#endif

/*-------------------------------------------------------------------------*/
#if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)

static struct platform_device **omap_mcbsp_devices;

void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
					int size)
{
	int i;

	if (size > OMAP_MAX_MCBSP_COUNT) {
		printk(KERN_WARNING "Registered too many McBSPs platform_data."
			" Using maximum (%d) available.\n",
			OMAP_MAX_MCBSP_COUNT);
		size = OMAP_MAX_MCBSP_COUNT;
	}

	omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
				     GFP_KERNEL);
	if (!omap_mcbsp_devices) {
		printk(KERN_ERR "Could not register McBSP devices\n");
		return;
	}

	for (i = 0; i < size; i++) {
		struct platform_device *new_mcbsp;
		int ret;

		new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
		if (!new_mcbsp)
			continue;
		new_mcbsp->dev.platform_data = &config[i];
		ret = platform_device_add(new_mcbsp);
		if (ret) {
			platform_device_put(new_mcbsp);
			continue;
		}
		omap_mcbsp_devices[i] = new_mcbsp;
	}
}

#else
void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
					int size)
{  }
#endif

/*-------------------------------------------------------------------------*/

#if	defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)

#ifdef CONFIG_ARCH_OMAP24XX
#define	OMAP_MMC1_BASE		0x4809c000
#define OMAP_MMC1_INT		INT_24XX_MMC_IRQ
#else
#define	OMAP_MMC1_BASE		0xfffb7800
#define OMAP_MMC1_INT		INT_MMC
#endif
#define	OMAP_MMC2_BASE		0xfffb7c00	/* omap16xx only */

static struct omap_mmc_conf mmc1_conf;

static u64 mmc1_dmamask = 0xffffffff;

static struct resource mmc1_resources[] = {
	{
		.start		= OMAP_MMC1_BASE,
		.end		= OMAP_MMC1_BASE + 0x7f,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP_MMC1_INT,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device mmc_omap_device1 = {
	.name		= "mmci-omap",
	.id		= 1,
	.dev = {
		.dma_mask	= &mmc1_dmamask,
		.platform_data	= &mmc1_conf,
	},
	.num_resources	= ARRAY_SIZE(mmc1_resources),
	.resource	= mmc1_resources,
};

#ifdef	CONFIG_ARCH_OMAP16XX

static struct omap_mmc_conf mmc2_conf;

static u64 mmc2_dmamask = 0xffffffff;

static struct resource mmc2_resources[] = {
	{
		.start		= OMAP_MMC2_BASE,
		.end		= OMAP_MMC2_BASE + 0x7f,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= INT_1610_MMC2,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device mmc_omap_device2 = {
	.name		= "mmci-omap",
	.id		= 2,
	.dev = {
		.dma_mask	= &mmc2_dmamask,
		.platform_data	= &mmc2_conf,
	},
	.num_resources	= ARRAY_SIZE(mmc2_resources),
	.resource	= mmc2_resources,
};
#endif

static void __init omap_init_mmc(void)
{
	const struct omap_mmc_config	*mmc_conf;
	const struct omap_mmc_conf	*mmc;

	/* NOTE:  assumes MMC was never (wrongly) enabled */
	mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
	if (!mmc_conf)
		return;

	/* block 1 is always available and has just one pinout option */
	mmc = &mmc_conf->mmc[0];
	if (mmc->enabled) {
		if (cpu_is_omap24xx()) {
			omap_cfg_reg(H18_24XX_MMC_CMD);
			omap_cfg_reg(H15_24XX_MMC_CLKI);
			omap_cfg_reg(G19_24XX_MMC_CLKO);
			omap_cfg_reg(F20_24XX_MMC_DAT0);
			omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
			omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
		} else {
			omap_cfg_reg(MMC_CMD);
			omap_cfg_reg(MMC_CLK);
			omap_cfg_reg(MMC_DAT0);
			if (cpu_is_omap1710()) {
				omap_cfg_reg(M15_1710_MMC_CLKI);
				omap_cfg_reg(P19_1710_MMC_CMDDIR);
				omap_cfg_reg(P20_1710_MMC_DATDIR0);
			}
		}
		if (mmc->wire4) {
			if (cpu_is_omap24xx()) {
				omap_cfg_reg(H14_24XX_MMC_DAT1);
				omap_cfg_reg(E19_24XX_MMC_DAT2);
				omap_cfg_reg(D19_24XX_MMC_DAT3);
				omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
				omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
				omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
			} else {
				omap_cfg_reg(MMC_DAT1);
				/* NOTE:  DAT2 can be on W10 (here) or M15 */
				if (!mmc->nomux)
					omap_cfg_reg(MMC_DAT2);
				omap_cfg_reg(MMC_DAT3);
			}
		}
		mmc1_conf = *mmc;
		(void) platform_device_register(&mmc_omap_device1);
	}

#ifdef	CONFIG_ARCH_OMAP16XX
	/* block 2 is on newer chips, and has many pinout options */
	mmc = &mmc_conf->mmc[1];
	if (mmc->enabled) {
		if (!mmc->nomux) {
			omap_cfg_reg(Y8_1610_MMC2_CMD);
			omap_cfg_reg(Y10_1610_MMC2_CLK);
			omap_cfg_reg(R18_1610_MMC2_CLKIN);
			omap_cfg_reg(W8_1610_MMC2_DAT0);
			if (mmc->wire4) {
				omap_cfg_reg(V8_1610_MMC2_DAT1);
				omap_cfg_reg(W15_1610_MMC2_DAT2);
				omap_cfg_reg(R10_1610_MMC2_DAT3);
			}

			/* These are needed for the level shifter */
			omap_cfg_reg(V9_1610_MMC2_CMDDIR);
			omap_cfg_reg(V5_1610_MMC2_DATDIR0);
			omap_cfg_reg(W19_1610_MMC2_DATDIR1);
		}

		/* Feedback clock must be set on OMAP-1710 MMC2 */
		if (cpu_is_omap1710())
			omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
				     MOD_CONF_CTRL_1);
		mmc2_conf = *mmc;
		(void) platform_device_register(&mmc_omap_device2);
	}
#endif
	return;
}
#else
static inline void omap_init_mmc(void) {}
#endif

/*-------------------------------------------------------------------------*/

/* Numbering for the SPI-capable controllers when used for SPI:
 * spi		= 1
 * uwire	= 2
 * mmc1..2	= 3..4
 * mcbsp1..3	= 5..7
 */

#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)

#define	OMAP_UWIRE_BASE		0xfffb3000

static struct resource uwire_resources[] = {
	{
		.start		= OMAP_UWIRE_BASE,
		.end		= OMAP_UWIRE_BASE + 0x20,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_uwire_device = {
	.name	   = "omap_uwire",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(uwire_resources),
	.resource	= uwire_resources,
};

static void omap_init_uwire(void)
{
	/* FIXME define and use a boot tag; not all boards will be hooking
	 * up devices to the microwire controller, and multi-board configs
	 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
	 */

	/* board-specific code must configure chipselects (only a few
	 * are normally used) and SCLK/SDI/SDO (each has two choices).
	 */
	(void) platform_device_register(&omap_uwire_device);
}
#else
static inline void omap_init_uwire(void) {}
#endif

/*-------------------------------------------------------------------------*/

#if	defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)

#ifdef CONFIG_ARCH_OMAP24XX
#define	OMAP_WDT_BASE		0x48022000
#else
#define	OMAP_WDT_BASE		0xfffeb000
#endif

static struct resource wdt_resources[] = {
	{
		.start		= OMAP_WDT_BASE,
		.end		= OMAP_WDT_BASE + 0x4f,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_wdt_device = {
	.name	   = "omap_wdt",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

static void omap_init_wdt(void)
{
	(void) platform_device_register(&omap_wdt_device);
}
#else
static inline void omap_init_wdt(void) {}
#endif

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)

#ifdef CONFIG_ARCH_OMAP24XX
#define	OMAP_RNG_BASE		0x480A0000
#else
#define	OMAP_RNG_BASE		0xfffe5000
#endif

static struct resource rng_resources[] = {
	{
		.start		= OMAP_RNG_BASE,
		.end		= OMAP_RNG_BASE + 0x4f,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_rng_device = {
	.name	   = "omap_rng",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(rng_resources),
	.resource	= rng_resources,
};

static void omap_init_rng(void)
{
	(void) platform_device_register(&omap_rng_device);
}
#else
static inline void omap_init_rng(void) {}
#endif

/*
 * This gets called after board-specific INIT_MACHINE, and initializes most
 * on-chip peripherals accessible on this board (except for few like USB):
 *
 *  (a) Does any "standard config" pin muxing needed.  Board-specific
 *	code will have muxed GPIO pins and done "nonstandard" setup;
 *	that code could live in the boot loader.
 *  (b) Populating board-specific platform_data with the data drivers
 *	rely on to handle wiring variations.
 *  (c) Creating platform devices as meaningful on this board and
 *	with this kernel configuration.
 *
 * Claiming GPIOs, and setting their direction and initial values, is the
 * responsibility of the device drivers.  So is responding to probe().
 *
 * Board-specific knowlege like creating devices or pin setup is to be
 * kept out of drivers as much as possible.  In particular, pin setup
 * may be handled by the boot loader, and drivers should expect it will
 * normally have been done by the time they're probed.
 */
static int __init omap_init_devices(void)
{
/*
 * Need to enable relevant once for 2430 SDP
 */
#ifndef CONFIG_MACH_OMAP_2430SDP
	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */
	omap_init_dsp();
	omap_init_kp();
	omap_init_mmc();
	omap_init_uwire();
	omap_init_wdt();
	omap_init_rng();
#endif
	return 0;
}
arch_initcall(omap_init_devices);
Commit	Line	Data
1a8bfa1e TL	1	/*
	2	* linux/arch/arm/plat-omap/devices.c
	3	*
	4	* Common platform device setup/initialization for OMAP1 and OMAP2
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
1a8bfa1e TL	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/platform_device.h>
	16
be509729	17	#include <asm/arch/hardware.h>
1a8bfa1e TL	18	#include <asm/io.h>
	19	#include <asm/mach-types.h>
	20	#include <asm/mach/map.h>
	21
	22	#include <asm/arch/tc.h>
	23	#include <asm/arch/board.h>
	24	#include <asm/arch/mux.h>
	25	#include <asm/arch/gpio.h>
9b6553cd	26	#include <asm/arch/menelaus.h>
bc5d0c89	27	#include <asm/arch/mcbsp.h>
1a8bfa1e	28
c40fae95 TL	29	#if defined(CONFIG_OMAP_DSP) \|\| defined(CONFIG_OMAP_DSP_MODULE)
	30
	31	#include "../plat-omap/dsp/dsp_common.h"
	32
	33	static struct dsp_platform_data dsp_pdata = {
	34	.kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
	35	};
	36
	37	static struct resource omap_dsp_resources[] = {
	38	{
	39	.name = "dsp_mmu",
	40	.start = -1,
	41	.flags = IORESOURCE_IRQ,
	42	},
	43	};
	44
	45	static struct platform_device omap_dsp_device = {
	46	.name = "dsp",
	47	.id = -1,
	48	.num_resources = ARRAY_SIZE(omap_dsp_resources),
	49	.resource = omap_dsp_resources,
	50	.dev = {
	51	.platform_data = &dsp_pdata,
	52	},
	53	};
	54
	55	static inline void omap_init_dsp(void)
	56	{
	57	struct resource *res;
	58	int irq;
	59
	60	if (cpu_is_omap15xx())
	61	irq = INT_1510_DSP_MMU;
	62	else if (cpu_is_omap16xx())
	63	irq = INT_1610_DSP_MMU;
	64	else if (cpu_is_omap24xx())
	65	irq = INT_24XX_DSP_MMU;
	66
	67	res = platform_get_resource_byname(&omap_dsp_device,
	68	IORESOURCE_IRQ, "dsp_mmu");
	69	res->start = irq;
	70
	71	platform_device_register(&omap_dsp_device);
	72	}
	73
	74	int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
	75	{
	76	static DEFINE_MUTEX(dsp_pdata_lock);
	77
	78	mutex_init(&kdev->lock);
	79
	80	mutex_lock(&dsp_pdata_lock);
	81	list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
	82	mutex_unlock(&dsp_pdata_lock);
	83
	84	return 0;
	85	}
	86	EXPORT_SYMBOL(dsp_kfunc_device_register);
	87
	88	#else
	89	static inline void omap_init_dsp(void) { }
	90	#endif /* CONFIG_OMAP_DSP */
	91
9b6553cd TL	92	/-------------------------------------------------------------------------/
	93	#if defined(CONFIG_KEYBOARD_OMAP) \|\| defined(CONFIG_KEYBOARD_OMAP_MODULE)
	94
	95	static void omap_init_kp(void)
	96	{
	97	if (machine_is_omap_h2() \|\| machine_is_omap_h3()) {
	98	omap_cfg_reg(F18_1610_KBC0);
	99	omap_cfg_reg(D20_1610_KBC1);
	100	omap_cfg_reg(D19_1610_KBC2);
	101	omap_cfg_reg(E18_1610_KBC3);
	102	omap_cfg_reg(C21_1610_KBC4);
	103
	104	omap_cfg_reg(G18_1610_KBR0);
	105	omap_cfg_reg(F19_1610_KBR1);
	106	omap_cfg_reg(H14_1610_KBR2);
	107	omap_cfg_reg(E20_1610_KBR3);
	108	omap_cfg_reg(E19_1610_KBR4);
	109	omap_cfg_reg(N19_1610_KBR5);
495f71db	110	} else if (machine_is_omap_perseus2() \|\| machine_is_omap_fsample()) {
9b6553cd TL	111	omap_cfg_reg(E2_730_KBR0);
	112	omap_cfg_reg(J7_730_KBR1);
	113	omap_cfg_reg(E1_730_KBR2);
	114	omap_cfg_reg(F3_730_KBR3);
	115	omap_cfg_reg(D2_730_KBR4);
	116
	117	omap_cfg_reg(C2_730_KBC0);
	118	omap_cfg_reg(D3_730_KBC1);
	119	omap_cfg_reg(E4_730_KBC2);
	120	omap_cfg_reg(F4_730_KBC3);
	121	omap_cfg_reg(E3_730_KBC4);
	122	} else if (machine_is_omap_h4()) {
	123	omap_cfg_reg(T19_24XX_KBR0);
	124	omap_cfg_reg(R19_24XX_KBR1);
	125	omap_cfg_reg(V18_24XX_KBR2);
	126	omap_cfg_reg(M21_24XX_KBR3);
	127	omap_cfg_reg(E5__24XX_KBR4);
	128	if (omap_has_menelaus()) {
	129	omap_cfg_reg(B3__24XX_KBR5);
	130	omap_cfg_reg(AA4_24XX_KBC2);
	131	omap_cfg_reg(B13_24XX_KBC6);
	132	} else {
	133	omap_cfg_reg(M18_24XX_KBR5);
	134	omap_cfg_reg(H19_24XX_KBC2);
	135	omap_cfg_reg(N19_24XX_KBC6);
	136	}
	137	omap_cfg_reg(R20_24XX_KBC0);
	138	omap_cfg_reg(M14_24XX_KBC1);
	139	omap_cfg_reg(V17_24XX_KBC3);
	140	omap_cfg_reg(P21_24XX_KBC4);
	141	omap_cfg_reg(L14_24XX_KBC5);
	142	}
	143	}
	144	#else
	145	static inline void omap_init_kp(void) {}
	146	#endif
	147
bc5d0c89 EV	148	/-------------------------------------------------------------------------/
	149	#if defined(CONFIG_OMAP_MCBSP) \|\| defined(CONFIG_OMAP_MCBSP_MODULE)
	150
	151	static struct platform_device **omap_mcbsp_devices;
	152
	153	void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
	154	int size)
	155	{
	156	int i;
	157
	158	if (size > OMAP_MAX_MCBSP_COUNT) {
	159	printk(KERN_WARNING "Registered too many McBSPs platform_data."
	160	" Using maximum (%d) available.\n",
	161	OMAP_MAX_MCBSP_COUNT);
	162	size = OMAP_MAX_MCBSP_COUNT;
	163	}
	164
	165	omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
	166	GFP_KERNEL);
	167	if (!omap_mcbsp_devices) {
	168	printk(KERN_ERR "Could not register McBSP devices\n");
	169	return;
	170	}
	171
	172	for (i = 0; i < size; i++) {
	173	struct platform_device *new_mcbsp;
	174	int ret;
	175
	176	new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
	177	if (!new_mcbsp)
	178	continue;
	179	new_mcbsp->dev.platform_data = &config[i];
	180	ret = platform_device_add(new_mcbsp);
	181	if (ret) {
	182	platform_device_put(new_mcbsp);
	183	continue;
	184	}
	185	omap_mcbsp_devices[i] = new_mcbsp;
	186	}
	187	}
	188
	189	#else
	190	void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
	191	int size)
	192	{ }
	193	#endif
	194
1a8bfa1e TL	195	/-------------------------------------------------------------------------/
	196
	197	#if defined(CONFIG_MMC_OMAP) \|\| defined(CONFIG_MMC_OMAP_MODULE)
	198
	199	#ifdef CONFIG_ARCH_OMAP24XX
	200	#define OMAP_MMC1_BASE 0x4809c000
abc45e1d	201	#define OMAP_MMC1_INT INT_24XX_MMC_IRQ
1a8bfa1e TL	202	#else
	203	#define OMAP_MMC1_BASE 0xfffb7800
	204	#define OMAP_MMC1_INT INT_MMC
	205	#endif
	206	#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
	207
	208	static struct omap_mmc_conf mmc1_conf;
	209
	210	static u64 mmc1_dmamask = 0xffffffff;
	211
	212	static struct resource mmc1_resources[] = {
	213	{
ce9c1a83 TL	214	.start = OMAP_MMC1_BASE,
ce9c1a83 TL	215	.end = OMAP_MMC1_BASE + 0x7f,
1a8bfa1e TL	216	.flags = IORESOURCE_MEM,
	217	},
	218	{
	219	.start = OMAP_MMC1_INT,
	220	.flags = IORESOURCE_IRQ,
	221	},
	222	};
	223
	224	static struct platform_device mmc_omap_device1 = {
	225	.name = "mmci-omap",
	226	.id = 1,
	227	.dev = {
1a8bfa1e TL	228	.dma_mask = &mmc1_dmamask,
	229	.platform_data = &mmc1_conf,
	230	},
	231	.num_resources = ARRAY_SIZE(mmc1_resources),
	232	.resource = mmc1_resources,
	233	};
	234
	235	#ifdef CONFIG_ARCH_OMAP16XX
	236
	237	static struct omap_mmc_conf mmc2_conf;
	238
	239	static u64 mmc2_dmamask = 0xffffffff;
	240
	241	static struct resource mmc2_resources[] = {
	242	{
ce9c1a83 TL	243	.start = OMAP_MMC2_BASE,
ce9c1a83 TL	244	.end = OMAP_MMC2_BASE + 0x7f,
1a8bfa1e TL	245	.flags = IORESOURCE_MEM,
	246	},
	247	{
	248	.start = INT_1610_MMC2,
	249	.flags = IORESOURCE_IRQ,
	250	},
	251	};
	252
	253	static struct platform_device mmc_omap_device2 = {
	254	.name = "mmci-omap",
	255	.id = 2,
	256	.dev = {
1a8bfa1e TL	257	.dma_mask = &mmc2_dmamask,
	258	.platform_data = &mmc2_conf,
	259	},
	260	.num_resources = ARRAY_SIZE(mmc2_resources),
	261	.resource = mmc2_resources,
	262	};
	263	#endif
	264
	265	static void __init omap_init_mmc(void)
	266	{
	267	const struct omap_mmc_config *mmc_conf;
	268	const struct omap_mmc_conf *mmc;
	269
	270	/* NOTE: assumes MMC was never (wrongly) enabled */
	271	mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
	272	if (!mmc_conf)
	273	return;
	274
	275	/* block 1 is always available and has just one pinout option */
	276	mmc = &mmc_conf->mmc[0];
	277	if (mmc->enabled) {
abc45e1d KP	278	if (cpu_is_omap24xx()) {
	279	omap_cfg_reg(H18_24XX_MMC_CMD);
	280	omap_cfg_reg(H15_24XX_MMC_CLKI);
	281	omap_cfg_reg(G19_24XX_MMC_CLKO);
	282	omap_cfg_reg(F20_24XX_MMC_DAT0);
	283	omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
	284	omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
	285	} else {
1a8bfa1e TL	286	omap_cfg_reg(MMC_CMD);
	287	omap_cfg_reg(MMC_CLK);
	288	omap_cfg_reg(MMC_DAT0);
	289	if (cpu_is_omap1710()) {
	290	omap_cfg_reg(M15_1710_MMC_CLKI);
	291	omap_cfg_reg(P19_1710_MMC_CMDDIR);
	292	omap_cfg_reg(P20_1710_MMC_DATDIR0);
	293	}
	294	}
	295	if (mmc->wire4) {
abc45e1d KP	296	if (cpu_is_omap24xx()) {
	297	omap_cfg_reg(H14_24XX_MMC_DAT1);
	298	omap_cfg_reg(E19_24XX_MMC_DAT2);
	299	omap_cfg_reg(D19_24XX_MMC_DAT3);
	300	omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
	301	omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
	302	omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
	303	} else {
1a8bfa1e TL	304	omap_cfg_reg(MMC_DAT1);
	305	/* NOTE: DAT2 can be on W10 (here) or M15 */
	306	if (!mmc->nomux)
	307	omap_cfg_reg(MMC_DAT2);
	308	omap_cfg_reg(MMC_DAT3);
	309	}
	310	}
	311	mmc1_conf = *mmc;
	312	(void) platform_device_register(&mmc_omap_device1);
	313	}
	314
	315	#ifdef CONFIG_ARCH_OMAP16XX
	316	/* block 2 is on newer chips, and has many pinout options */
	317	mmc = &mmc_conf->mmc[1];
	318	if (mmc->enabled) {
	319	if (!mmc->nomux) {
	320	omap_cfg_reg(Y8_1610_MMC2_CMD);
	321	omap_cfg_reg(Y10_1610_MMC2_CLK);
	322	omap_cfg_reg(R18_1610_MMC2_CLKIN);
	323	omap_cfg_reg(W8_1610_MMC2_DAT0);
	324	if (mmc->wire4) {
	325	omap_cfg_reg(V8_1610_MMC2_DAT1);
	326	omap_cfg_reg(W15_1610_MMC2_DAT2);
	327	omap_cfg_reg(R10_1610_MMC2_DAT3);
	328	}
	329
	330	/* These are needed for the level shifter */
	331	omap_cfg_reg(V9_1610_MMC2_CMDDIR);
	332	omap_cfg_reg(V5_1610_MMC2_DATDIR0);
	333	omap_cfg_reg(W19_1610_MMC2_DATDIR1);
	334	}
	335
	336	/* Feedback clock must be set on OMAP-1710 MMC2 */
	337	if (cpu_is_omap1710())
	338	omap_writel(omap_readl(MOD_CONF_CTRL_1) \| (1 << 24),
	339	MOD_CONF_CTRL_1);
	340	mmc2_conf = *mmc;
	341	(void) platform_device_register(&mmc_omap_device2);
	342	}
	343	#endif
	344	return;
	345	}
	346	#else
	347	static inline void omap_init_mmc(void) {}
	348	#endif
	349
9b6553cd TL	350	/-------------------------------------------------------------------------/
	351
	352	/* Numbering for the SPI-capable controllers when used for SPI:
	353	* spi = 1
	354	* uwire = 2
	355	* mmc1..2 = 3..4
	356	* mcbsp1..3 = 5..7
	357	*/
	358
	359	#if defined(CONFIG_SPI_OMAP_UWIRE) \|\| defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
	360
	361	#define OMAP_UWIRE_BASE 0xfffb3000
	362
	363	static struct resource uwire_resources[] = {
	364	{
	365	.start = OMAP_UWIRE_BASE,
	366	.end = OMAP_UWIRE_BASE + 0x20,
	367	.flags = IORESOURCE_MEM,
	368	},
	369	};
	370
	371	static struct platform_device omap_uwire_device = {
	372	.name = "omap_uwire",
	373	.id = -1,
9b6553cd TL	374	.num_resources = ARRAY_SIZE(uwire_resources),
	375	.resource = uwire_resources,
	376	};
	377
	378	static void omap_init_uwire(void)
	379	{
	380	/* FIXME define and use a boot tag; not all boards will be hooking
	381	* up devices to the microwire controller, and multi-board configs
	382	* mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
	383	*/
	384
	385	/* board-specific code must configure chipselects (only a few
	386	* are normally used) and SCLK/SDI/SDO (each has two choices).
	387	*/
	388	(void) platform_device_register(&omap_uwire_device);
	389	}
	390	#else
	391	static inline void omap_init_uwire(void) {}
	392	#endif
	393
	394	/-------------------------------------------------------------------------/
	395
1a8bfa1e TL	396	#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)
	397
	398	#ifdef CONFIG_ARCH_OMAP24XX
	399	#define OMAP_WDT_BASE 0x48022000
	400	#else
	401	#define OMAP_WDT_BASE 0xfffeb000
	402	#endif
	403
	404	static struct resource wdt_resources[] = {
	405	{
	406	.start = OMAP_WDT_BASE,
	407	.end = OMAP_WDT_BASE + 0x4f,
	408	.flags = IORESOURCE_MEM,
	409	},
	410	};
	411
	412	static struct platform_device omap_wdt_device = {
	413	.name = "omap_wdt",
	414	.id = -1,
1a8bfa1e TL	415	.num_resources = ARRAY_SIZE(wdt_resources),
	416	.resource = wdt_resources,
	417	};
	418
	419	static void omap_init_wdt(void)
	420	{
	421	(void) platform_device_register(&omap_wdt_device);
	422	}
	423	#else
	424	static inline void omap_init_wdt(void) {}
	425	#endif
	426
	427	/-------------------------------------------------------------------------/
	428
c40fae95	429	#if defined(CONFIG_HW_RANDOM_OMAP) \|\| defined(CONFIG_HW_RANDOM_OMAP_MODULE)
1a8bfa1e TL	430
	431	#ifdef CONFIG_ARCH_OMAP24XX
	432	#define OMAP_RNG_BASE 0x480A0000
	433	#else
	434	#define OMAP_RNG_BASE 0xfffe5000
	435	#endif
	436
	437	static struct resource rng_resources[] = {
	438	{
	439	.start = OMAP_RNG_BASE,
	440	.end = OMAP_RNG_BASE + 0x4f,
	441	.flags = IORESOURCE_MEM,
	442	},
	443	};
	444
	445	static struct platform_device omap_rng_device = {
	446	.name = "omap_rng",
	447	.id = -1,
1a8bfa1e TL	448	.num_resources = ARRAY_SIZE(rng_resources),
	449	.resource = rng_resources,
	450	};
	451
	452	static void omap_init_rng(void)
	453	{
	454	(void) platform_device_register(&omap_rng_device);
	455	}
	456	#else
	457	static inline void omap_init_rng(void) {}
	458	#endif
	459
1a8bfa1e TL	460	/*
	461	* This gets called after board-specific INIT_MACHINE, and initializes most
	462	* on-chip peripherals accessible on this board (except for few like USB):
	463	*
	464	* (a) Does any "standard config" pin muxing needed. Board-specific
	465	* code will have muxed GPIO pins and done "nonstandard" setup;
	466	* that code could live in the boot loader.
	467	* (b) Populating board-specific platform_data with the data drivers
	468	* rely on to handle wiring variations.
	469	* (c) Creating platform devices as meaningful on this board and
	470	* with this kernel configuration.
	471	*
	472	* Claiming GPIOs, and setting their direction and initial values, is the
	473	* responsibility of the device drivers. So is responding to probe().
	474	*
	475	* Board-specific knowlege like creating devices or pin setup is to be
	476	* kept out of drivers as much as possible. In particular, pin setup
	477	* may be handled by the boot loader, and drivers should expect it will
	478	* normally have been done by the time they're probed.
	479	*/
	480	static int __init omap_init_devices(void)
	481	{
56a25641 SMK	482	/*
	483	* Need to enable relevant once for 2430 SDP
	484	*/
	485	#ifndef CONFIG_MACH_OMAP_2430SDP
1a8bfa1e TL	486	/* please keep these calls, and their implementations above,
	487	* in alphabetical order so they're easier to sort through.
	488	*/
c40fae95	489	omap_init_dsp();
9b6553cd	490	omap_init_kp();
1a8bfa1e	491	omap_init_mmc();
9b6553cd	492	omap_init_uwire();
1a8bfa1e TL	493	omap_init_wdt();
1a8bfa1e TL	494	omap_init_rng();
56a25641	495	#endif
1a8bfa1e TL	496	return 0;
	497	}
	498	arch_initcall(omap_init_devices);