[linux.git] / drivers / hv / hv.c

/*
 * Copyright (c) 2009, Microsoft Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 *
 * Authors:
 *   Haiyang Zhang <[email protected]>
 *   Hank Janssen  <[email protected]>
 *
 */
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/hyperv.h>
#include <linux/version.h>
#include <linux/random.h>
#include <linux/clockchips.h>
#include <asm/mshyperv.h>
#include "hyperv_vmbus.h"

/* The one and only */
struct hv_context hv_context = {
	.synic_initialized	= false,
};

/*
 * If false, we're using the old mechanism for stimer0 interrupts
 * where it sends a VMbus message when it expires. The old
 * mechanism is used when running on older versions of Hyper-V
 * that don't support Direct Mode. While Hyper-V provides
 * four stimer's per CPU, Linux uses only stimer0.
 */
static bool direct_mode_enabled;
static int stimer0_irq;
static int stimer0_vector;

#define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */
#define HV_MAX_MAX_DELTA_TICKS 0xffffffff
#define HV_MIN_DELTA_TICKS 1

/*
 * hv_init - Main initialization routine.
 *
 * This routine must be called before any other routines in here are called
 */
int hv_init(void)
{
	hv_context.cpu_context = alloc_percpu(struct hv_per_cpu_context);
	if (!hv_context.cpu_context)
		return -ENOMEM;

	direct_mode_enabled = ms_hyperv.misc_features &
			HV_STIMER_DIRECT_MODE_AVAILABLE;
	return 0;
}

/*
 * hv_post_message - Post a message using the hypervisor message IPC.
 *
 * This involves a hypercall.
 */
int hv_post_message(union hv_connection_id connection_id,
		  enum hv_message_type message_type,
		  void *payload, size_t payload_size)
{
	struct hv_input_post_message *aligned_msg;
	struct hv_per_cpu_context *hv_cpu;
	u64 status;

	if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
		return -EMSGSIZE;

	hv_cpu = get_cpu_ptr(hv_context.cpu_context);
	aligned_msg = hv_cpu->post_msg_page;
	aligned_msg->connectionid = connection_id;
	aligned_msg->reserved = 0;
	aligned_msg->message_type = message_type;
	aligned_msg->payload_size = payload_size;
	memcpy((void *)aligned_msg->payload, payload, payload_size);

	status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL);

	/* Preemption must remain disabled until after the hypercall
	 * so some other thread can't get scheduled onto this cpu and
	 * corrupt the per-cpu post_msg_page
	 */
	put_cpu_ptr(hv_cpu);

	return status & 0xFFFF;
}

/*
 * ISR for when stimer0 is operating in Direct Mode.  Direct Mode
 * does not use VMbus or any VMbus messages, so process here and not
 * in the VMbus driver code.
 */

static void hv_stimer0_isr(void)
{
	struct hv_per_cpu_context *hv_cpu;

	hv_cpu = this_cpu_ptr(hv_context.cpu_context);
	hv_cpu->clk_evt->event_handler(hv_cpu->clk_evt);
	add_interrupt_randomness(stimer0_vector, 0);
}

static int hv_ce_set_next_event(unsigned long delta,
				struct clock_event_device *evt)
{
	u64 current_tick;

	WARN_ON(!clockevent_state_oneshot(evt));

	current_tick = hyperv_cs->read(NULL);
	current_tick += delta;
	hv_init_timer(0, current_tick);
	return 0;
}

static int hv_ce_shutdown(struct clock_event_device *evt)
{
	hv_init_timer(0, 0);
	hv_init_timer_config(0, 0);
	if (direct_mode_enabled)
		hv_disable_stimer0_percpu_irq(stimer0_irq);

	return 0;
}

static int hv_ce_set_oneshot(struct clock_event_device *evt)
{
	union hv_timer_config timer_cfg;

	timer_cfg.as_uint64 = 0;
	timer_cfg.enable = 1;
	timer_cfg.auto_enable = 1;
	if (direct_mode_enabled) {
		/*
		 * When it expires, the timer will directly interrupt
		 * on the specified hardware vector/IRQ.
		 */
		timer_cfg.direct_mode = 1;
		timer_cfg.apic_vector = stimer0_vector;
		hv_enable_stimer0_percpu_irq(stimer0_irq);
	} else {
		/*
		 * When it expires, the timer will generate a VMbus message,
		 * to be handled by the normal VMbus interrupt handler.
		 */
		timer_cfg.direct_mode = 0;
		timer_cfg.sintx = VMBUS_MESSAGE_SINT;
	}
	hv_init_timer_config(0, timer_cfg.as_uint64);
	return 0;
}

static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu)
{
	dev->name = "Hyper-V clockevent";
	dev->features = CLOCK_EVT_FEAT_ONESHOT;
	dev->cpumask = cpumask_of(cpu);
	dev->rating = 1000;
	/*
	 * Avoid settint dev->owner = THIS_MODULE deliberately as doing so will
	 * result in clockevents_config_and_register() taking additional
	 * references to the hv_vmbus module making it impossible to unload.
	 */

	dev->set_state_shutdown = hv_ce_shutdown;
	dev->set_state_oneshot = hv_ce_set_oneshot;
	dev->set_next_event = hv_ce_set_next_event;
}


int hv_synic_alloc(void)
{
	int cpu;
	struct hv_per_cpu_context *hv_cpu;

	/*
	 * First, zero all per-cpu memory areas so hv_synic_free() can
	 * detect what memory has been allocated and cleanup properly
	 * after any failures.
	 */
	for_each_present_cpu(cpu) {
		hv_cpu = per_cpu_ptr(hv_context.cpu_context, cpu);
		memset(hv_cpu, 0, sizeof(*hv_cpu));
	}

	hv_context.hv_numa_map = kcalloc(nr_node_ids, sizeof(struct cpumask),
					 GFP_KERNEL);
	if (hv_context.hv_numa_map == NULL) {
		pr_err("Unable to allocate NUMA map\n");
		goto err;
	}

	for_each_present_cpu(cpu) {
		hv_cpu = per_cpu_ptr(hv_context.cpu_context, cpu);

		tasklet_init(&hv_cpu->msg_dpc,
			     vmbus_on_msg_dpc, (unsigned long) hv_cpu);

		hv_cpu->clk_evt = kzalloc(sizeof(struct clock_event_device),
					  GFP_KERNEL);
		if (hv_cpu->clk_evt == NULL) {
			pr_err("Unable to allocate clock event device\n");
			goto err;
		}
		hv_init_clockevent_device(hv_cpu->clk_evt, cpu);

		hv_cpu->synic_message_page =
			(void *)get_zeroed_page(GFP_ATOMIC);
		if (hv_cpu->synic_message_page == NULL) {
			pr_err("Unable to allocate SYNIC message page\n");
			goto err;
		}

		hv_cpu->synic_event_page = (void *)get_zeroed_page(GFP_ATOMIC);
		if (hv_cpu->synic_event_page == NULL) {
			pr_err("Unable to allocate SYNIC event page\n");
			goto err;
		}

		hv_cpu->post_msg_page = (void *)get_zeroed_page(GFP_ATOMIC);
		if (hv_cpu->post_msg_page == NULL) {
			pr_err("Unable to allocate post msg page\n");
			goto err;
		}

		INIT_LIST_HEAD(&hv_cpu->chan_list);
	}

	if (direct_mode_enabled &&
	    hv_setup_stimer0_irq(&stimer0_irq, &stimer0_vector,
				hv_stimer0_isr))
		goto err;

	return 0;
err:
	/*
	 * Any memory allocations that succeeded will be freed when
	 * the caller cleans up by calling hv_synic_free()
	 */
	return -ENOMEM;
}


void hv_synic_free(void)
{
	int cpu;

	for_each_present_cpu(cpu) {
		struct hv_per_cpu_context *hv_cpu
			= per_cpu_ptr(hv_context.cpu_context, cpu);

		kfree(hv_cpu->clk_evt);
		free_page((unsigned long)hv_cpu->synic_event_page);
		free_page((unsigned long)hv_cpu->synic_message_page);
		free_page((unsigned long)hv_cpu->post_msg_page);
	}

	kfree(hv_context.hv_numa_map);
}

/*
 * hv_synic_init - Initialize the Synthetic Interrupt Controller.
 *
 * If it is already initialized by another entity (ie x2v shim), we need to
 * retrieve the initialized message and event pages.  Otherwise, we create and
 * initialize the message and event pages.
 */
int hv_synic_init(unsigned int cpu)
{
	struct hv_per_cpu_context *hv_cpu
		= per_cpu_ptr(hv_context.cpu_context, cpu);
	union hv_synic_simp simp;
	union hv_synic_siefp siefp;
	union hv_synic_sint shared_sint;
	union hv_synic_scontrol sctrl;

	/* Setup the Synic's message page */
	hv_get_simp(simp.as_uint64);
	simp.simp_enabled = 1;
	simp.base_simp_gpa = virt_to_phys(hv_cpu->synic_message_page)
		>> PAGE_SHIFT;

	hv_set_simp(simp.as_uint64);

	/* Setup the Synic's event page */
	hv_get_siefp(siefp.as_uint64);
	siefp.siefp_enabled = 1;
	siefp.base_siefp_gpa = virt_to_phys(hv_cpu->synic_event_page)
		>> PAGE_SHIFT;

	hv_set_siefp(siefp.as_uint64);

	/* Setup the shared SINT. */
	hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);

	shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
	shared_sint.masked = false;
	if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
		shared_sint.auto_eoi = false;
	else
		shared_sint.auto_eoi = true;

	hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);

	/* Enable the global synic bit */
	hv_get_synic_state(sctrl.as_uint64);
	sctrl.enable = 1;

	hv_set_synic_state(sctrl.as_uint64);

	hv_context.synic_initialized = true;

	/*
	 * Register the per-cpu clockevent source.
	 */
	if (ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE)
		clockevents_config_and_register(hv_cpu->clk_evt,
						HV_TIMER_FREQUENCY,
						HV_MIN_DELTA_TICKS,
						HV_MAX_MAX_DELTA_TICKS);
	return 0;
}

/*
 * hv_synic_clockevents_cleanup - Cleanup clockevent devices
 */
void hv_synic_clockevents_cleanup(void)
{
	int cpu;

	if (!(ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE))
		return;

	if (direct_mode_enabled)
		hv_remove_stimer0_irq(stimer0_irq);

	for_each_present_cpu(cpu) {
		struct hv_per_cpu_context *hv_cpu
			= per_cpu_ptr(hv_context.cpu_context, cpu);

		clockevents_unbind_device(hv_cpu->clk_evt, cpu);
	}
}

/*
 * hv_synic_cleanup - Cleanup routine for hv_synic_init().
 */
int hv_synic_cleanup(unsigned int cpu)
{
	union hv_synic_sint shared_sint;
	union hv_synic_simp simp;
	union hv_synic_siefp siefp;
	union hv_synic_scontrol sctrl;
	struct vmbus_channel *channel, *sc;
	bool channel_found = false;
	unsigned long flags;

	if (!hv_context.synic_initialized)
		return -EFAULT;

	/*
	 * Search for channels which are bound to the CPU we're about to
	 * cleanup. In case we find one and vmbus is still connected we need to
	 * fail, this will effectively prevent CPU offlining. There is no way
	 * we can re-bind channels to different CPUs for now.
	 */
	mutex_lock(&vmbus_connection.channel_mutex);
	list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
		if (channel->target_cpu == cpu) {
			channel_found = true;
			break;
		}
		spin_lock_irqsave(&channel->lock, flags);
		list_for_each_entry(sc, &channel->sc_list, sc_list) {
			if (sc->target_cpu == cpu) {
				channel_found = true;
				break;
			}
		}
		spin_unlock_irqrestore(&channel->lock, flags);
		if (channel_found)
			break;
	}
	mutex_unlock(&vmbus_connection.channel_mutex);

	if (channel_found && vmbus_connection.conn_state == CONNECTED)
		return -EBUSY;

	/* Turn off clockevent device */
	if (ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE) {
		struct hv_per_cpu_context *hv_cpu
			= this_cpu_ptr(hv_context.cpu_context);

		clockevents_unbind_device(hv_cpu->clk_evt, cpu);
		hv_ce_shutdown(hv_cpu->clk_evt);
		put_cpu_ptr(hv_cpu);
	}

	hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);

	shared_sint.masked = 1;

	/* Need to correctly cleanup in the case of SMP!!! */
	/* Disable the interrupt */
	hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);

	hv_get_simp(simp.as_uint64);
	simp.simp_enabled = 0;
	simp.base_simp_gpa = 0;

	hv_set_simp(simp.as_uint64);

	hv_get_siefp(siefp.as_uint64);
	siefp.siefp_enabled = 0;
	siefp.base_siefp_gpa = 0;

	hv_set_siefp(siefp.as_uint64);

	/* Disable the global synic bit */
	hv_get_synic_state(sctrl.as_uint64);
	sctrl.enable = 0;
	hv_set_synic_state(sctrl.as_uint64);

	return 0;
}
Commit	Line	Data
3e7ee490	1	/*
3e7ee490 HJ	2	* Copyright (c) 2009, Microsoft Corporation.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms and conditions of the GNU General Public License,
	6	* version 2, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT
	9	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	* more details.
	12	*
	13	* You should have received a copy of the GNU General Public License along with
	14	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	15	* Place - Suite 330, Boston, MA 02111-1307 USA.
	16	*
	17	* Authors:
	18	* Haiyang Zhang <[email protected]>
	19	* Hank Janssen <[email protected]>
	20	*
	21	*/
0a46618d HJ	22	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0a46618d HJ	23
a0086dc5 GKH	24	#include <linux/kernel.h>
a0086dc5 GKH	25	#include <linux/mm.h>
5a0e3ad6	26	#include <linux/slab.h>
b7c947f0	27	#include <linux/vmalloc.h>
46a97191	28	#include <linux/hyperv.h>
83ba0c4f	29	#include <linux/version.h>
248e742a	30	#include <linux/random.h>
4061ed9e	31	#include <linux/clockchips.h>
4061ed9e	32	#include <asm/mshyperv.h>
0f2a6619	33	#include "hyperv_vmbus.h"
3e7ee490	34
454f18a9	35	/* The one and only */
6a0aaa18 HZ	36	struct hv_context hv_context = {
6a0aaa18 HZ	37	.synic_initialized = false,
3e7ee490 HJ	38	};
3e7ee490 HJ	39
248e742a MK	40	/*
	41	* If false, we're using the old mechanism for stimer0 interrupts
	42	* where it sends a VMbus message when it expires. The old
	43	* mechanism is used when running on older versions of Hyper-V
	44	* that don't support Direct Mode. While Hyper-V provides
	45	* four stimer's per CPU, Linux uses only stimer0.
	46	*/
	47	static bool direct_mode_enabled;
	48	static int stimer0_irq;
	49	static int stimer0_vector;
	50
4061ed9e S	51	#define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */
	52	#define HV_MAX_MAX_DELTA_TICKS 0xffffffff
	53	#define HV_MIN_DELTA_TICKS 1
	54
3e189519	55	/*
d44890c8	56	* hv_init - Main initialization routine.
0831ad04 GKH	57	*
	58	* This routine must be called before any other routines in here are called
	59	*/
d44890c8	60	int hv_init(void)
3e7ee490	61	{
37cdd991 SH	62	hv_context.cpu_context = alloc_percpu(struct hv_per_cpu_context);
	63	if (!hv_context.cpu_context)
	64	return -ENOMEM;
	65
248e742a	66	direct_mode_enabled = ms_hyperv.misc_features &
7dc9b6b8	67	HV_STIMER_DIRECT_MODE_AVAILABLE;
5433e003	68	return 0;
3e7ee490 HJ	69	}
3e7ee490 HJ	70
3e189519	71	/*
d44890c8	72	* hv_post_message - Post a message using the hypervisor message IPC.
0831ad04 GKH	73	*
	74	* This involves a hypercall.
	75	*/
415f0a02	76	int hv_post_message(union hv_connection_id connection_id,
b8dfb264 HZ	77	enum hv_message_type message_type,
b8dfb264 HZ	78	void *payload, size_t payload_size)
3e7ee490	79	{
b8dfb264	80	struct hv_input_post_message *aligned_msg;
37cdd991	81	struct hv_per_cpu_context *hv_cpu;
a108393d	82	u64 status;
3e7ee490	83
b8dfb264	84	if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
39594abc	85	return -EMSGSIZE;
3e7ee490	86
37cdd991 SH	87	hv_cpu = get_cpu_ptr(hv_context.cpu_context);
37cdd991 SH	88	aligned_msg = hv_cpu->post_msg_page;
b8dfb264	89	aligned_msg->connectionid = connection_id;
b29ef354	90	aligned_msg->reserved = 0;
b8dfb264 HZ	91	aligned_msg->message_type = message_type;
	92	aligned_msg->payload_size = payload_size;
	93	memcpy((void *)aligned_msg->payload, payload, payload_size);
3e7ee490	94
a108393d	95	status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL);
3e7ee490	96
13b9abfc MK	97	/* Preemption must remain disabled until after the hypercall
	98	* so some other thread can't get scheduled onto this cpu and
	99	* corrupt the per-cpu post_msg_page
	100	*/
	101	put_cpu_ptr(hv_cpu);
	102
a108393d	103	return status & 0xFFFF;
3e7ee490 HJ	104	}
3e7ee490 HJ	105
248e742a MK	106	/*
	107	* ISR for when stimer0 is operating in Direct Mode. Direct Mode
	108	* does not use VMbus or any VMbus messages, so process here and not
	109	* in the VMbus driver code.
	110	*/
	111
	112	static void hv_stimer0_isr(void)
	113	{
	114	struct hv_per_cpu_context *hv_cpu;
	115
	116	hv_cpu = this_cpu_ptr(hv_context.cpu_context);
	117	hv_cpu->clk_evt->event_handler(hv_cpu->clk_evt);
	118	add_interrupt_randomness(stimer0_vector, 0);
	119	}
	120
4061ed9e S	121	static int hv_ce_set_next_event(unsigned long delta,
	122	struct clock_event_device *evt)
	123	{
a5a1d1c2	124	u64 current_tick;
4061ed9e	125
bc609cb4	126	WARN_ON(!clockevent_state_oneshot(evt));
4061ed9e	127
e546d778	128	current_tick = hyperv_cs->read(NULL);
4061ed9e	129	current_tick += delta;
619a4c8b	130	hv_init_timer(0, current_tick);
4061ed9e S	131	return 0;
	132	}
	133
bc609cb4 VK	134	static int hv_ce_shutdown(struct clock_event_device *evt)
bc609cb4 VK	135	{
619a4c8b MK	136	hv_init_timer(0, 0);
619a4c8b MK	137	hv_init_timer_config(0, 0);
248e742a MK	138	if (direct_mode_enabled)
248e742a MK	139	hv_disable_stimer0_percpu_irq(stimer0_irq);
bc609cb4 VK	140
	141	return 0;
	142	}
	143
	144	static int hv_ce_set_oneshot(struct clock_event_device *evt)
4061ed9e S	145	{
	146	union hv_timer_config timer_cfg;
	147
248e742a	148	timer_cfg.as_uint64 = 0;
bc609cb4 VK	149	timer_cfg.enable = 1;
bc609cb4 VK	150	timer_cfg.auto_enable = 1;
248e742a MK	151	if (direct_mode_enabled) {
	152	/*
	153	* When it expires, the timer will directly interrupt
	154	* on the specified hardware vector/IRQ.
	155	*/
	156	timer_cfg.direct_mode = 1;
	157	timer_cfg.apic_vector = stimer0_vector;
	158	hv_enable_stimer0_percpu_irq(stimer0_irq);
	159	} else {
	160	/*
	161	* When it expires, the timer will generate a VMbus message,
	162	* to be handled by the normal VMbus interrupt handler.
	163	*/
	164	timer_cfg.direct_mode = 0;
	165	timer_cfg.sintx = VMBUS_MESSAGE_SINT;
	166	}
619a4c8b	167	hv_init_timer_config(0, timer_cfg.as_uint64);
bc609cb4	168	return 0;
4061ed9e S	169	}
	170
	171	static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu)
	172	{
	173	dev->name = "Hyper-V clockevent";
	174	dev->features = CLOCK_EVT_FEAT_ONESHOT;
	175	dev->cpumask = cpumask_of(cpu);
	176	dev->rating = 1000;
e086748c VK	177	/*
	178	* Avoid settint dev->owner = THIS_MODULE deliberately as doing so will
	179	* result in clockevents_config_and_register() taking additional
	180	* references to the hv_vmbus module making it impossible to unload.
	181	*/
4061ed9e	182
bc609cb4 VK	183	dev->set_state_shutdown = hv_ce_shutdown;
bc609cb4 VK	184	dev->set_state_oneshot = hv_ce_set_oneshot;
4061ed9e S	185	dev->set_next_event = hv_ce_set_next_event;
	186	}
	187
2608fb65 JW	188
	189	int hv_synic_alloc(void)
	190	{
2608fb65	191	int cpu;
f25a7ece MK	192	struct hv_per_cpu_context *hv_cpu;
	193
	194	/*
	195	* First, zero all per-cpu memory areas so hv_synic_free() can
	196	* detect what memory has been allocated and cleanup properly
	197	* after any failures.
	198	*/
	199	for_each_present_cpu(cpu) {
	200	hv_cpu = per_cpu_ptr(hv_context.cpu_context, cpu);
	201	memset(hv_cpu, 0, sizeof(*hv_cpu));
	202	}
2608fb65	203
6396bb22	204	hv_context.hv_numa_map = kcalloc(nr_node_ids, sizeof(struct cpumask),
597ff72f	205	GFP_KERNEL);
9f01ec53 S	206	if (hv_context.hv_numa_map == NULL) {
	207	pr_err("Unable to allocate NUMA map\n");
	208	goto err;
	209	}
	210
421b8f20	211	for_each_present_cpu(cpu) {
f25a7ece	212	hv_cpu = per_cpu_ptr(hv_context.cpu_context, cpu);
37cdd991	213
37cdd991 SH	214	tasklet_init(&hv_cpu->msg_dpc,
	215	vmbus_on_msg_dpc, (unsigned long) hv_cpu);
	216
	217	hv_cpu->clk_evt = kzalloc(sizeof(struct clock_event_device),
	218	GFP_KERNEL);
	219	if (hv_cpu->clk_evt == NULL) {
4061ed9e S	220	pr_err("Unable to allocate clock event device\n");
	221	goto err;
	222	}
37cdd991	223	hv_init_clockevent_device(hv_cpu->clk_evt, cpu);
9f01ec53	224
37cdd991	225	hv_cpu->synic_message_page =
2608fb65	226	(void *)get_zeroed_page(GFP_ATOMIC);
37cdd991	227	if (hv_cpu->synic_message_page == NULL) {
2608fb65 JW	228	pr_err("Unable to allocate SYNIC message page\n");
	229	goto err;
	230	}
	231
37cdd991 SH	232	hv_cpu->synic_event_page = (void *)get_zeroed_page(GFP_ATOMIC);
37cdd991 SH	233	if (hv_cpu->synic_event_page == NULL) {
2608fb65 JW	234	pr_err("Unable to allocate SYNIC event page\n");
	235	goto err;
	236	}
b29ef354	237
37cdd991 SH	238	hv_cpu->post_msg_page = (void *)get_zeroed_page(GFP_ATOMIC);
37cdd991 SH	239	if (hv_cpu->post_msg_page == NULL) {
b29ef354 S	240	pr_err("Unable to allocate post msg page\n");
	241	goto err;
	242	}
3c7630d3	243
37cdd991	244	INIT_LIST_HEAD(&hv_cpu->chan_list);
2608fb65 JW	245	}
2608fb65 JW	246
248e742a MK	247	if (direct_mode_enabled &&
	248	hv_setup_stimer0_irq(&stimer0_irq, &stimer0_vector,
	249	hv_stimer0_isr))
	250	goto err;
	251
2608fb65 JW	252	return 0;
2608fb65 JW	253	err:
57208632 MK	254	/*
	255	* Any memory allocations that succeeded will be freed when
	256	* the caller cleans up by calling hv_synic_free()
	257	*/
2608fb65 JW	258	return -ENOMEM;
	259	}
	260
2608fb65 JW	261
	262	void hv_synic_free(void)
	263	{
	264	int cpu;
	265
37cdd991 SH	266	for_each_present_cpu(cpu) {
	267	struct hv_per_cpu_context *hv_cpu
	268	= per_cpu_ptr(hv_context.cpu_context, cpu);
	269
57208632 MK	270	kfree(hv_cpu->clk_evt);
	271	free_page((unsigned long)hv_cpu->synic_event_page);
	272	free_page((unsigned long)hv_cpu->synic_message_page);
	273	free_page((unsigned long)hv_cpu->post_msg_page);
37cdd991 SH	274	}
37cdd991 SH	275
9f01ec53	276	kfree(hv_context.hv_numa_map);
2608fb65 JW	277	}
2608fb65 JW	278
3e189519	279	/*
68cb8117	280	* hv_synic_init - Initialize the Synthetic Interrupt Controller.
0831ad04 GKH	281	*
	282	* If it is already initialized by another entity (ie x2v shim), we need to
	283	* retrieve the initialized message and event pages. Otherwise, we create and
	284	* initialize the message and event pages.
	285	*/
76d36ab7	286	int hv_synic_init(unsigned int cpu)
3e7ee490	287	{
37cdd991 SH	288	struct hv_per_cpu_context *hv_cpu
37cdd991 SH	289	= per_cpu_ptr(hv_context.cpu_context, cpu);
eacb1b4d GKH	290	union hv_synic_simp simp;
eacb1b4d GKH	291	union hv_synic_siefp siefp;
b8dfb264	292	union hv_synic_sint shared_sint;
eacb1b4d	293	union hv_synic_scontrol sctrl;
a73e6b7c	294
a73e6b7c	295	/* Setup the Synic's message page */
155e4a2f	296	hv_get_simp(simp.as_uint64);
f6feebe0	297	simp.simp_enabled = 1;
37cdd991	298	simp.base_simp_gpa = virt_to_phys(hv_cpu->synic_message_page)
a73e6b7c	299	>> PAGE_SHIFT;
3e7ee490	300
155e4a2f	301	hv_set_simp(simp.as_uint64);
3e7ee490	302
a73e6b7c	303	/* Setup the Synic's event page */
8e307bf8	304	hv_get_siefp(siefp.as_uint64);
f6feebe0	305	siefp.siefp_enabled = 1;
37cdd991	306	siefp.base_siefp_gpa = virt_to_phys(hv_cpu->synic_event_page)
a73e6b7c HJ	307	>> PAGE_SHIFT;
a73e6b7c HJ	308
8e307bf8	309	hv_set_siefp(siefp.as_uint64);
0831ad04	310
0831ad04	311	/* Setup the shared SINT. */
619a4c8b	312	hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490	313
302a3c0f	314	shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
b8dfb264	315	shared_sint.masked = false;
7dc9b6b8	316	if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
6c248aad S	317	shared_sint.auto_eoi = false;
	318	else
	319	shared_sint.auto_eoi = true;
3e7ee490	320
619a4c8b	321	hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490	322
454f18a9	323	/* Enable the global synic bit */
06d1d98a	324	hv_get_synic_state(sctrl.as_uint64);
f6feebe0	325	sctrl.enable = 1;
3e7ee490	326
06d1d98a	327	hv_set_synic_state(sctrl.as_uint64);
3e7ee490	328
6a0aaa18	329	hv_context.synic_initialized = true;
917ea427	330
4061ed9e S	331	/*
	332	* Register the per-cpu clockevent source.
	333	*/
7dc9b6b8	334	if (ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE)
37cdd991	335	clockevents_config_and_register(hv_cpu->clk_evt,
4061ed9e S	336	HV_TIMER_FREQUENCY,
	337	HV_MIN_DELTA_TICKS,
	338	HV_MAX_MAX_DELTA_TICKS);
76d36ab7	339	return 0;
3e7ee490 HJ	340	}
3e7ee490 HJ	341
e086748c VK	342	/*
	343	* hv_synic_clockevents_cleanup - Cleanup clockevent devices
	344	*/
	345	void hv_synic_clockevents_cleanup(void)
	346	{
	347	int cpu;
	348
7dc9b6b8	349	if (!(ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE))
e086748c VK	350	return;
e086748c VK	351
248e742a MK	352	if (direct_mode_enabled)
	353	hv_remove_stimer0_irq(stimer0_irq);
	354
37cdd991 SH	355	for_each_present_cpu(cpu) {
	356	struct hv_per_cpu_context *hv_cpu
	357	= per_cpu_ptr(hv_context.cpu_context, cpu);
	358
	359	clockevents_unbind_device(hv_cpu->clk_evt, cpu);
	360	}
e086748c VK	361	}
e086748c VK	362
3e189519	363	/*
d44890c8	364	* hv_synic_cleanup - Cleanup routine for hv_synic_init().
0831ad04	365	*/
76d36ab7	366	int hv_synic_cleanup(unsigned int cpu)
3e7ee490	367	{
b8dfb264	368	union hv_synic_sint shared_sint;
eacb1b4d GKH	369	union hv_synic_simp simp;
eacb1b4d GKH	370	union hv_synic_siefp siefp;
e72e7ac5	371	union hv_synic_scontrol sctrl;
523b9408 VK	372	struct vmbus_channel channel, sc;
	373	bool channel_found = false;
	374	unsigned long flags;
3e7ee490	375
6a0aaa18	376	if (!hv_context.synic_initialized)
76d36ab7	377	return -EFAULT;
3e7ee490	378
523b9408 VK	379	/*
	380	* Search for channels which are bound to the CPU we're about to
	381	* cleanup. In case we find one and vmbus is still connected we need to
	382	* fail, this will effectively prevent CPU offlining. There is no way
	383	* we can re-bind channels to different CPUs for now.
	384	*/
	385	mutex_lock(&vmbus_connection.channel_mutex);
	386	list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
	387	if (channel->target_cpu == cpu) {
	388	channel_found = true;
	389	break;
	390	}
	391	spin_lock_irqsave(&channel->lock, flags);
	392	list_for_each_entry(sc, &channel->sc_list, sc_list) {
	393	if (sc->target_cpu == cpu) {
	394	channel_found = true;
	395	break;
	396	}
	397	}
	398	spin_unlock_irqrestore(&channel->lock, flags);
	399	if (channel_found)
	400	break;
	401	}
	402	mutex_unlock(&vmbus_connection.channel_mutex);
	403
	404	if (channel_found && vmbus_connection.conn_state == CONNECTED)
	405	return -EBUSY;
	406
e086748c	407	/* Turn off clockevent device */
7dc9b6b8	408	if (ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE) {
37cdd991 SH	409	struct hv_per_cpu_context *hv_cpu
	410	= this_cpu_ptr(hv_context.cpu_context);
	411
	412	clockevents_unbind_device(hv_cpu->clk_evt, cpu);
	413	hv_ce_shutdown(hv_cpu->clk_evt);
	414	put_cpu_ptr(hv_cpu);
6ffc4b85	415	}
e086748c	416
619a4c8b	417	hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490	418
b8dfb264	419	shared_sint.masked = 1;
3e7ee490	420
7692fd4d	421	/* Need to correctly cleanup in the case of SMP!!! */
454f18a9	422	/* Disable the interrupt */
619a4c8b	423	hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490	424
155e4a2f	425	hv_get_simp(simp.as_uint64);
f6feebe0 HZ	426	simp.simp_enabled = 0;
f6feebe0 HZ	427	simp.base_simp_gpa = 0;
3e7ee490	428
155e4a2f	429	hv_set_simp(simp.as_uint64);
3e7ee490	430
8e307bf8	431	hv_get_siefp(siefp.as_uint64);
f6feebe0 HZ	432	siefp.siefp_enabled = 0;
f6feebe0 HZ	433	siefp.base_siefp_gpa = 0;
3e7ee490	434
8e307bf8	435	hv_set_siefp(siefp.as_uint64);
3e7ee490	436
e72e7ac5	437	/* Disable the global synic bit */
06d1d98a	438	hv_get_synic_state(sctrl.as_uint64);
e72e7ac5	439	sctrl.enable = 0;
06d1d98a	440	hv_set_synic_state(sctrl.as_uint64);
76d36ab7 VK	441
76d36ab7 VK	442	return 0;
3e7ee490	443	}