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3e7ee490 1/*
3e7ee490
HJ
2 * Copyright (c) 2009, Microsoft Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Authors:
18 * Haiyang Zhang <[email protected]>
19 * Hank Janssen <[email protected]>
20 *
21 */
0a46618d
HJ
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
a0086dc5
GKH
24#include <linux/kernel.h>
25#include <linux/mm.h>
5a0e3ad6 26#include <linux/slab.h>
b7c947f0 27#include <linux/vmalloc.h>
46a97191 28#include <linux/hyperv.h>
83ba0c4f 29#include <linux/version.h>
248e742a 30#include <linux/random.h>
4061ed9e 31#include <linux/clockchips.h>
4061ed9e 32#include <asm/mshyperv.h>
0f2a6619 33#include "hyperv_vmbus.h"
3e7ee490 34
454f18a9 35/* The one and only */
6a0aaa18
HZ
36struct hv_context hv_context = {
37 .synic_initialized = false,
3e7ee490
HJ
38};
39
248e742a
MK
40/*
41 * If false, we're using the old mechanism for stimer0 interrupts
42 * where it sends a VMbus message when it expires. The old
43 * mechanism is used when running on older versions of Hyper-V
44 * that don't support Direct Mode. While Hyper-V provides
45 * four stimer's per CPU, Linux uses only stimer0.
46 */
47static bool direct_mode_enabled;
48static int stimer0_irq;
49static int stimer0_vector;
50
4061ed9e
S
51#define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */
52#define HV_MAX_MAX_DELTA_TICKS 0xffffffff
53#define HV_MIN_DELTA_TICKS 1
54
3e189519 55/*
d44890c8 56 * hv_init - Main initialization routine.
0831ad04
GKH
57 *
58 * This routine must be called before any other routines in here are called
59 */
d44890c8 60int hv_init(void)
3e7ee490 61{
37cdd991
SH
62 hv_context.cpu_context = alloc_percpu(struct hv_per_cpu_context);
63 if (!hv_context.cpu_context)
64 return -ENOMEM;
65
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66 direct_mode_enabled = ms_hyperv.misc_features &
67 HV_X64_STIMER_DIRECT_MODE_AVAILABLE;
5433e003 68 return 0;
3e7ee490
HJ
69}
70
3e189519 71/*
d44890c8 72 * hv_post_message - Post a message using the hypervisor message IPC.
0831ad04
GKH
73 *
74 * This involves a hypercall.
75 */
415f0a02 76int hv_post_message(union hv_connection_id connection_id,
b8dfb264
HZ
77 enum hv_message_type message_type,
78 void *payload, size_t payload_size)
3e7ee490 79{
b8dfb264 80 struct hv_input_post_message *aligned_msg;
37cdd991 81 struct hv_per_cpu_context *hv_cpu;
a108393d 82 u64 status;
3e7ee490 83
b8dfb264 84 if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
39594abc 85 return -EMSGSIZE;
3e7ee490 86
37cdd991
SH
87 hv_cpu = get_cpu_ptr(hv_context.cpu_context);
88 aligned_msg = hv_cpu->post_msg_page;
b8dfb264 89 aligned_msg->connectionid = connection_id;
b29ef354 90 aligned_msg->reserved = 0;
b8dfb264
HZ
91 aligned_msg->message_type = message_type;
92 aligned_msg->payload_size = payload_size;
93 memcpy((void *)aligned_msg->payload, payload, payload_size);
3e7ee490 94
a108393d 95 status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL);
3e7ee490 96
13b9abfc
MK
97 /* Preemption must remain disabled until after the hypercall
98 * so some other thread can't get scheduled onto this cpu and
99 * corrupt the per-cpu post_msg_page
100 */
101 put_cpu_ptr(hv_cpu);
102
a108393d 103 return status & 0xFFFF;
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104}
105
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MK
106/*
107 * ISR for when stimer0 is operating in Direct Mode. Direct Mode
108 * does not use VMbus or any VMbus messages, so process here and not
109 * in the VMbus driver code.
110 */
111
112static void hv_stimer0_isr(void)
113{
114 struct hv_per_cpu_context *hv_cpu;
115
116 hv_cpu = this_cpu_ptr(hv_context.cpu_context);
117 hv_cpu->clk_evt->event_handler(hv_cpu->clk_evt);
118 add_interrupt_randomness(stimer0_vector, 0);
119}
120
4061ed9e
S
121static int hv_ce_set_next_event(unsigned long delta,
122 struct clock_event_device *evt)
123{
a5a1d1c2 124 u64 current_tick;
4061ed9e 125
bc609cb4 126 WARN_ON(!clockevent_state_oneshot(evt));
4061ed9e 127
e546d778 128 current_tick = hyperv_cs->read(NULL);
4061ed9e 129 current_tick += delta;
619a4c8b 130 hv_init_timer(0, current_tick);
4061ed9e
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131 return 0;
132}
133
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134static int hv_ce_shutdown(struct clock_event_device *evt)
135{
619a4c8b
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136 hv_init_timer(0, 0);
137 hv_init_timer_config(0, 0);
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138 if (direct_mode_enabled)
139 hv_disable_stimer0_percpu_irq(stimer0_irq);
bc609cb4
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140
141 return 0;
142}
143
144static int hv_ce_set_oneshot(struct clock_event_device *evt)
4061ed9e
S
145{
146 union hv_timer_config timer_cfg;
147
248e742a 148 timer_cfg.as_uint64 = 0;
bc609cb4
VK
149 timer_cfg.enable = 1;
150 timer_cfg.auto_enable = 1;
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MK
151 if (direct_mode_enabled) {
152 /*
153 * When it expires, the timer will directly interrupt
154 * on the specified hardware vector/IRQ.
155 */
156 timer_cfg.direct_mode = 1;
157 timer_cfg.apic_vector = stimer0_vector;
158 hv_enable_stimer0_percpu_irq(stimer0_irq);
159 } else {
160 /*
161 * When it expires, the timer will generate a VMbus message,
162 * to be handled by the normal VMbus interrupt handler.
163 */
164 timer_cfg.direct_mode = 0;
165 timer_cfg.sintx = VMBUS_MESSAGE_SINT;
166 }
619a4c8b 167 hv_init_timer_config(0, timer_cfg.as_uint64);
bc609cb4 168 return 0;
4061ed9e
S
169}
170
171static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu)
172{
173 dev->name = "Hyper-V clockevent";
174 dev->features = CLOCK_EVT_FEAT_ONESHOT;
175 dev->cpumask = cpumask_of(cpu);
176 dev->rating = 1000;
e086748c
VK
177 /*
178 * Avoid settint dev->owner = THIS_MODULE deliberately as doing so will
179 * result in clockevents_config_and_register() taking additional
180 * references to the hv_vmbus module making it impossible to unload.
181 */
4061ed9e 182
bc609cb4
VK
183 dev->set_state_shutdown = hv_ce_shutdown;
184 dev->set_state_oneshot = hv_ce_set_oneshot;
4061ed9e
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185 dev->set_next_event = hv_ce_set_next_event;
186}
187
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188
189int hv_synic_alloc(void)
190{
2608fb65
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191 int cpu;
192
6396bb22 193 hv_context.hv_numa_map = kcalloc(nr_node_ids, sizeof(struct cpumask),
597ff72f 194 GFP_KERNEL);
9f01ec53
S
195 if (hv_context.hv_numa_map == NULL) {
196 pr_err("Unable to allocate NUMA map\n");
197 goto err;
198 }
199
421b8f20 200 for_each_present_cpu(cpu) {
37cdd991
SH
201 struct hv_per_cpu_context *hv_cpu
202 = per_cpu_ptr(hv_context.cpu_context, cpu);
203
204 memset(hv_cpu, 0, sizeof(*hv_cpu));
37cdd991
SH
205 tasklet_init(&hv_cpu->msg_dpc,
206 vmbus_on_msg_dpc, (unsigned long) hv_cpu);
207
208 hv_cpu->clk_evt = kzalloc(sizeof(struct clock_event_device),
209 GFP_KERNEL);
210 if (hv_cpu->clk_evt == NULL) {
4061ed9e
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211 pr_err("Unable to allocate clock event device\n");
212 goto err;
213 }
37cdd991 214 hv_init_clockevent_device(hv_cpu->clk_evt, cpu);
9f01ec53 215
37cdd991 216 hv_cpu->synic_message_page =
2608fb65 217 (void *)get_zeroed_page(GFP_ATOMIC);
37cdd991 218 if (hv_cpu->synic_message_page == NULL) {
2608fb65
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219 pr_err("Unable to allocate SYNIC message page\n");
220 goto err;
221 }
222
37cdd991
SH
223 hv_cpu->synic_event_page = (void *)get_zeroed_page(GFP_ATOMIC);
224 if (hv_cpu->synic_event_page == NULL) {
2608fb65
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225 pr_err("Unable to allocate SYNIC event page\n");
226 goto err;
227 }
b29ef354 228
37cdd991
SH
229 hv_cpu->post_msg_page = (void *)get_zeroed_page(GFP_ATOMIC);
230 if (hv_cpu->post_msg_page == NULL) {
b29ef354
S
231 pr_err("Unable to allocate post msg page\n");
232 goto err;
233 }
3c7630d3 234
37cdd991 235 INIT_LIST_HEAD(&hv_cpu->chan_list);
2608fb65
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236 }
237
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MK
238 if (direct_mode_enabled &&
239 hv_setup_stimer0_irq(&stimer0_irq, &stimer0_vector,
240 hv_stimer0_isr))
241 goto err;
242
2608fb65
JW
243 return 0;
244err:
245 return -ENOMEM;
246}
247
2608fb65
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248
249void hv_synic_free(void)
250{
251 int cpu;
252
37cdd991
SH
253 for_each_present_cpu(cpu) {
254 struct hv_per_cpu_context *hv_cpu
255 = per_cpu_ptr(hv_context.cpu_context, cpu);
256
257 if (hv_cpu->synic_event_page)
258 free_page((unsigned long)hv_cpu->synic_event_page);
259 if (hv_cpu->synic_message_page)
260 free_page((unsigned long)hv_cpu->synic_message_page);
261 if (hv_cpu->post_msg_page)
262 free_page((unsigned long)hv_cpu->post_msg_page);
263 }
264
9f01ec53 265 kfree(hv_context.hv_numa_map);
2608fb65
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266}
267
3e189519 268/*
68cb8117 269 * hv_synic_init - Initialize the Synthetic Interrupt Controller.
0831ad04
GKH
270 *
271 * If it is already initialized by another entity (ie x2v shim), we need to
272 * retrieve the initialized message and event pages. Otherwise, we create and
273 * initialize the message and event pages.
274 */
76d36ab7 275int hv_synic_init(unsigned int cpu)
3e7ee490 276{
37cdd991
SH
277 struct hv_per_cpu_context *hv_cpu
278 = per_cpu_ptr(hv_context.cpu_context, cpu);
eacb1b4d
GKH
279 union hv_synic_simp simp;
280 union hv_synic_siefp siefp;
b8dfb264 281 union hv_synic_sint shared_sint;
eacb1b4d 282 union hv_synic_scontrol sctrl;
a73e6b7c 283
a73e6b7c 284 /* Setup the Synic's message page */
155e4a2f 285 hv_get_simp(simp.as_uint64);
f6feebe0 286 simp.simp_enabled = 1;
37cdd991 287 simp.base_simp_gpa = virt_to_phys(hv_cpu->synic_message_page)
a73e6b7c 288 >> PAGE_SHIFT;
3e7ee490 289
155e4a2f 290 hv_set_simp(simp.as_uint64);
3e7ee490 291
a73e6b7c 292 /* Setup the Synic's event page */
8e307bf8 293 hv_get_siefp(siefp.as_uint64);
f6feebe0 294 siefp.siefp_enabled = 1;
37cdd991 295 siefp.base_siefp_gpa = virt_to_phys(hv_cpu->synic_event_page)
a73e6b7c
HJ
296 >> PAGE_SHIFT;
297
8e307bf8 298 hv_set_siefp(siefp.as_uint64);
0831ad04 299
0831ad04 300 /* Setup the shared SINT. */
619a4c8b 301 hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 302
302a3c0f 303 shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
b8dfb264 304 shared_sint.masked = false;
6c248aad
S
305 if (ms_hyperv.hints & HV_X64_DEPRECATING_AEOI_RECOMMENDED)
306 shared_sint.auto_eoi = false;
307 else
308 shared_sint.auto_eoi = true;
3e7ee490 309
619a4c8b 310 hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 311
454f18a9 312 /* Enable the global synic bit */
06d1d98a 313 hv_get_synic_state(sctrl.as_uint64);
f6feebe0 314 sctrl.enable = 1;
3e7ee490 315
06d1d98a 316 hv_set_synic_state(sctrl.as_uint64);
3e7ee490 317
6a0aaa18 318 hv_context.synic_initialized = true;
917ea427 319
4061ed9e
S
320 /*
321 * Register the per-cpu clockevent source.
322 */
323 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE)
37cdd991 324 clockevents_config_and_register(hv_cpu->clk_evt,
4061ed9e
S
325 HV_TIMER_FREQUENCY,
326 HV_MIN_DELTA_TICKS,
327 HV_MAX_MAX_DELTA_TICKS);
76d36ab7 328 return 0;
3e7ee490
HJ
329}
330
e086748c
VK
331/*
332 * hv_synic_clockevents_cleanup - Cleanup clockevent devices
333 */
334void hv_synic_clockevents_cleanup(void)
335{
336 int cpu;
337
338 if (!(ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE))
339 return;
340
248e742a
MK
341 if (direct_mode_enabled)
342 hv_remove_stimer0_irq(stimer0_irq);
343
37cdd991
SH
344 for_each_present_cpu(cpu) {
345 struct hv_per_cpu_context *hv_cpu
346 = per_cpu_ptr(hv_context.cpu_context, cpu);
347
348 clockevents_unbind_device(hv_cpu->clk_evt, cpu);
349 }
e086748c
VK
350}
351
3e189519 352/*
d44890c8 353 * hv_synic_cleanup - Cleanup routine for hv_synic_init().
0831ad04 354 */
76d36ab7 355int hv_synic_cleanup(unsigned int cpu)
3e7ee490 356{
b8dfb264 357 union hv_synic_sint shared_sint;
eacb1b4d
GKH
358 union hv_synic_simp simp;
359 union hv_synic_siefp siefp;
e72e7ac5 360 union hv_synic_scontrol sctrl;
523b9408
VK
361 struct vmbus_channel *channel, *sc;
362 bool channel_found = false;
363 unsigned long flags;
3e7ee490 364
6a0aaa18 365 if (!hv_context.synic_initialized)
76d36ab7 366 return -EFAULT;
3e7ee490 367
523b9408
VK
368 /*
369 * Search for channels which are bound to the CPU we're about to
370 * cleanup. In case we find one and vmbus is still connected we need to
371 * fail, this will effectively prevent CPU offlining. There is no way
372 * we can re-bind channels to different CPUs for now.
373 */
374 mutex_lock(&vmbus_connection.channel_mutex);
375 list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
376 if (channel->target_cpu == cpu) {
377 channel_found = true;
378 break;
379 }
380 spin_lock_irqsave(&channel->lock, flags);
381 list_for_each_entry(sc, &channel->sc_list, sc_list) {
382 if (sc->target_cpu == cpu) {
383 channel_found = true;
384 break;
385 }
386 }
387 spin_unlock_irqrestore(&channel->lock, flags);
388 if (channel_found)
389 break;
390 }
391 mutex_unlock(&vmbus_connection.channel_mutex);
392
393 if (channel_found && vmbus_connection.conn_state == CONNECTED)
394 return -EBUSY;
395
e086748c 396 /* Turn off clockevent device */
6ffc4b85 397 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE) {
37cdd991
SH
398 struct hv_per_cpu_context *hv_cpu
399 = this_cpu_ptr(hv_context.cpu_context);
400
401 clockevents_unbind_device(hv_cpu->clk_evt, cpu);
402 hv_ce_shutdown(hv_cpu->clk_evt);
403 put_cpu_ptr(hv_cpu);
6ffc4b85 404 }
e086748c 405
619a4c8b 406 hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 407
b8dfb264 408 shared_sint.masked = 1;
3e7ee490 409
7692fd4d 410 /* Need to correctly cleanup in the case of SMP!!! */
454f18a9 411 /* Disable the interrupt */
619a4c8b 412 hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 413
155e4a2f 414 hv_get_simp(simp.as_uint64);
f6feebe0
HZ
415 simp.simp_enabled = 0;
416 simp.base_simp_gpa = 0;
3e7ee490 417
155e4a2f 418 hv_set_simp(simp.as_uint64);
3e7ee490 419
8e307bf8 420 hv_get_siefp(siefp.as_uint64);
f6feebe0
HZ
421 siefp.siefp_enabled = 0;
422 siefp.base_siefp_gpa = 0;
3e7ee490 423
8e307bf8 424 hv_set_siefp(siefp.as_uint64);
3e7ee490 425
e72e7ac5 426 /* Disable the global synic bit */
06d1d98a 427 hv_get_synic_state(sctrl.as_uint64);
e72e7ac5 428 sctrl.enable = 0;
06d1d98a 429 hv_set_synic_state(sctrl.as_uint64);
76d36ab7
VK
430
431 return 0;
3e7ee490 432}
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